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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/i915/gt/uc/
H A Dintel_guc.c64 guc->send_regs.base = in intel_guc_init_send_regs()
75 guc_send_reg(guc, i), in intel_guc_init_send_regs()
218 u32 offset = intel_guc_ggtt_offset(guc, guc->log.vma) >> PAGE_SHIFT; in guc_ctl_log_params_flags()
259 u32 ads = intel_guc_ggtt_offset(guc, guc->ads_vma) >> PAGE_SHIFT; in guc_ctl_ads_flags()
272 u32 *params = guc->params; in guc_init_params()
327 GEM_BUG_ON(!guc->ads_vma); in intel_guc_init()
344 guc_init_params(guc); in intel_guc_init()
356 intel_guc_ads_destroy(guc); in intel_guc_init()
360 intel_uc_fw_fini(&guc->fw); in intel_guc_init()
414 intel_guc_notify(guc); in intel_guc_send_mmio()
[all …]
H A Dintel_guc.h37 void (*reset)(struct intel_guc *guc);
162 return intel_guc_is_fw_running(guc) && intel_guc_ct_enabled(&guc->ct); in intel_guc_is_ready()
167 intel_uc_fw_sanitize(&guc->fw); in intel_guc_sanitize()
168 intel_guc_ct_sanitize(&guc->ct); in intel_guc_sanitize()
169 guc->mmio_msg = 0; in intel_guc_sanitize()
176 spin_lock_irq(&guc->irq_lock); in intel_guc_enable_msg()
177 guc->msg_enabled_mask |= mask; in intel_guc_enable_msg()
178 spin_unlock_irq(&guc->irq_lock); in intel_guc_enable_msg()
183 spin_lock_irq(&guc->irq_lock); in intel_guc_disable_msg()
184 guc->msg_enabled_mask &= ~mask; in intel_guc_disable_msg()
[all …]
H A Dintel_uc.c141 struct intel_guc *guc = &uc->guc; in __uc_capture_load_err_log() local
212 guc->interrupts.reset(guc); in guc_reset_interrupts()
217 guc->interrupts.enable(guc); in guc_enable_interrupts()
222 guc->interrupts.disable(guc); in guc_disable_interrupts()
314 struct intel_guc *guc = &uc->guc; in __uc_init() local
354 struct intel_guc *guc = &uc->guc; in __uc_sanitize() local
447 struct intel_guc *guc = &uc->guc; in __uc_init_hw() local
553 struct intel_guc *guc = &uc->guc; in __uc_fini_hw() local
575 struct intel_guc *guc = &uc->guc; in intel_uc_reset_prepare() local
586 struct intel_guc *guc = &uc->guc; in intel_uc_runtime_suspend() local
[all …]
H A Dintel_guc_ads.c175 base = intel_guc_ggtt_offset(guc, guc->ads_vma); in __guc_ads_init()
207 GEM_BUG_ON(guc->ads_vma); in intel_guc_ads_create()
209 size = guc_ads_blob_size(guc); in intel_guc_ads_create()
211 ret = intel_guc_allocate_and_map_vma(guc, size, &guc->ads_vma, in intel_guc_ads_create()
212 (void **)&guc->ads_blob); in intel_guc_ads_create()
216 __guc_ads_init(guc); in intel_guc_ads_create()
224 guc->ads_blob = NULL; in intel_guc_ads_destroy()
235 memset((void *)guc->ads_blob + guc_ads_private_data_offset(guc), 0, in guc_ads_private_data_reset()
249 if (!guc->ads_vma) in intel_guc_ads_reset()
252 __guc_ads_init(guc); in intel_guc_ads_reset()
[all …]
H A Dintel_guc_submission.h15 void intel_guc_submission_init_early(struct intel_guc *guc);
16 int intel_guc_submission_init(struct intel_guc *guc);
17 void intel_guc_submission_enable(struct intel_guc *guc);
18 void intel_guc_submission_disable(struct intel_guc *guc);
19 void intel_guc_submission_fini(struct intel_guc *guc);
20 int intel_guc_preempt_work_create(struct intel_guc *guc);
21 void intel_guc_preempt_work_destroy(struct intel_guc *guc);
31 static inline bool intel_guc_submission_is_wanted(struct intel_guc *guc) in intel_guc_submission_is_wanted() argument
33 return guc->submission_selected; in intel_guc_submission_is_wanted()
36 static inline bool intel_guc_submission_is_used(struct intel_guc *guc) in intel_guc_submission_is_used() argument
[all …]
H A Dintel_guc_submission.c79 return intel_guc_allocate_and_map_vma(guc, size, &guc->stage_desc_pool, in guc_stage_desc_pool_create()
100 desc = __get_stage_desc(guc, 0); in guc_stage_desc_init()
116 desc = __get_stage_desc(guc, 0); in guc_stage_desc_fini()
143 struct intel_guc *guc = &engine->gt->uc.guc; in guc_submit() local
149 guc_add_request(guc, rq); in guc_submit()
404 if (guc->stage_desc_pool) in intel_guc_submission_init()
414 GEM_BUG_ON(!guc->stage_desc_pool); in intel_guc_submission_init()
421 if (guc->stage_desc_pool) { in intel_guc_submission_fini()
723 guc_stage_desc_init(guc); in intel_guc_submission_enable()
739 guc_stage_desc_fini(guc); in intel_guc_submission_disable()
[all …]
H A Dintel_guc_debugfs.c15 struct intel_guc *guc = m->private; in guc_info_show() local
18 if (!intel_guc_is_supported(guc)) in guc_info_show()
21 intel_guc_load_status(guc, &p); in guc_info_show()
23 intel_guc_log_info(&guc->log, &p); in guc_info_show()
31 void intel_guc_debugfs_register(struct intel_guc *guc, struct dentry *root) in intel_guc_debugfs_register() argument
37 if (!intel_guc_is_supported(guc)) in intel_guc_debugfs_register()
40 intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), guc); in intel_guc_debugfs_register()
41 intel_guc_log_debugfs_register(&guc->log, root); in intel_guc_debugfs_register()
H A Dintel_guc_log.c364 struct intel_guc *guc = log_to_guc(log); in guc_log_relay_create() local
411 struct intel_guc *guc = log_to_guc(log); in guc_log_capture_logs() local
422 guc_action_flush_log_complete(guc); in guc_log_capture_logs()
427 struct intel_guc *guc = log_to_guc(log); in __get_default_log_level() local
453 struct intel_guc *guc = log_to_guc(log); in intel_guc_log_create() local
531 ret = guc_action_control_log(guc, in intel_guc_log_set_level()
631 guc_action_flush_log(guc); in intel_guc_log_relay_flush()
731 struct intel_uc *uc = container_of(guc, struct intel_uc, guc); in intel_guc_log_dump()
736 if (!intel_guc_is_supported(guc)) in intel_guc_log_dump()
741 else if (guc->log.vma) in intel_guc_log_dump()
[all …]
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/i915/gt/uc/
H A Dintel_guc.c64 guc->send_regs.base = in intel_guc_init_send_regs()
75 guc_send_reg(guc, i), in intel_guc_init_send_regs()
218 u32 offset = intel_guc_ggtt_offset(guc, guc->log.vma) >> PAGE_SHIFT; in guc_ctl_log_params_flags()
259 u32 ads = intel_guc_ggtt_offset(guc, guc->ads_vma) >> PAGE_SHIFT; in guc_ctl_ads_flags()
272 u32 *params = guc->params; in guc_init_params()
327 GEM_BUG_ON(!guc->ads_vma); in intel_guc_init()
344 guc_init_params(guc); in intel_guc_init()
356 intel_guc_ads_destroy(guc); in intel_guc_init()
360 intel_uc_fw_fini(&guc->fw); in intel_guc_init()
414 intel_guc_notify(guc); in intel_guc_send_mmio()
[all …]
H A Dintel_guc.h37 void (*reset)(struct intel_guc *guc);
162 return intel_guc_is_fw_running(guc) && intel_guc_ct_enabled(&guc->ct); in intel_guc_is_ready()
167 intel_uc_fw_sanitize(&guc->fw); in intel_guc_sanitize()
168 intel_guc_ct_sanitize(&guc->ct); in intel_guc_sanitize()
169 guc->mmio_msg = 0; in intel_guc_sanitize()
176 spin_lock_irq(&guc->irq_lock); in intel_guc_enable_msg()
177 guc->msg_enabled_mask |= mask; in intel_guc_enable_msg()
178 spin_unlock_irq(&guc->irq_lock); in intel_guc_enable_msg()
183 spin_lock_irq(&guc->irq_lock); in intel_guc_disable_msg()
184 guc->msg_enabled_mask &= ~mask; in intel_guc_disable_msg()
[all …]
H A Dintel_uc.c141 struct intel_guc *guc = &uc->guc; in __uc_capture_load_err_log() local
212 guc->interrupts.reset(guc); in guc_reset_interrupts()
217 guc->interrupts.enable(guc); in guc_enable_interrupts()
222 guc->interrupts.disable(guc); in guc_disable_interrupts()
314 struct intel_guc *guc = &uc->guc; in __uc_init() local
354 struct intel_guc *guc = &uc->guc; in __uc_sanitize() local
447 struct intel_guc *guc = &uc->guc; in __uc_init_hw() local
553 struct intel_guc *guc = &uc->guc; in __uc_fini_hw() local
575 struct intel_guc *guc = &uc->guc; in intel_uc_reset_prepare() local
586 struct intel_guc *guc = &uc->guc; in intel_uc_runtime_suspend() local
[all …]
H A Dintel_guc_ads.c175 base = intel_guc_ggtt_offset(guc, guc->ads_vma); in __guc_ads_init()
207 GEM_BUG_ON(guc->ads_vma); in intel_guc_ads_create()
209 size = guc_ads_blob_size(guc); in intel_guc_ads_create()
211 ret = intel_guc_allocate_and_map_vma(guc, size, &guc->ads_vma, in intel_guc_ads_create()
212 (void **)&guc->ads_blob); in intel_guc_ads_create()
216 __guc_ads_init(guc); in intel_guc_ads_create()
224 guc->ads_blob = NULL; in intel_guc_ads_destroy()
235 memset((void *)guc->ads_blob + guc_ads_private_data_offset(guc), 0, in guc_ads_private_data_reset()
249 if (!guc->ads_vma) in intel_guc_ads_reset()
252 __guc_ads_init(guc); in intel_guc_ads_reset()
[all …]
H A Dintel_guc_submission.h15 void intel_guc_submission_init_early(struct intel_guc *guc);
16 int intel_guc_submission_init(struct intel_guc *guc);
17 void intel_guc_submission_enable(struct intel_guc *guc);
18 void intel_guc_submission_disable(struct intel_guc *guc);
19 void intel_guc_submission_fini(struct intel_guc *guc);
20 int intel_guc_preempt_work_create(struct intel_guc *guc);
21 void intel_guc_preempt_work_destroy(struct intel_guc *guc);
31 static inline bool intel_guc_submission_is_wanted(struct intel_guc *guc) in intel_guc_submission_is_wanted() argument
33 return guc->submission_selected; in intel_guc_submission_is_wanted()
36 static inline bool intel_guc_submission_is_used(struct intel_guc *guc) in intel_guc_submission_is_used() argument
[all …]
H A Dintel_guc_submission.c79 return intel_guc_allocate_and_map_vma(guc, size, &guc->stage_desc_pool, in guc_stage_desc_pool_create()
100 desc = __get_stage_desc(guc, 0); in guc_stage_desc_init()
116 desc = __get_stage_desc(guc, 0); in guc_stage_desc_fini()
143 struct intel_guc *guc = &engine->gt->uc.guc; in guc_submit() local
149 guc_add_request(guc, rq); in guc_submit()
404 if (guc->stage_desc_pool) in intel_guc_submission_init()
414 GEM_BUG_ON(!guc->stage_desc_pool); in intel_guc_submission_init()
421 if (guc->stage_desc_pool) { in intel_guc_submission_fini()
723 guc_stage_desc_init(guc); in intel_guc_submission_enable()
739 guc_stage_desc_fini(guc); in intel_guc_submission_disable()
[all …]
H A Dintel_guc_debugfs.c15 struct intel_guc *guc = m->private; in guc_info_show() local
18 if (!intel_guc_is_supported(guc)) in guc_info_show()
21 intel_guc_load_status(guc, &p); in guc_info_show()
23 intel_guc_log_info(&guc->log, &p); in guc_info_show()
31 void intel_guc_debugfs_register(struct intel_guc *guc, struct dentry *root) in intel_guc_debugfs_register() argument
37 if (!intel_guc_is_supported(guc)) in intel_guc_debugfs_register()
40 intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), guc); in intel_guc_debugfs_register()
41 intel_guc_log_debugfs_register(&guc->log, root); in intel_guc_debugfs_register()
H A Dintel_guc_log.c364 struct intel_guc *guc = log_to_guc(log); in guc_log_relay_create() local
411 struct intel_guc *guc = log_to_guc(log); in guc_log_capture_logs() local
422 guc_action_flush_log_complete(guc); in guc_log_capture_logs()
427 struct intel_guc *guc = log_to_guc(log); in __get_default_log_level() local
453 struct intel_guc *guc = log_to_guc(log); in intel_guc_log_create() local
531 ret = guc_action_control_log(guc, in intel_guc_log_set_level()
631 guc_action_flush_log(guc); in intel_guc_log_relay_flush()
731 struct intel_uc *uc = container_of(guc, struct intel_uc, guc); in intel_guc_log_dump()
736 if (!intel_guc_is_supported(guc)) in intel_guc_log_dump()
741 else if (guc->log.vma) in intel_guc_log_dump()
[all …]
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/i915/gt/uc/
H A Dintel_guc.c64 guc->send_regs.base = in intel_guc_init_send_regs()
75 guc_send_reg(guc, i), in intel_guc_init_send_regs()
218 u32 offset = intel_guc_ggtt_offset(guc, guc->log.vma) >> PAGE_SHIFT; in guc_ctl_log_params_flags()
259 u32 ads = intel_guc_ggtt_offset(guc, guc->ads_vma) >> PAGE_SHIFT; in guc_ctl_ads_flags()
272 u32 *params = guc->params; in guc_init_params()
327 GEM_BUG_ON(!guc->ads_vma); in intel_guc_init()
344 guc_init_params(guc); in intel_guc_init()
356 intel_guc_ads_destroy(guc); in intel_guc_init()
360 intel_uc_fw_fini(&guc->fw); in intel_guc_init()
414 intel_guc_notify(guc); in intel_guc_send_mmio()
[all …]
H A Dintel_guc.h37 void (*reset)(struct intel_guc *guc);
162 return intel_guc_is_fw_running(guc) && intel_guc_ct_enabled(&guc->ct); in intel_guc_is_ready()
167 intel_uc_fw_sanitize(&guc->fw); in intel_guc_sanitize()
168 intel_guc_ct_sanitize(&guc->ct); in intel_guc_sanitize()
169 guc->mmio_msg = 0; in intel_guc_sanitize()
176 spin_lock_irq(&guc->irq_lock); in intel_guc_enable_msg()
177 guc->msg_enabled_mask |= mask; in intel_guc_enable_msg()
178 spin_unlock_irq(&guc->irq_lock); in intel_guc_enable_msg()
183 spin_lock_irq(&guc->irq_lock); in intel_guc_disable_msg()
184 guc->msg_enabled_mask &= ~mask; in intel_guc_disable_msg()
[all …]
H A Dintel_uc.c141 struct intel_guc *guc = &uc->guc; in __uc_capture_load_err_log() local
212 guc->interrupts.reset(guc); in guc_reset_interrupts()
217 guc->interrupts.enable(guc); in guc_enable_interrupts()
222 guc->interrupts.disable(guc); in guc_disable_interrupts()
314 struct intel_guc *guc = &uc->guc; in __uc_init() local
354 struct intel_guc *guc = &uc->guc; in __uc_sanitize() local
447 struct intel_guc *guc = &uc->guc; in __uc_init_hw() local
553 struct intel_guc *guc = &uc->guc; in __uc_fini_hw() local
575 struct intel_guc *guc = &uc->guc; in intel_uc_reset_prepare() local
586 struct intel_guc *guc = &uc->guc; in intel_uc_runtime_suspend() local
[all …]
H A Dintel_guc_ads.c175 base = intel_guc_ggtt_offset(guc, guc->ads_vma); in __guc_ads_init()
207 GEM_BUG_ON(guc->ads_vma); in intel_guc_ads_create()
209 size = guc_ads_blob_size(guc); in intel_guc_ads_create()
211 ret = intel_guc_allocate_and_map_vma(guc, size, &guc->ads_vma, in intel_guc_ads_create()
212 (void **)&guc->ads_blob); in intel_guc_ads_create()
216 __guc_ads_init(guc); in intel_guc_ads_create()
224 guc->ads_blob = NULL; in intel_guc_ads_destroy()
235 memset((void *)guc->ads_blob + guc_ads_private_data_offset(guc), 0, in guc_ads_private_data_reset()
249 if (!guc->ads_vma) in intel_guc_ads_reset()
252 __guc_ads_init(guc); in intel_guc_ads_reset()
[all …]
H A Dintel_guc_submission.h15 void intel_guc_submission_init_early(struct intel_guc *guc);
16 int intel_guc_submission_init(struct intel_guc *guc);
17 void intel_guc_submission_enable(struct intel_guc *guc);
18 void intel_guc_submission_disable(struct intel_guc *guc);
19 void intel_guc_submission_fini(struct intel_guc *guc);
20 int intel_guc_preempt_work_create(struct intel_guc *guc);
21 void intel_guc_preempt_work_destroy(struct intel_guc *guc);
31 static inline bool intel_guc_submission_is_wanted(struct intel_guc *guc) in intel_guc_submission_is_wanted() argument
33 return guc->submission_selected; in intel_guc_submission_is_wanted()
36 static inline bool intel_guc_submission_is_used(struct intel_guc *guc) in intel_guc_submission_is_used() argument
[all …]
H A Dintel_guc_submission.c79 return intel_guc_allocate_and_map_vma(guc, size, &guc->stage_desc_pool, in guc_stage_desc_pool_create()
100 desc = __get_stage_desc(guc, 0); in guc_stage_desc_init()
116 desc = __get_stage_desc(guc, 0); in guc_stage_desc_fini()
143 struct intel_guc *guc = &engine->gt->uc.guc; in guc_submit() local
149 guc_add_request(guc, rq); in guc_submit()
404 if (guc->stage_desc_pool) in intel_guc_submission_init()
414 GEM_BUG_ON(!guc->stage_desc_pool); in intel_guc_submission_init()
421 if (guc->stage_desc_pool) { in intel_guc_submission_fini()
723 guc_stage_desc_init(guc); in intel_guc_submission_enable()
739 guc_stage_desc_fini(guc); in intel_guc_submission_disable()
[all …]
H A Dintel_guc_debugfs.c15 struct intel_guc *guc = m->private; in guc_info_show() local
18 if (!intel_guc_is_supported(guc)) in guc_info_show()
21 intel_guc_load_status(guc, &p); in guc_info_show()
23 intel_guc_log_info(&guc->log, &p); in guc_info_show()
31 void intel_guc_debugfs_register(struct intel_guc *guc, struct dentry *root) in intel_guc_debugfs_register() argument
37 if (!intel_guc_is_supported(guc)) in intel_guc_debugfs_register()
40 intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), guc); in intel_guc_debugfs_register()
41 intel_guc_log_debugfs_register(&guc->log, root); in intel_guc_debugfs_register()
H A Dintel_guc_log.c364 struct intel_guc *guc = log_to_guc(log); in guc_log_relay_create() local
411 struct intel_guc *guc = log_to_guc(log); in guc_log_capture_logs() local
422 guc_action_flush_log_complete(guc); in guc_log_capture_logs()
427 struct intel_guc *guc = log_to_guc(log); in __get_default_log_level() local
453 struct intel_guc *guc = log_to_guc(log); in intel_guc_log_create() local
531 ret = guc_action_control_log(guc, in intel_guc_log_set_level()
631 guc_action_flush_log(guc); in intel_guc_log_relay_flush()
731 struct intel_uc *uc = container_of(guc, struct intel_uc, guc); in intel_guc_log_dump()
736 if (!intel_guc_is_supported(guc)) in intel_guc_log_dump()
741 else if (guc->log.vma) in intel_guc_log_dump()
[all …]
/dports/databases/pgpool-II-43/pgpool-II-4.3.0/doc/src/sgml/
H A Dexample-Aurora.sgml12 set <xref linkend="guc-failover-command">, <xref linkend="guc-follow-primary-command">,
29 Set <xref linkend="guc-sr-check-period"> to 0 to
41 Enable <xref linkend="guc-enable-pool-hba"> to on so
59 Set <xref linkend="guc-backend-hostname">1 for the Aurora reader endpoint.
60 Set appropriate <xref linkend="guc-backend-weight"> as usual.
61 You don't need to set <xref linkend="guc-backend-data-directory">.
71 the <xref linkend="guc-backend-flag">
72 for <xref linkend="guc-backend-hostname">0.
78 the <xref linkend="guc-backend-flag">
79 for <xref linkend="guc-backend-hostname">0 and <xref linkend="guc-backend-hostname">1.
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