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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/i386/hvf/
H A Dx86hvf.c102 macvm_set_cr4(cpu_state->hvf->fd, env->cr[4]); in hvf_put_segments()
103 macvm_set_cr0(cpu_state->hvf->fd, env->cr[0]); in hvf_put_segments()
129 hv_vcpu_flush(cpu_state->hvf->fd); in hvf_put_segments()
264 wreg(cpu_state->hvf->fd, HV_X86_RIP, env->eip); in hvf_put_registers()
266 wreg(cpu_state->hvf->fd, HV_X86_XCR0, env->xcr0); in hvf_put_registers()
274 wreg(cpu_state->hvf->fd, HV_X86_DR0, env->dr[0]); in hvf_put_registers()
275 wreg(cpu_state->hvf->fd, HV_X86_DR1, env->dr[1]); in hvf_put_registers()
276 wreg(cpu_state->hvf->fd, HV_X86_DR2, env->dr[2]); in hvf_put_registers()
277 wreg(cpu_state->hvf->fd, HV_X86_DR3, env->dr[3]); in hvf_put_registers()
278 wreg(cpu_state->hvf->fd, HV_X86_DR4, env->dr[4]); in hvf_put_registers()
[all …]
H A Dhvf.c84 wreg(cpu->hvf->fd, HV_X86_TPR, tpr); in vmx_update_tpr()
86 wvmcs(cpu->hvf->fd, VMCS_TPR_THRESHOLD, 0); in vmx_update_tpr()
96 int tpr = rreg(cpu->hvf->fd, HV_X86_TPR) >> 4; in update_apic_tpr()
258 wvmcs(cpu->hvf->fd, VMCS_PIN_BASED_CTLS, in hvf_arch_init_vcpu()
263 wvmcs(cpu->hvf->fd, VMCS_PRI_PROC_BASED_CTLS, in hvf_arch_init_vcpu()
270 wvmcs(cpu->hvf->fd, VMCS_SEC_PROC_BASED_CTLS, in hvf_arch_init_vcpu()
278 wvmcs(cpu->hvf->fd, VMCS_TPR_THRESHOLD, 0); in hvf_arch_init_vcpu()
442 rip = rreg(cpu->hvf->fd, HV_X86_RIP); in hvf_vcpu_exec()
545 wreg(cpu->hvf->fd, HV_X86_RAX, rax); in hvf_vcpu_exec()
657 wreg(cpu->hvf->fd, HV_X86_RAX, 0); in hvf_vcpu_exec()
[all …]
H A Dx86.c65 base = rvmcs(cpu->hvf->fd, VMCS_GUEST_GDTR_BASE); in x86_read_segment_descriptor()
66 limit = rvmcs(cpu->hvf->fd, VMCS_GUEST_GDTR_LIMIT); in x86_read_segment_descriptor()
68 base = rvmcs(cpu->hvf->fd, VMCS_GUEST_LDTR_BASE); in x86_read_segment_descriptor()
69 limit = rvmcs(cpu->hvf->fd, VMCS_GUEST_LDTR_LIMIT); in x86_read_segment_descriptor()
88 base = rvmcs(cpu->hvf->fd, VMCS_GUEST_GDTR_BASE); in x86_write_segment_descriptor()
89 limit = rvmcs(cpu->hvf->fd, VMCS_GUEST_GDTR_LIMIT); in x86_write_segment_descriptor()
91 base = rvmcs(cpu->hvf->fd, VMCS_GUEST_LDTR_BASE); in x86_write_segment_descriptor()
92 limit = rvmcs(cpu->hvf->fd, VMCS_GUEST_LDTR_LIMIT); in x86_write_segment_descriptor()
121 uint64_t cr0 = rvmcs(cpu->hvf->fd, VMCS_GUEST_CR0); in x86_is_protected()
152 uint64_t cr0 = rvmcs(cpu->hvf->fd, VMCS_GUEST_CR0); in x86_is_paging_mode()
[all …]
H A Dx86_descr.c51 return (uint32_t)rvmcs(cpu->hvf->fd, vmx_segment_fields[seg].limit);
61 return rvmcs(cpu->hvf->fd, vmx_segment_fields[seg].base);
67 sel.sel = rvmcs(cpu->hvf->fd, vmx_segment_fields[seg].selector);
78 desc->sel = rvmcs(cpu->hvf->fd, vmx_segment_fields[seg].selector);
79 desc->base = rvmcs(cpu->hvf->fd, vmx_segment_fields[seg].base);
80 desc->limit = rvmcs(cpu->hvf->fd, vmx_segment_fields[seg].limit);
81 desc->ar = rvmcs(cpu->hvf->fd, vmx_segment_fields[seg].ar_bytes);
88 wvmcs(cpu->hvf->fd, sf->base, desc->base);
89 wvmcs(cpu->hvf->fd, sf->limit, desc->limit);
90 wvmcs(cpu->hvf->fd, sf->selector, desc->sel);
[all …]
H A Dvmx.h184 wreg(cpu->hvf->fd, HV_X86_RIP, rip); in macvm_set_rip()
188 val = rvmcs(cpu->hvf->fd, VMCS_GUEST_INTERRUPTIBILITY); in macvm_set_rip()
192 wvmcs(cpu->hvf->fd, VMCS_GUEST_INTERRUPTIBILITY, in macvm_set_rip()
204 uint32_t gi = (uint32_t) rvmcs(cpu->hvf->fd, VMCS_GUEST_INTERRUPTIBILITY); in vmx_clear_nmi_blocking()
206 wvmcs(cpu->hvf->fd, VMCS_GUEST_INTERRUPTIBILITY, gi); in vmx_clear_nmi_blocking()
215 uint32_t gi = (uint32_t)rvmcs(cpu->hvf->fd, VMCS_GUEST_INTERRUPTIBILITY); in vmx_set_nmi_blocking()
217 wvmcs(cpu->hvf->fd, VMCS_GUEST_INTERRUPTIBILITY, gi); in vmx_set_nmi_blocking()
223 val = rvmcs(cpu->hvf->fd, VMCS_PRI_PROC_BASED_CTLS); in vmx_set_nmi_window_exiting()
224 wvmcs(cpu->hvf->fd, VMCS_PRI_PROC_BASED_CTLS, val | in vmx_set_nmi_window_exiting()
233 val = rvmcs(cpu->hvf->fd, VMCS_PRI_PROC_BASED_CTLS); in vmx_clear_nmi_window_exiting()
[all …]
/dports/emulators/qemu/qemu-6.2.0/target/i386/hvf/
H A Dx86hvf.c102 macvm_set_cr4(cpu_state->hvf->fd, env->cr[4]); in hvf_put_segments()
103 macvm_set_cr0(cpu_state->hvf->fd, env->cr[0]); in hvf_put_segments()
129 hv_vcpu_flush(cpu_state->hvf->fd); in hvf_put_segments()
264 wreg(cpu_state->hvf->fd, HV_X86_RIP, env->eip); in hvf_put_registers()
266 wreg(cpu_state->hvf->fd, HV_X86_XCR0, env->xcr0); in hvf_put_registers()
274 wreg(cpu_state->hvf->fd, HV_X86_DR0, env->dr[0]); in hvf_put_registers()
275 wreg(cpu_state->hvf->fd, HV_X86_DR1, env->dr[1]); in hvf_put_registers()
276 wreg(cpu_state->hvf->fd, HV_X86_DR2, env->dr[2]); in hvf_put_registers()
277 wreg(cpu_state->hvf->fd, HV_X86_DR3, env->dr[3]); in hvf_put_registers()
278 wreg(cpu_state->hvf->fd, HV_X86_DR4, env->dr[4]); in hvf_put_registers()
[all …]
H A Dhvf.c84 wreg(cpu->hvf->fd, HV_X86_TPR, tpr); in vmx_update_tpr()
86 wvmcs(cpu->hvf->fd, VMCS_TPR_THRESHOLD, 0); in vmx_update_tpr()
96 int tpr = rreg(cpu->hvf->fd, HV_X86_TPR) >> 4; in update_apic_tpr()
258 wvmcs(cpu->hvf->fd, VMCS_PIN_BASED_CTLS, in hvf_arch_init_vcpu()
263 wvmcs(cpu->hvf->fd, VMCS_PRI_PROC_BASED_CTLS, in hvf_arch_init_vcpu()
270 wvmcs(cpu->hvf->fd, VMCS_SEC_PROC_BASED_CTLS, in hvf_arch_init_vcpu()
278 wvmcs(cpu->hvf->fd, VMCS_TPR_THRESHOLD, 0); in hvf_arch_init_vcpu()
442 rip = rreg(cpu->hvf->fd, HV_X86_RIP); in hvf_vcpu_exec()
545 wreg(cpu->hvf->fd, HV_X86_RAX, rax); in hvf_vcpu_exec()
657 wreg(cpu->hvf->fd, HV_X86_RAX, 0); in hvf_vcpu_exec()
[all …]
H A Dx86.c65 base = rvmcs(cpu->hvf->fd, VMCS_GUEST_GDTR_BASE); in x86_read_segment_descriptor()
66 limit = rvmcs(cpu->hvf->fd, VMCS_GUEST_GDTR_LIMIT); in x86_read_segment_descriptor()
68 base = rvmcs(cpu->hvf->fd, VMCS_GUEST_LDTR_BASE); in x86_read_segment_descriptor()
69 limit = rvmcs(cpu->hvf->fd, VMCS_GUEST_LDTR_LIMIT); in x86_read_segment_descriptor()
88 base = rvmcs(cpu->hvf->fd, VMCS_GUEST_GDTR_BASE); in x86_write_segment_descriptor()
89 limit = rvmcs(cpu->hvf->fd, VMCS_GUEST_GDTR_LIMIT); in x86_write_segment_descriptor()
91 base = rvmcs(cpu->hvf->fd, VMCS_GUEST_LDTR_BASE); in x86_write_segment_descriptor()
92 limit = rvmcs(cpu->hvf->fd, VMCS_GUEST_LDTR_LIMIT); in x86_write_segment_descriptor()
121 uint64_t cr0 = rvmcs(cpu->hvf->fd, VMCS_GUEST_CR0); in x86_is_protected()
152 uint64_t cr0 = rvmcs(cpu->hvf->fd, VMCS_GUEST_CR0); in x86_is_paging_mode()
[all …]
H A Dx86_descr.c51 return (uint32_t)rvmcs(cpu->hvf->fd, vmx_segment_fields[seg].limit); in vmx_read_segment_limit()
61 return rvmcs(cpu->hvf->fd, vmx_segment_fields[seg].base); in vmx_read_segment_base()
67 sel.sel = rvmcs(cpu->hvf->fd, vmx_segment_fields[seg].selector); in vmx_read_segment_selector()
78 desc->sel = rvmcs(cpu->hvf->fd, vmx_segment_fields[seg].selector); in vmx_read_segment_descriptor()
79 desc->base = rvmcs(cpu->hvf->fd, vmx_segment_fields[seg].base); in vmx_read_segment_descriptor()
80 desc->limit = rvmcs(cpu->hvf->fd, vmx_segment_fields[seg].limit); in vmx_read_segment_descriptor()
81 desc->ar = rvmcs(cpu->hvf->fd, vmx_segment_fields[seg].ar_bytes); in vmx_read_segment_descriptor()
88 wvmcs(cpu->hvf->fd, sf->base, desc->base); in vmx_write_segment_descriptor()
89 wvmcs(cpu->hvf->fd, sf->limit, desc->limit); in vmx_write_segment_descriptor()
90 wvmcs(cpu->hvf->fd, sf->selector, desc->sel); in vmx_write_segment_descriptor()
[all …]
H A Dvmx.h184 wreg(cpu->hvf->fd, HV_X86_RIP, rip); in macvm_set_rip()
188 val = rvmcs(cpu->hvf->fd, VMCS_GUEST_INTERRUPTIBILITY); in macvm_set_rip()
192 wvmcs(cpu->hvf->fd, VMCS_GUEST_INTERRUPTIBILITY, in macvm_set_rip()
204 uint32_t gi = (uint32_t) rvmcs(cpu->hvf->fd, VMCS_GUEST_INTERRUPTIBILITY); in vmx_clear_nmi_blocking()
206 wvmcs(cpu->hvf->fd, VMCS_GUEST_INTERRUPTIBILITY, gi); in vmx_clear_nmi_blocking()
215 uint32_t gi = (uint32_t)rvmcs(cpu->hvf->fd, VMCS_GUEST_INTERRUPTIBILITY); in vmx_set_nmi_blocking()
217 wvmcs(cpu->hvf->fd, VMCS_GUEST_INTERRUPTIBILITY, gi); in vmx_set_nmi_blocking()
223 val = rvmcs(cpu->hvf->fd, VMCS_PRI_PROC_BASED_CTLS); in vmx_set_nmi_window_exiting()
224 wvmcs(cpu->hvf->fd, VMCS_PRI_PROC_BASED_CTLS, val | in vmx_set_nmi_window_exiting()
233 val = rvmcs(cpu->hvf->fd, VMCS_PRI_PROC_BASED_CTLS); in vmx_clear_nmi_window_exiting()
[all …]
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/arm/hvf/
H A Dhvf.c330 ret = hv_vcpu_get_reg(cpu->hvf->fd, HV_REG_FPCR, &val); in hvf_get_registers()
335 ret = hv_vcpu_get_reg(cpu->hvf->fd, HV_REG_FPSR, &val); in hvf_get_registers()
605 hv_vcpus_exit(&cpu->hvf->fd, 1); in hvf_kick_vcpu_thread()
1019 pselect(0, 0, 0, 0, ts, &cpu->hvf->unblock_ipi_mask); in hvf_wait_for_ipi()
1082 if (!cpu->hvf->vtimer_masked) { in hvf_sync_vtimer()
1096 hv_vcpu_set_vtimer_mask(cpu->hvf->fd, false); in hvf_sync_vtimer()
1097 cpu->hvf->vtimer_masked = false; in hvf_sync_vtimer()
1105 hv_vcpu_exit_t *hvf_exit = cpu->hvf->exit; in hvf_vcpu_exec()
1120 assert_hvf_ok(hv_vcpu_run(cpu->hvf->fd)); in hvf_vcpu_exec()
1134 cpu->hvf->vtimer_masked = true; in hvf_vcpu_exec()
[all …]
/dports/emulators/qemu/qemu-6.2.0/target/arm/hvf/
H A Dhvf.c330 ret = hv_vcpu_get_reg(cpu->hvf->fd, HV_REG_FPCR, &val); in hvf_get_registers()
335 ret = hv_vcpu_get_reg(cpu->hvf->fd, HV_REG_FPSR, &val); in hvf_get_registers()
605 hv_vcpus_exit(&cpu->hvf->fd, 1); in hvf_kick_vcpu_thread()
1019 pselect(0, 0, 0, 0, ts, &cpu->hvf->unblock_ipi_mask); in hvf_wait_for_ipi()
1082 if (!cpu->hvf->vtimer_masked) { in hvf_sync_vtimer()
1096 hv_vcpu_set_vtimer_mask(cpu->hvf->fd, false); in hvf_sync_vtimer()
1097 cpu->hvf->vtimer_masked = false; in hvf_sync_vtimer()
1105 hv_vcpu_exit_t *hvf_exit = cpu->hvf->exit; in hvf_vcpu_exec()
1120 assert_hvf_ok(hv_vcpu_run(cpu->hvf->fd)); in hvf_vcpu_exec()
1134 cpu->hvf->vtimer_masked = true; in hvf_vcpu_exec()
[all …]
/dports/emulators/qemu/qemu-6.2.0/accel/hvf/
H A Dhvf-accel-ops.c366 hv_return_t ret = hv_vcpu_destroy(cpu->hvf->fd); in hvf_vcpu_destroy()
370 g_free(cpu->hvf); in hvf_vcpu_destroy()
371 cpu->hvf = NULL; in hvf_vcpu_destroy()
378 cpu->hvf = g_malloc0(sizeof(*cpu->hvf)); in hvf_init_vcpu()
387 pthread_sigmask(SIG_BLOCK, NULL, &cpu->hvf->unblock_ipi_mask); in hvf_init_vcpu()
388 sigdelset(&cpu->hvf->unblock_ipi_mask, SIG_IPI); in hvf_init_vcpu()
391 r = hv_vcpu_create(&cpu->hvf->fd, (hv_vcpu_exit_t **)&cpu->hvf->exit, NULL); in hvf_init_vcpu()
393 r = hv_vcpu_create((hv_vcpuid_t *)&cpu->hvf->fd, HV_VCPU_DEFAULT); in hvf_init_vcpu()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/accel/hvf/
H A Dhvf-accel-ops.c358 hv_return_t ret = hv_vcpu_destroy(cpu->hvf->fd); in hvf_vcpu_destroy()
362 g_free(cpu->hvf); in hvf_vcpu_destroy()
363 cpu->hvf = NULL; in hvf_vcpu_destroy()
370 cpu->hvf = g_malloc0(sizeof(*cpu->hvf)); in hvf_init_vcpu()
379 pthread_sigmask(SIG_BLOCK, NULL, &cpu->hvf->unblock_ipi_mask); in hvf_init_vcpu()
380 sigdelset(&cpu->hvf->unblock_ipi_mask, SIG_IPI); in hvf_init_vcpu()
383 r = hv_vcpu_create(&cpu->hvf->fd, (hv_vcpu_exit_t **)&cpu->hvf->exit, NULL); in hvf_init_vcpu()
385 r = hv_vcpu_create((hv_vcpuid_t *)&cpu->hvf->fd, HV_VCPU_DEFAULT); in hvf_init_vcpu()
/dports/java/openjdk11/jdk11u-jdk-11.0.13-8-1/test/jdk/java/rmi/Naming/
H A DUnderscoreHost.java81 HostVerifyingSocketFactory hvf = new HostVerifyingSocketFactory(); in main() local
82 RMISocketFactory.setSocketFactory(hvf); in main()
98 if (!hvf.host.equals(HOSTNAME)) { in main()
101 hvf.host + ":" + HOSTNAME); in main()
/dports/java/openjdk13/jdk13u-jdk-13.0.10-1-1/test/jdk/java/rmi/Naming/
H A DUnderscoreHost.java81 HostVerifyingSocketFactory hvf = new HostVerifyingSocketFactory(); in main() local
82 RMISocketFactory.setSocketFactory(hvf); in main()
98 if (!hvf.host.equals(HOSTNAME)) { in main()
101 hvf.host + ":" + HOSTNAME); in main()
/dports/java/openjdk11-jre/jdk11u-jdk-11.0.13-8-1/test/jdk/java/rmi/Naming/
H A DUnderscoreHost.java81 HostVerifyingSocketFactory hvf = new HostVerifyingSocketFactory(); in main() local
82 RMISocketFactory.setSocketFactory(hvf); in main()
98 if (!hvf.host.equals(HOSTNAME)) { in main()
101 hvf.host + ":" + HOSTNAME); in main()
/dports/java/openjdk12/openjdk-jdk12u-jdk-12.0.2-10-4/test/jdk/java/rmi/Naming/
H A DUnderscoreHost.java81 HostVerifyingSocketFactory hvf = new HostVerifyingSocketFactory(); in main() local
82 RMISocketFactory.setSocketFactory(hvf); in main()
98 if (!hvf.host.equals(HOSTNAME)) { in main()
101 hvf.host + ":" + HOSTNAME); in main()
/dports/java/openjdk15/jdk15u-jdk-15.0.6-1-1/test/jdk/java/rmi/Naming/
H A DUnderscoreHost.java81 HostVerifyingSocketFactory hvf = new HostVerifyingSocketFactory(); in main() local
82 RMISocketFactory.setSocketFactory(hvf); in main()
98 if (!hvf.host.equals(HOSTNAME)) { in main()
101 hvf.host + ":" + HOSTNAME); in main()
/dports/java/openjdk16/jdk16u-jdk-16.0.2-7-1/test/jdk/java/rmi/Naming/
H A DUnderscoreHost.java81 HostVerifyingSocketFactory hvf = new HostVerifyingSocketFactory(); in main() local
82 RMISocketFactory.setSocketFactory(hvf); in main()
98 if (!hvf.host.equals(HOSTNAME)) { in main()
101 hvf.host + ":" + HOSTNAME); in main()
/dports/java/openjdk14/jdk14u-jdk-14.0.2-12-1/test/jdk/java/rmi/Naming/
H A DUnderscoreHost.java81 HostVerifyingSocketFactory hvf = new HostVerifyingSocketFactory(); in main() local
82 RMISocketFactory.setSocketFactory(hvf); in main()
98 if (!hvf.host.equals(HOSTNAME)) { in main()
101 hvf.host + ":" + HOSTNAME); in main()
/dports/java/openjdk8/jdk8u-jdk8u312-b07.1/jdk/test/java/rmi/Naming/
H A DUnderscoreHost.java77 HostVerifyingSocketFactory hvf = new HostVerifyingSocketFactory(); in main() local
78 RMISocketFactory.setSocketFactory(hvf); in main()
94 if (!hvf.host.equals(HOSTNAME)) { in main()
97 hvf.host + ":" + HOSTNAME); in main()
/dports/java/openjdk17/jdk17u-jdk-17.0.1-12-1/test/jdk/java/rmi/Naming/
H A DUnderscoreHost.java81 HostVerifyingSocketFactory hvf = new HostVerifyingSocketFactory(); in main() local
82 RMISocketFactory.setSocketFactory(hvf); in main()
98 if (!hvf.host.equals(HOSTNAME)) { in main()
101 hvf.host + ":" + HOSTNAME); in main()
/dports/java/openjdk8-jre/jdk8u-jdk8u312-b07.1/jdk/test/java/rmi/Naming/
H A DUnderscoreHost.java77 HostVerifyingSocketFactory hvf = new HostVerifyingSocketFactory(); in main() local
78 RMISocketFactory.setSocketFactory(hvf); in main()
94 if (!hvf.host.equals(HOSTNAME)) { in main()
97 hvf.host + ":" + HOSTNAME); in main()
/dports/emulators/qemu5/qemu-5.2.0/target/i386/hvf/
H A Dmeson.build1 i386_softmmu_ss.add(when: [hvf, 'CONFIG_HVF'], if_true: files(
2 'hvf.c',
3 'hvf-cpus.c',

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