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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/Hexagon/vect/
H A Dvect-bad-bitcast.ll8i16] [i16 0, i16 0, i16 0, i16 1280, i16 2560, i16 4864, i16 7168, i16 9472, i16 11776, i16 12672,…
28 …%_low_half = shufflevector <4 x i16> %WaterLeveldB.1p_vsel.lcssa, <4 x i16> undef, <2 x i32> <i32 …
31 %1 = select <2 x i1> %0, <2 x i16> %_low_half, <2 x i16> %_high_half
34 %4 = icmp sgt i16 %2, %3
35 %5 = select i1 %4, i16 %2, i16 %3
36 %conv9 = sext i16 %5 to i32
40 …%WaterLeveldB.1p_vsel35 = phi <4 x i16> [ <i16 -32768, i16 -32768, i16 -32768, i16 -32768>, %entry…
41 …%scevgep.phi = phi i16* [ getelementptr inbounds ([256 x i16], [256 x i16]* @input_buf, i32 0, i32…
43 %vector_ptr = bitcast i16* %scevgep.phi to <4 x i16>*
44 %_p_vec_full = load <4 x i16>, <4 x i16>* %vector_ptr, align 8
[all …]
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/Hexagon/vect/
H A Dvect-bad-bitcast.ll8i16] [i16 0, i16 0, i16 0, i16 1280, i16 2560, i16 4864, i16 7168, i16 9472, i16 11776, i16 12672,…
28 …%_low_half = shufflevector <4 x i16> %WaterLeveldB.1p_vsel.lcssa, <4 x i16> undef, <2 x i32> <i32 …
31 %1 = select <2 x i1> %0, <2 x i16> %_low_half, <2 x i16> %_high_half
34 %4 = icmp sgt i16 %2, %3
35 %5 = select i1 %4, i16 %2, i16 %3
36 %conv9 = sext i16 %5 to i32
40 …%WaterLeveldB.1p_vsel35 = phi <4 x i16> [ <i16 -32768, i16 -32768, i16 -32768, i16 -32768>, %entry…
41 …%scevgep.phi = phi i16* [ getelementptr inbounds ([256 x i16], [256 x i16]* @input_buf, i32 0, i32…
43 %vector_ptr = bitcast i16* %scevgep.phi to <4 x i16>*
44 %_p_vec_full = load <4 x i16>, <4 x i16>* %vector_ptr, align 8
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/Hexagon/vect/
H A Dvect-bad-bitcast.ll8i16] [i16 0, i16 0, i16 0, i16 1280, i16 2560, i16 4864, i16 7168, i16 9472, i16 11776, i16 12672,…
28 …%_low_half = shufflevector <4 x i16> %WaterLeveldB.1p_vsel.lcssa, <4 x i16> undef, <2 x i32> <i32 …
31 %1 = select <2 x i1> %0, <2 x i16> %_low_half, <2 x i16> %_high_half
34 %4 = icmp sgt i16 %2, %3
35 %5 = select i1 %4, i16 %2, i16 %3
36 %conv9 = sext i16 %5 to i32
40 …%WaterLeveldB.1p_vsel35 = phi <4 x i16> [ <i16 -32768, i16 -32768, i16 -32768, i16 -32768>, %entry…
41 …%scevgep.phi = phi i16* [ getelementptr inbounds ([256 x i16], [256 x i16]* @input_buf, i32 0, i32…
43 %vector_ptr = bitcast i16* %scevgep.phi to <4 x i16>*
44 %_p_vec_full = load <4 x i16>, <4 x i16>* %vector_ptr, align 8
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/Hexagon/vect/
H A Dvect-bad-bitcast.ll8i16] [i16 0, i16 0, i16 0, i16 1280, i16 2560, i16 4864, i16 7168, i16 9472, i16 11776, i16 12672,…
28 …%_low_half = shufflevector <4 x i16> %WaterLeveldB.1p_vsel.lcssa, <4 x i16> undef, <2 x i32> <i32 …
31 %1 = select <2 x i1> %0, <2 x i16> %_low_half, <2 x i16> %_high_half
34 %4 = icmp sgt i16 %2, %3
35 %5 = select i1 %4, i16 %2, i16 %3
36 %conv9 = sext i16 %5 to i32
40 …%WaterLeveldB.1p_vsel35 = phi <4 x i16> [ <i16 -32768, i16 -32768, i16 -32768, i16 -32768>, %entry…
41 …%scevgep.phi = phi i16* [ getelementptr inbounds ([256 x i16], [256 x i16]* @input_buf, i32 0, i32…
43 %vector_ptr = bitcast i16* %scevgep.phi to <4 x i16>*
44 %_p_vec_full = load <4 x i16>, <4 x i16>* %vector_ptr, align 8
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/Hexagon/vect/
H A Dvect-bad-bitcast.ll8i16] [i16 0, i16 0, i16 0, i16 1280, i16 2560, i16 4864, i16 7168, i16 9472, i16 11776, i16 12672,…
28 …%_low_half = shufflevector <4 x i16> %WaterLeveldB.1p_vsel.lcssa, <4 x i16> undef, <2 x i32> <i32 …
31 %1 = select <2 x i1> %0, <2 x i16> %_low_half, <2 x i16> %_high_half
34 %4 = icmp sgt i16 %2, %3
35 %5 = select i1 %4, i16 %2, i16 %3
36 %conv9 = sext i16 %5 to i32
40 …%WaterLeveldB.1p_vsel35 = phi <4 x i16> [ <i16 -32768, i16 -32768, i16 -32768, i16 -32768>, %entry…
41 …%scevgep.phi = phi i16* [ getelementptr inbounds ([256 x i16], [256 x i16]* @input_buf, i32 0, i32…
43 %vector_ptr = bitcast i16* %scevgep.phi to <4 x i16>*
44 %_p_vec_full = load <4 x i16>, <4 x i16>* %vector_ptr, align 8
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/Hexagon/vect/
H A Dvect-bad-bitcast.ll8i16] [i16 0, i16 0, i16 0, i16 1280, i16 2560, i16 4864, i16 7168, i16 9472, i16 11776, i16 12672,…
28 …%_low_half = shufflevector <4 x i16> %WaterLeveldB.1p_vsel.lcssa, <4 x i16> undef, <2 x i32> <i32 …
31 %1 = select <2 x i1> %0, <2 x i16> %_low_half, <2 x i16> %_high_half
34 %4 = icmp sgt i16 %2, %3
35 %5 = select i1 %4, i16 %2, i16 %3
36 %conv9 = sext i16 %5 to i32
40 …%WaterLeveldB.1p_vsel35 = phi <4 x i16> [ <i16 -32768, i16 -32768, i16 -32768, i16 -32768>, %entry…
41 …%scevgep.phi = phi i16* [ getelementptr inbounds ([256 x i16], [256 x i16]* @input_buf, i32 0, i32…
43 %vector_ptr = bitcast i16* %scevgep.phi to <4 x i16>*
44 %_p_vec_full = load <4 x i16>, <4 x i16>* %vector_ptr, align 8
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/Hexagon/vect/
H A Dvect-bad-bitcast.ll8i16] [i16 0, i16 0, i16 0, i16 1280, i16 2560, i16 4864, i16 7168, i16 9472, i16 11776, i16 12672,…
28 …%_low_half = shufflevector <4 x i16> %WaterLeveldB.1p_vsel.lcssa, <4 x i16> undef, <2 x i32> <i32 …
31 %1 = select <2 x i1> %0, <2 x i16> %_low_half, <2 x i16> %_high_half
34 %4 = icmp sgt i16 %2, %3
35 %5 = select i1 %4, i16 %2, i16 %3
36 %conv9 = sext i16 %5 to i32
40 …%WaterLeveldB.1p_vsel35 = phi <4 x i16> [ <i16 -32768, i16 -32768, i16 -32768, i16 -32768>, %entry…
41 …%scevgep.phi = phi i16* [ getelementptr inbounds ([256 x i16], [256 x i16]* @input_buf, i32 0, i32…
43 %vector_ptr = bitcast i16* %scevgep.phi to <4 x i16>*
44 %_p_vec_full = load <4 x i16>, <4 x i16>* %vector_ptr, align 8
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/Hexagon/vect/
H A Dvect-bad-bitcast.ll8i16] [i16 0, i16 0, i16 0, i16 1280, i16 2560, i16 4864, i16 7168, i16 9472, i16 11776, i16 12672,…
28 …%_low_half = shufflevector <4 x i16> %WaterLeveldB.1p_vsel.lcssa, <4 x i16> undef, <2 x i32> <i32 …
31 %1 = select <2 x i1> %0, <2 x i16> %_low_half, <2 x i16> %_high_half
34 %4 = icmp sgt i16 %2, %3
35 %5 = select i1 %4, i16 %2, i16 %3
36 %conv9 = sext i16 %5 to i32
40 …%WaterLeveldB.1p_vsel35 = phi <4 x i16> [ <i16 -32768, i16 -32768, i16 -32768, i16 -32768>, %entry…
41 …%scevgep.phi = phi i16* [ getelementptr inbounds ([256 x i16], [256 x i16]* @input_buf, i32 0, i32…
43 %vector_ptr = bitcast i16* %scevgep.phi to <4 x i16>*
44 %_p_vec_full = load <4 x i16>, <4 x i16>* %vector_ptr, align 8
[all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/Hexagon/vect/
H A Dvect-bad-bitcast.ll8i16] [i16 0, i16 0, i16 0, i16 1280, i16 2560, i16 4864, i16 7168, i16 9472, i16 11776, i16 12672,…
28 …%_low_half = shufflevector <4 x i16> %WaterLeveldB.1p_vsel.lcssa, <4 x i16> undef, <2 x i32> <i32 …
31 %1 = select <2 x i1> %0, <2 x i16> %_low_half, <2 x i16> %_high_half
34 %4 = icmp sgt i16 %2, %3
35 %5 = select i1 %4, i16 %2, i16 %3
36 %conv9 = sext i16 %5 to i32
40 …%WaterLeveldB.1p_vsel35 = phi <4 x i16> [ <i16 -32768, i16 -32768, i16 -32768, i16 -32768>, %entry…
41 …%scevgep.phi = phi i16* [ getelementptr inbounds ([256 x i16], [256 x i16]* @input_buf, i32 0, i32…
43 %vector_ptr = bitcast i16* %scevgep.phi to <4 x i16>*
44 %_p_vec_full = load <4 x i16>, <4 x i16>* %vector_ptr, align 8
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/Hexagon/vect/
H A Dvect-bad-bitcast.ll8i16] [i16 0, i16 0, i16 0, i16 1280, i16 2560, i16 4864, i16 7168, i16 9472, i16 11776, i16 12672,…
28 …%_low_half = shufflevector <4 x i16> %WaterLeveldB.1p_vsel.lcssa, <4 x i16> undef, <2 x i32> <i32 …
31 %1 = select <2 x i1> %0, <2 x i16> %_low_half, <2 x i16> %_high_half
34 %4 = icmp sgt i16 %2, %3
35 %5 = select i1 %4, i16 %2, i16 %3
36 %conv9 = sext i16 %5 to i32
40 …%WaterLeveldB.1p_vsel35 = phi <4 x i16> [ <i16 -32768, i16 -32768, i16 -32768, i16 -32768>, %entry…
41 …%scevgep.phi = phi i16* [ getelementptr inbounds ([256 x i16], [256 x i16]* @input_buf, i32 0, i32…
43 %vector_ptr = bitcast i16* %scevgep.phi to <4 x i16>*
44 %_p_vec_full = load <4 x i16>, <4 x i16>* %vector_ptr, align 8
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/Hexagon/vect/
H A Dvect-bad-bitcast.ll8i16] [i16 0, i16 0, i16 0, i16 1280, i16 2560, i16 4864, i16 7168, i16 9472, i16 11776, i16 12672,…
28 …%_low_half = shufflevector <4 x i16> %WaterLeveldB.1p_vsel.lcssa, <4 x i16> undef, <2 x i32> <i32 …
31 %1 = select <2 x i1> %0, <2 x i16> %_low_half, <2 x i16> %_high_half
34 %4 = icmp sgt i16 %2, %3
35 %5 = select i1 %4, i16 %2, i16 %3
36 %conv9 = sext i16 %5 to i32
40 …%WaterLeveldB.1p_vsel35 = phi <4 x i16> [ <i16 -32768, i16 -32768, i16 -32768, i16 -32768>, %entry…
41 …%scevgep.phi = phi i16* [ getelementptr inbounds ([256 x i16], [256 x i16]* @input_buf, i32 0, i32…
43 %vector_ptr = bitcast i16* %scevgep.phi to <4 x i16>*
44 %_p_vec_full = load <4 x i16>, <4 x i16>* %vector_ptr, align 8
[all …]
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/Hexagon/vect/
H A Dvect-bad-bitcast.ll8i16] [i16 0, i16 0, i16 0, i16 1280, i16 2560, i16 4864, i16 7168, i16 9472, i16 11776, i16 12672,…
28 …%_low_half = shufflevector <4 x i16> %WaterLeveldB.1p_vsel.lcssa, <4 x i16> undef, <2 x i32> <i32 …
31 %1 = select <2 x i1> %0, <2 x i16> %_low_half, <2 x i16> %_high_half
34 %4 = icmp sgt i16 %2, %3
35 %5 = select i1 %4, i16 %2, i16 %3
36 %conv9 = sext i16 %5 to i32
40 …%WaterLeveldB.1p_vsel35 = phi <4 x i16> [ <i16 -32768, i16 -32768, i16 -32768, i16 -32768>, %entry…
41 …%scevgep.phi = phi i16* [ getelementptr inbounds ([256 x i16], [256 x i16]* @input_buf, i32 0, i32…
43 %vector_ptr = bitcast i16* %scevgep.phi to <4 x i16>*
44 %_p_vec_full = load <4 x i16>, <4 x i16>* %vector_ptr, align 8
[all …]
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/Hexagon/vect/
H A Dvect-bad-bitcast.ll8i16] [i16 0, i16 0, i16 0, i16 1280, i16 2560, i16 4864, i16 7168, i16 9472, i16 11776, i16 12672,…
28 …%_low_half = shufflevector <4 x i16> %WaterLeveldB.1p_vsel.lcssa, <4 x i16> undef, <2 x i32> <i32 …
31 %1 = select <2 x i1> %0, <2 x i16> %_low_half, <2 x i16> %_high_half
34 %4 = icmp sgt i16 %2, %3
35 %5 = select i1 %4, i16 %2, i16 %3
36 %conv9 = sext i16 %5 to i32
40 …%WaterLeveldB.1p_vsel35 = phi <4 x i16> [ <i16 -32768, i16 -32768, i16 -32768, i16 -32768>, %entry…
41 …%scevgep.phi = phi i16* [ getelementptr inbounds ([256 x i16], [256 x i16]* @input_buf, i32 0, i32…
43 %vector_ptr = bitcast i16* %scevgep.phi to <4 x i16>*
44 %_p_vec_full = load <4 x i16>, <4 x i16>* %vector_ptr, align 8
[all …]
/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/Hexagon/vect/
H A Dvect-bad-bitcast.ll8i16] [i16 0, i16 0, i16 0, i16 1280, i16 2560, i16 4864, i16 7168, i16 9472, i16 11776, i16 12672,…
28 …%_low_half = shufflevector <4 x i16> %WaterLeveldB.1p_vsel.lcssa, <4 x i16> undef, <2 x i32> <i32 …
31 %1 = select <2 x i1> %0, <2 x i16> %_low_half, <2 x i16> %_high_half
34 %4 = icmp sgt i16 %2, %3
35 %5 = select i1 %4, i16 %2, i16 %3
36 %conv9 = sext i16 %5 to i32
40 …%WaterLeveldB.1p_vsel35 = phi <4 x i16> [ <i16 -32768, i16 -32768, i16 -32768, i16 -32768>, %entry…
41 …%scevgep.phi = phi i16* [ getelementptr inbounds ([256 x i16], [256 x i16]* @input_buf, i32 0, i32…
43 %vector_ptr = bitcast i16* %scevgep.phi to <4 x i16>*
44 %_p_vec_full = load <4 x i16>, <4 x i16>* %vector_ptr, align 8
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/Hexagon/vect/
H A Dvect-bad-bitcast.ll8i16] [i16 0, i16 0, i16 0, i16 1280, i16 2560, i16 4864, i16 7168, i16 9472, i16 11776, i16 12672,…
28 …%_low_half = shufflevector <4 x i16> %WaterLeveldB.1p_vsel.lcssa, <4 x i16> undef, <2 x i32> <i32 …
31 %1 = select <2 x i1> %0, <2 x i16> %_low_half, <2 x i16> %_high_half
34 %4 = icmp sgt i16 %2, %3
35 %5 = select i1 %4, i16 %2, i16 %3
36 %conv9 = sext i16 %5 to i32
40 …%WaterLeveldB.1p_vsel35 = phi <4 x i16> [ <i16 -32768, i16 -32768, i16 -32768, i16 -32768>, %entry…
41 …%scevgep.phi = phi i16* [ getelementptr inbounds ([256 x i16], [256 x i16]* @input_buf, i32 0, i32…
43 %vector_ptr = bitcast i16* %scevgep.phi to <4 x i16>*
44 %_p_vec_full = load <4 x i16>, <4 x i16>* %vector_ptr, align 8
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/MSP430/
H A DBranchSelector.ll12 store volatile i16 11, i16* @reg, align 2
13 store volatile i16 13, i16* @reg, align 2
14 store volatile i16 17, i16* @reg, align 2
15 store volatile i16 11, i16* @reg, align 2
16 store volatile i16 13, i16* @reg, align 2
17 store volatile i16 17, i16* @reg, align 2
18 store volatile i16 11, i16* @reg, align 2
19 store volatile i16 13, i16* @reg, align 2
20 store volatile i16 17, i16* @reg, align 2
21 store volatile i16 11, i16* @reg, align 2
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/MSP430/
H A DBranchSelector.ll12 store volatile i16 11, i16* @reg, align 2
13 store volatile i16 13, i16* @reg, align 2
14 store volatile i16 17, i16* @reg, align 2
15 store volatile i16 11, i16* @reg, align 2
16 store volatile i16 13, i16* @reg, align 2
17 store volatile i16 17, i16* @reg, align 2
18 store volatile i16 11, i16* @reg, align 2
19 store volatile i16 13, i16* @reg, align 2
20 store volatile i16 17, i16* @reg, align 2
21 store volatile i16 11, i16* @reg, align 2
[all …]
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/MSP430/
H A DBranchSelector.ll12 store volatile i16 11, i16* @reg, align 2
13 store volatile i16 13, i16* @reg, align 2
14 store volatile i16 17, i16* @reg, align 2
15 store volatile i16 11, i16* @reg, align 2
16 store volatile i16 13, i16* @reg, align 2
17 store volatile i16 17, i16* @reg, align 2
18 store volatile i16 11, i16* @reg, align 2
19 store volatile i16 13, i16* @reg, align 2
20 store volatile i16 17, i16* @reg, align 2
21 store volatile i16 11, i16* @reg, align 2
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/MSP430/
H A DBranchSelector.ll12 store volatile i16 11, i16* @reg, align 2
13 store volatile i16 13, i16* @reg, align 2
14 store volatile i16 17, i16* @reg, align 2
15 store volatile i16 11, i16* @reg, align 2
16 store volatile i16 13, i16* @reg, align 2
17 store volatile i16 17, i16* @reg, align 2
18 store volatile i16 11, i16* @reg, align 2
19 store volatile i16 13, i16* @reg, align 2
20 store volatile i16 17, i16* @reg, align 2
21 store volatile i16 11, i16* @reg, align 2
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/MSP430/
H A DBranchSelector.ll12 store volatile i16 11, i16* @reg, align 2
13 store volatile i16 13, i16* @reg, align 2
14 store volatile i16 17, i16* @reg, align 2
15 store volatile i16 11, i16* @reg, align 2
16 store volatile i16 13, i16* @reg, align 2
17 store volatile i16 17, i16* @reg, align 2
18 store volatile i16 11, i16* @reg, align 2
19 store volatile i16 13, i16* @reg, align 2
20 store volatile i16 17, i16* @reg, align 2
21 store volatile i16 11, i16* @reg, align 2
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/MSP430/
H A DBranchSelector.ll12 store volatile i16 11, i16* @reg, align 2
13 store volatile i16 13, i16* @reg, align 2
14 store volatile i16 17, i16* @reg, align 2
15 store volatile i16 11, i16* @reg, align 2
16 store volatile i16 13, i16* @reg, align 2
17 store volatile i16 17, i16* @reg, align 2
18 store volatile i16 11, i16* @reg, align 2
19 store volatile i16 13, i16* @reg, align 2
20 store volatile i16 17, i16* @reg, align 2
21 store volatile i16 11, i16* @reg, align 2
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/MSP430/
H A DBranchSelector.ll12 store volatile i16 11, i16* @reg, align 2
13 store volatile i16 13, i16* @reg, align 2
14 store volatile i16 17, i16* @reg, align 2
15 store volatile i16 11, i16* @reg, align 2
16 store volatile i16 13, i16* @reg, align 2
17 store volatile i16 17, i16* @reg, align 2
18 store volatile i16 11, i16* @reg, align 2
19 store volatile i16 13, i16* @reg, align 2
20 store volatile i16 17, i16* @reg, align 2
21 store volatile i16 11, i16* @reg, align 2
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/MSP430/
H A DBranchSelector.ll12 store volatile i16 11, i16* @reg, align 2
13 store volatile i16 13, i16* @reg, align 2
14 store volatile i16 17, i16* @reg, align 2
15 store volatile i16 11, i16* @reg, align 2
16 store volatile i16 13, i16* @reg, align 2
17 store volatile i16 17, i16* @reg, align 2
18 store volatile i16 11, i16* @reg, align 2
19 store volatile i16 13, i16* @reg, align 2
20 store volatile i16 17, i16* @reg, align 2
21 store volatile i16 11, i16* @reg, align 2
[all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/MSP430/
H A DBranchSelector.ll12 store volatile i16 11, i16* @reg, align 2
13 store volatile i16 13, i16* @reg, align 2
14 store volatile i16 17, i16* @reg, align 2
15 store volatile i16 11, i16* @reg, align 2
16 store volatile i16 13, i16* @reg, align 2
17 store volatile i16 17, i16* @reg, align 2
18 store volatile i16 11, i16* @reg, align 2
19 store volatile i16 13, i16* @reg, align 2
20 store volatile i16 17, i16* @reg, align 2
21 store volatile i16 11, i16* @reg, align 2
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/MSP430/
H A DBranchSelector.ll12 store volatile i16 11, i16* @reg, align 2
13 store volatile i16 13, i16* @reg, align 2
14 store volatile i16 17, i16* @reg, align 2
15 store volatile i16 11, i16* @reg, align 2
16 store volatile i16 13, i16* @reg, align 2
17 store volatile i16 17, i16* @reg, align 2
18 store volatile i16 11, i16* @reg, align 2
19 store volatile i16 13, i16* @reg, align 2
20 store volatile i16 17, i16* @reg, align 2
21 store volatile i16 11, i16* @reg, align 2
[all …]

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