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Searched refs:i31 (Results 1 – 25 of 1568) sorted by relevance

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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/Transforms/InstCombine/
H A D	fsh.ll	7 declare <2 x i31> @llvm.fshl.v2i31(<2 x i31>, <2 x i31>, <2 x i31>) 223 …%r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> zeroinitializer, <2 x i31> %x, <2 x i31> <i31 7, i3… 232 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> undef, <2 x i31> <i31 7, i31 7>) 259 …%r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> zeroinitializer, <2 x i31> %x, <2 x i31> <i31 -1, i… 268 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> undef, <2 x i31> <i31 -1, i31 33>) 342 %z = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 7, i31 7>) 391 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 34, i31 -1>) 413 %z = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 7, i31 38>) 432 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %x, <2 x i31> <i31 32, i31 -1>) 655 …%tmp3 = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %tmp2, <2 x i31> %tmp1, <2 x i31> <i31 10, i31 1… [all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/Transforms/InstCombine/
H A D	fsh.ll	7 declare <2 x i31> @llvm.fshl.v2i31(<2 x i31>, <2 x i31>, <2 x i31>) 223 …%r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> zeroinitializer, <2 x i31> %x, <2 x i31> <i31 7, i3… 232 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> undef, <2 x i31> <i31 7, i31 7>) 259 …%r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> zeroinitializer, <2 x i31> %x, <2 x i31> <i31 -1, i… 268 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> undef, <2 x i31> <i31 -1, i31 33>) 342 %z = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 7, i31 7>) 391 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 34, i31 -1>) 413 %z = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 7, i31 38>) 432 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %x, <2 x i31> <i31 32, i31 -1>) 655 …%tmp3 = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %tmp2, <2 x i31> %tmp1, <2 x i31> <i31 10, i31 1… [all …]
/dports/devel/llvm10/llvm-10.0.1.src/test/Transforms/InstCombine/
H A D	fsh.ll	7 declare <2 x i31> @llvm.fshl.v2i31(<2 x i31>, <2 x i31>, <2 x i31>) 223 …%r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> zeroinitializer, <2 x i31> %x, <2 x i31> <i31 7, i3… 232 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> undef, <2 x i31> <i31 7, i31 7>) 259 …%r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> zeroinitializer, <2 x i31> %x, <2 x i31> <i31 -1, i… 268 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> undef, <2 x i31> <i31 -1, i31 33>) 342 %z = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 7, i31 7>) 391 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 34, i31 -1>) 413 %z = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 7, i31 38>) 432 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %x, <2 x i31> <i31 32, i31 -1>) 655 …%tmp3 = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %tmp2, <2 x i31> %tmp1, <2 x i31> <i31 10, i31 1… [all …]
/dports/devel/llvm90/llvm-9.0.1.src/test/Transforms/InstCombine/
H A D	fsh.ll	7 declare <2 x i31> @llvm.fshl.v2i31(<2 x i31>, <2 x i31>, <2 x i31>) 223 …%r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> zeroinitializer, <2 x i31> %x, <2 x i31> <i31 7, i3… 232 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> undef, <2 x i31> <i31 7, i31 7>) 259 …%r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> zeroinitializer, <2 x i31> %x, <2 x i31> <i31 -1, i… 268 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> undef, <2 x i31> <i31 -1, i31 33>) 342 %z = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 7, i31 7>) 391 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 34, i31 -1>) 413 %z = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 7, i31 38>) 432 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %x, <2 x i31> <i31 32, i31 -1>) 655 …%tmp3 = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %tmp2, <2 x i31> %tmp1, <2 x i31> <i31 10, i31 1… [all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/Transforms/InstCombine/
H A D	fsh.ll	7 declare <2 x i31> @llvm.fshl.v2i31(<2 x i31>, <2 x i31>, <2 x i31>) 223 …%r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> zeroinitializer, <2 x i31> %x, <2 x i31> <i31 7, i3… 232 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> undef, <2 x i31> <i31 7, i31 7>) 259 …%r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> zeroinitializer, <2 x i31> %x, <2 x i31> <i31 -1, i… 268 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> undef, <2 x i31> <i31 -1, i31 33>) 342 %z = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 7, i31 7>) 391 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 34, i31 -1>) 413 %z = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 7, i31 38>) 432 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %x, <2 x i31> <i31 32, i31 -1>) 655 …%tmp3 = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %tmp2, <2 x i31> %tmp1, <2 x i31> <i31 10, i31 1… [all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/Transforms/InstCombine/
H A D	fsh.ll	7 declare <2 x i31> @llvm.fshl.v2i31(<2 x i31>, <2 x i31>, <2 x i31>) 223 …%r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> zeroinitializer, <2 x i31> %x, <2 x i31> <i31 7, i3… 232 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> undef, <2 x i31> <i31 7, i31 7>) 259 …%r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> zeroinitializer, <2 x i31> %x, <2 x i31> <i31 -1, i… 268 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> undef, <2 x i31> <i31 -1, i31 33>) 342 %z = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 7, i31 7>) 407 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 34, i31 -1>) 469 %z = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 7, i31 38>) 488 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %x, <2 x i31> <i31 32, i31 -1>) 711 %t3 = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %t2, <2 x i31> %t1, <2 x i31> <i31 10, i31 10>) [all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/Transforms/InstCombine/
H A D	fsh.ll	7 declare <2 x i31> @llvm.fshl.v2i31(<2 x i31>, <2 x i31>, <2 x i31>) 223 …%r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> zeroinitializer, <2 x i31> %x, <2 x i31> <i31 7, i3… 232 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> undef, <2 x i31> <i31 7, i31 7>) 259 …%r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> zeroinitializer, <2 x i31> %x, <2 x i31> <i31 -1, i… 268 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> undef, <2 x i31> <i31 -1, i31 33>) 342 %z = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 7, i31 7>) 407 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 34, i31 -1>) 469 %z = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 7, i31 38>) 488 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %x, <2 x i31> <i31 32, i31 -1>) 711 %t3 = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %t2, <2 x i31> %t1, <2 x i31> <i31 10, i31 10>) [all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/Transforms/InstCombine/
H A D	fsh.ll	7 declare <2 x i31> @llvm.fshl.v2i31(<2 x i31>, <2 x i31>, <2 x i31>) 223 …%r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> zeroinitializer, <2 x i31> %x, <2 x i31> <i31 7, i3… 232 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> undef, <2 x i31> <i31 7, i31 7>) 259 …%r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> zeroinitializer, <2 x i31> %x, <2 x i31> <i31 -1, i… 268 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> undef, <2 x i31> <i31 -1, i31 33>) 342 %z = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 7, i31 7>) 407 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 34, i31 -1>) 469 %z = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 7, i31 38>) 488 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %x, <2 x i31> <i31 32, i31 -1>) 711 %t3 = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %t2, <2 x i31> %t1, <2 x i31> <i31 10, i31 10>) [all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/Transforms/InstCombine/
H A D	fsh.ll	7 declare <2 x i31> @llvm.fshl.v2i31(<2 x i31>, <2 x i31>, <2 x i31>) 223 …%r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> zeroinitializer, <2 x i31> %x, <2 x i31> <i31 7, i3… 232 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> undef, <2 x i31> <i31 7, i31 7>) 259 …%r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> zeroinitializer, <2 x i31> %x, <2 x i31> <i31 -1, i… 268 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> undef, <2 x i31> <i31 -1, i31 33>) 342 %z = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 7, i31 7>) 407 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 34, i31 -1>) 469 %z = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 7, i31 38>) 488 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %x, <2 x i31> <i31 32, i31 -1>) 711 %t3 = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %t2, <2 x i31> %t1, <2 x i31> <i31 10, i31 10>) [all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/Transforms/InstCombine/
H A D	fsh.ll	7 declare <2 x i31> @llvm.fshl.v2i31(<2 x i31>, <2 x i31>, <2 x i31>) 223 …%r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> zeroinitializer, <2 x i31> %x, <2 x i31> <i31 7, i3… 232 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> undef, <2 x i31> <i31 7, i31 7>) 259 …%r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> zeroinitializer, <2 x i31> %x, <2 x i31> <i31 -1, i… 268 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> undef, <2 x i31> <i31 -1, i31 33>) 342 %z = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 7, i31 7>) 407 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 34, i31 -1>) 469 %z = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 7, i31 38>) 488 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %x, <2 x i31> <i31 32, i31 -1>) 711 %t3 = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %t2, <2 x i31> %t1, <2 x i31> <i31 10, i31 10>) [all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/Transforms/InstCombine/
H A D	fsh.ll	7 declare <2 x i31> @llvm.fshl.v2i31(<2 x i31>, <2 x i31>, <2 x i31>) 223 …%r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> zeroinitializer, <2 x i31> %x, <2 x i31> <i31 7, i3… 232 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> undef, <2 x i31> <i31 7, i31 7>) 259 …%r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> zeroinitializer, <2 x i31> %x, <2 x i31> <i31 -1, i… 268 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> undef, <2 x i31> <i31 -1, i31 33>) 342 %z = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 7, i31 7>) 407 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 34, i31 -1>) 469 %z = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 7, i31 38>) 488 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %x, <2 x i31> <i31 32, i31 -1>) 711 %t3 = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %t2, <2 x i31> %t1, <2 x i31> <i31 10, i31 10>) [all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/Transforms/InstCombine/
H A D	fsh.ll	7 declare <2 x i31> @llvm.fshl.v2i31(<2 x i31>, <2 x i31>, <2 x i31>) 223 …%r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> zeroinitializer, <2 x i31> %x, <2 x i31> <i31 7, i3… 232 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> undef, <2 x i31> <i31 7, i31 7>) 259 …%r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> zeroinitializer, <2 x i31> %x, <2 x i31> <i31 -1, i… 268 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> undef, <2 x i31> <i31 -1, i31 33>) 342 %z = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 7, i31 7>) 407 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 34, i31 -1>) 469 %z = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 7, i31 38>) 488 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %x, <2 x i31> <i31 32, i31 -1>) 711 %t3 = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %t2, <2 x i31> %t1, <2 x i31> <i31 10, i31 10>) [all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/Transforms/InstCombine/
H A D	fsh.ll	7 declare <2 x i31> @llvm.fshl.v2i31(<2 x i31>, <2 x i31>, <2 x i31>) 223 …%r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> zeroinitializer, <2 x i31> %x, <2 x i31> <i31 7, i3… 232 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> undef, <2 x i31> <i31 7, i31 7>) 259 …%r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> zeroinitializer, <2 x i31> %x, <2 x i31> <i31 -1, i… 268 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> undef, <2 x i31> <i31 -1, i31 33>) 342 %z = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 7, i31 7>) 407 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 34, i31 -1>) 469 %z = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %y, <2 x i31> <i31 7, i31 38>) 488 %r = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> %x, <2 x i31> <i31 32, i31 -1>) 711 %t3 = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %t2, <2 x i31> %t1, <2 x i31> <i31 10, i31 10>) [all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/
H A D	amdgpu-codegenprepare-mul24.ll	240 define i31 @smul24_i31(i31 %lhs, i31 %rhs) { 279 define i31 @umul24_i31(i31 %lhs, i31 %rhs) { 310 define <2 x i31> @umul24_v2i31(<2 x i31> %lhs, <2 x i31> %rhs) { 355 %lhs24 = and <2 x i31> %lhs, <i31 16777215, i31 16777215> 356 %rhs24 = and <2 x i31> %rhs, <i31 16777215, i31 16777215> 361 define <2 x i31> @smul24_v2i31(<2 x i31> %lhs, <2 x i31> %rhs) { 366 ; SI-NEXT: [[RHS24:%.*]] = ashr <2 x i31> [[LHS]], <i31 8, i31 8> 412 %shl.lhs = shl <2 x i31> %lhs, <i31 8, i31 8> 413 %lhs24 = ashr <2 x i31> %shl.lhs, <i31 8, i31 8> 414 %lshr.rhs = shl <2 x i31> %rhs, <i31 8, i31 8> [all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AMDGPU/
H A D	amdgpu-codegenprepare-mul24.ll	240 define i31 @smul24_i31(i31 %lhs, i31 %rhs) { 279 define i31 @umul24_i31(i31 %lhs, i31 %rhs) { 310 define <2 x i31> @umul24_v2i31(<2 x i31> %lhs, <2 x i31> %rhs) { 355 %lhs24 = and <2 x i31> %lhs, <i31 16777215, i31 16777215> 356 %rhs24 = and <2 x i31> %rhs, <i31 16777215, i31 16777215> 361 define <2 x i31> @smul24_v2i31(<2 x i31> %lhs, <2 x i31> %rhs) { 366 ; SI-NEXT: [[RHS24:%.*]] = ashr <2 x i31> [[LHS]], <i31 8, i31 8> 412 %shl.lhs = shl <2 x i31> %lhs, <i31 8, i31 8> 413 %lhs24 = ashr <2 x i31> %shl.lhs, <i31 8, i31 8> 414 %lshr.rhs = shl <2 x i31> %rhs, <i31 8, i31 8> [all …]
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AMDGPU/
H A D	amdgpu-codegenprepare-mul24.ll	240 define i31 @smul24_i31(i31 %lhs, i31 %rhs) { 279 define i31 @umul24_i31(i31 %lhs, i31 %rhs) { 310 define <2 x i31> @umul24_v2i31(<2 x i31> %lhs, <2 x i31> %rhs) { 355 %lhs24 = and <2 x i31> %lhs, <i31 16777215, i31 16777215> 356 %rhs24 = and <2 x i31> %rhs, <i31 16777215, i31 16777215> 361 define <2 x i31> @smul24_v2i31(<2 x i31> %lhs, <2 x i31> %rhs) { 366 ; SI-NEXT: [[RHS24:%.*]] = ashr <2 x i31> [[LHS]], <i31 8, i31 8> 412 %shl.lhs = shl <2 x i31> %lhs, <i31 8, i31 8> 413 %lhs24 = ashr <2 x i31> %shl.lhs, <i31 8, i31 8> 414 %lshr.rhs = shl <2 x i31> %rhs, <i31 8, i31 8> [all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A D	amdgpu-codegenprepare-mul24.ll	240 define i31 @smul24_i31(i31 %lhs, i31 %rhs) { 279 define i31 @umul24_i31(i31 %lhs, i31 %rhs) { 310 define <2 x i31> @umul24_v2i31(<2 x i31> %lhs, <2 x i31> %rhs) { 355 %lhs24 = and <2 x i31> %lhs, <i31 16777215, i31 16777215> 356 %rhs24 = and <2 x i31> %rhs, <i31 16777215, i31 16777215> 361 define <2 x i31> @smul24_v2i31(<2 x i31> %lhs, <2 x i31> %rhs) { 366 ; SI-NEXT: [[RHS24:%.*]] = ashr <2 x i31> [[LHS]], <i31 8, i31 8> 412 %shl.lhs = shl <2 x i31> %lhs, <i31 8, i31 8> 413 %lhs24 = ashr <2 x i31> %shl.lhs, <i31 8, i31 8> 414 %lshr.rhs = shl <2 x i31> %rhs, <i31 8, i31 8> [all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/
H A D	amdgpu-codegenprepare-mul24.ll	240 define i31 @smul24_i31(i31 %lhs, i31 %rhs) { 279 define i31 @umul24_i31(i31 %lhs, i31 %rhs) { 310 define <2 x i31> @umul24_v2i31(<2 x i31> %lhs, <2 x i31> %rhs) { 355 %lhs24 = and <2 x i31> %lhs, <i31 16777215, i31 16777215> 356 %rhs24 = and <2 x i31> %rhs, <i31 16777215, i31 16777215> 361 define <2 x i31> @smul24_v2i31(<2 x i31> %lhs, <2 x i31> %rhs) { 366 ; SI-NEXT: [[RHS24:%.*]] = ashr <2 x i31> [[LHS]], <i31 8, i31 8> 412 %shl.lhs = shl <2 x i31> %lhs, <i31 8, i31 8> 413 %lhs24 = ashr <2 x i31> %shl.lhs, <i31 8, i31 8> 414 %lshr.rhs = shl <2 x i31> %rhs, <i31 8, i31 8> [all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A D	amdgpu-codegenprepare-mul24.ll	240 define i31 @smul24_i31(i31 %lhs, i31 %rhs) { 279 define i31 @umul24_i31(i31 %lhs, i31 %rhs) { 310 define <2 x i31> @umul24_v2i31(<2 x i31> %lhs, <2 x i31> %rhs) { 355 %lhs24 = and <2 x i31> %lhs, <i31 16777215, i31 16777215> 356 %rhs24 = and <2 x i31> %rhs, <i31 16777215, i31 16777215> 361 define <2 x i31> @smul24_v2i31(<2 x i31> %lhs, <2 x i31> %rhs) { 366 ; SI-NEXT: [[RHS24:%.*]] = ashr <2 x i31> [[LHS]], <i31 8, i31 8> 412 %shl.lhs = shl <2 x i31> %lhs, <i31 8, i31 8> 413 %lhs24 = ashr <2 x i31> %shl.lhs, <i31 8, i31 8> 414 %lshr.rhs = shl <2 x i31> %rhs, <i31 8, i31 8> [all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AMDGPU/
H A D	amdgpu-codegenprepare-mul24.ll	240 define i31 @smul24_i31(i31 %lhs, i31 %rhs) { 279 define i31 @umul24_i31(i31 %lhs, i31 %rhs) { 310 define <2 x i31> @umul24_v2i31(<2 x i31> %lhs, <2 x i31> %rhs) { 355 %lhs24 = and <2 x i31> %lhs, <i31 16777215, i31 16777215> 356 %rhs24 = and <2 x i31> %rhs, <i31 16777215, i31 16777215> 361 define <2 x i31> @smul24_v2i31(<2 x i31> %lhs, <2 x i31> %rhs) { 366 ; SI-NEXT: [[RHS24:%.*]] = ashr <2 x i31> [[LHS]], <i31 8, i31 8> 412 %shl.lhs = shl <2 x i31> %lhs, <i31 8, i31 8> 413 %lhs24 = ashr <2 x i31> %shl.lhs, <i31 8, i31 8> 414 %lshr.rhs = shl <2 x i31> %rhs, <i31 8, i31 8> [all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/
H A D	amdgpu-codegenprepare-mul24.ll	240 define i31 @smul24_i31(i31 %lhs, i31 %rhs) { 279 define i31 @umul24_i31(i31 %lhs, i31 %rhs) { 310 define <2 x i31> @umul24_v2i31(<2 x i31> %lhs, <2 x i31> %rhs) { 355 %lhs24 = and <2 x i31> %lhs, <i31 16777215, i31 16777215> 356 %rhs24 = and <2 x i31> %rhs, <i31 16777215, i31 16777215> 361 define <2 x i31> @smul24_v2i31(<2 x i31> %lhs, <2 x i31> %rhs) { 366 ; SI-NEXT: [[RHS24:%.*]] = ashr <2 x i31> [[LHS]], <i31 8, i31 8> 412 %shl.lhs = shl <2 x i31> %lhs, <i31 8, i31 8> 413 %lhs24 = ashr <2 x i31> %shl.lhs, <i31 8, i31 8> 414 %lshr.rhs = shl <2 x i31> %rhs, <i31 8, i31 8> [all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A D	amdgpu-codegenprepare-mul24.ll	240 define i31 @smul24_i31(i31 %lhs, i31 %rhs) { 279 define i31 @umul24_i31(i31 %lhs, i31 %rhs) { 310 define <2 x i31> @umul24_v2i31(<2 x i31> %lhs, <2 x i31> %rhs) { 355 %lhs24 = and <2 x i31> %lhs, <i31 16777215, i31 16777215> 356 %rhs24 = and <2 x i31> %rhs, <i31 16777215, i31 16777215> 361 define <2 x i31> @smul24_v2i31(<2 x i31> %lhs, <2 x i31> %rhs) { 366 ; SI-NEXT: [[RHS24:%.*]] = ashr <2 x i31> [[LHS]], <i31 8, i31 8> 412 %shl.lhs = shl <2 x i31> %lhs, <i31 8, i31 8> 413 %lhs24 = ashr <2 x i31> %shl.lhs, <i31 8, i31 8> 414 %lshr.rhs = shl <2 x i31> %rhs, <i31 8, i31 8> [all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A D	amdgpu-codegenprepare-mul24.ll	240 define i31 @smul24_i31(i31 %lhs, i31 %rhs) { 279 define i31 @umul24_i31(i31 %lhs, i31 %rhs) { 310 define <2 x i31> @umul24_v2i31(<2 x i31> %lhs, <2 x i31> %rhs) { 355 %lhs24 = and <2 x i31> %lhs, <i31 16777215, i31 16777215> 356 %rhs24 = and <2 x i31> %rhs, <i31 16777215, i31 16777215> 361 define <2 x i31> @smul24_v2i31(<2 x i31> %lhs, <2 x i31> %rhs) { 366 ; SI-NEXT: [[RHS24:%.*]] = ashr <2 x i31> [[LHS]], <i31 8, i31 8> 412 %shl.lhs = shl <2 x i31> %lhs, <i31 8, i31 8> 413 %lhs24 = ashr <2 x i31> %shl.lhs, <i31 8, i31 8> 414 %lshr.rhs = shl <2 x i31> %rhs, <i31 8, i31 8> [all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AMDGPU/
H A D	amdgpu-codegenprepare-mul24.ll	240 define i31 @smul24_i31(i31 %lhs, i31 %rhs) { 279 define i31 @umul24_i31(i31 %lhs, i31 %rhs) { 310 define <2 x i31> @umul24_v2i31(<2 x i31> %lhs, <2 x i31> %rhs) { 355 %lhs24 = and <2 x i31> %lhs, <i31 16777215, i31 16777215> 356 %rhs24 = and <2 x i31> %rhs, <i31 16777215, i31 16777215> 361 define <2 x i31> @smul24_v2i31(<2 x i31> %lhs, <2 x i31> %rhs) { 366 ; SI-NEXT: [[RHS24:%.*]] = ashr <2 x i31> [[LHS]], <i31 8, i31 8> 412 %shl.lhs = shl <2 x i31> %lhs, <i31 8, i31 8> 413 %lhs24 = ashr <2 x i31> %shl.lhs, <i31 8, i31 8> 414 %lshr.rhs = shl <2 x i31> %rhs, <i31 8, i31 8> [all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A D	amdgpu-codegenprepare-mul24.ll	240 define i31 @smul24_i31(i31 %lhs, i31 %rhs) { 279 define i31 @umul24_i31(i31 %lhs, i31 %rhs) { 310 define <2 x i31> @umul24_v2i31(<2 x i31> %lhs, <2 x i31> %rhs) { 355 %lhs24 = and <2 x i31> %lhs, <i31 16777215, i31 16777215> 356 %rhs24 = and <2 x i31> %rhs, <i31 16777215, i31 16777215> 361 define <2 x i31> @smul24_v2i31(<2 x i31> %lhs, <2 x i31> %rhs) { 366 ; SI-NEXT: [[RHS24:%.*]] = ashr <2 x i31> [[LHS]], <i31 8, i31 8> 412 %shl.lhs = shl <2 x i31> %lhs, <i31 8, i31 8> 413 %lhs24 = ashr <2 x i31> %shl.lhs, <i31 8, i31 8> 414 %lshr.rhs = shl <2 x i31> %rhs, <i31 8, i31 8> [all …]

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