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/dports/devel/llvm90/llvm-9.0.1.src/test/Transforms/ScalarizeMaskedMemIntrin/X86/
H A Dexpand-masked-load.ll90 define <2 x i48> @scalarize_v2i48(<2 x i48>* %p, <2 x i1> %mask, <2 x i48> %passthru) {
92 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
96 ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 0
97 ; CHECK-NEXT: [[TMP4:%.*]] = load i48, i48* [[TMP3]], align 2
98 ; CHECK-NEXT: [[TMP5:%.*]] = insertelement <2 x i48> [[PASSTHRU:%.*]], i48 [[TMP4]], i64 0
105 ; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 1
106 ; CHECK-NEXT: [[TMP8:%.*]] = load i48, i48* [[TMP7]], align 2
107 ; CHECK-NEXT: [[TMP9:%.*]] = insertelement <2 x i48> [[RES_PHI_ELSE]], i48 [[TMP8]], i64 1
113 …%ret = call <2 x i48> @llvm.masked.load.v2i48.p0v2i48(<2 x i48>* %p, i32 16, <2 x i1> %mask, <2 x
114 ret <2 x i48> %ret
[all …]
/dports/devel/llvm80/llvm-8.0.1.src/test/Transforms/ScalarizeMaskedMemIntrin/X86/
H A Dexpand-masked-load.ll90 define <2 x i48> @scalarize_v2i48(<2 x i48>* %p, <2 x i1> %mask, <2 x i48> %passthru) {
92 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
96 ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 0
97 ; CHECK-NEXT: [[TMP4:%.*]] = load i48, i48* [[TMP3]], align 2
98 ; CHECK-NEXT: [[TMP5:%.*]] = insertelement <2 x i48> [[PASSTHRU:%.*]], i48 [[TMP4]], i32 0
105 ; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 1
106 ; CHECK-NEXT: [[TMP8:%.*]] = load i48, i48* [[TMP7]], align 2
107 ; CHECK-NEXT: [[TMP9:%.*]] = insertelement <2 x i48> [[RES_PHI_ELSE]], i48 [[TMP8]], i32 1
113 …%ret = call <2 x i48> @llvm.masked.load.v2i48.p0v2i48(<2 x i48>* %p, i32 16, <2 x i1> %mask, <2 x
114 ret <2 x i48> %ret
[all …]
/dports/cad/verilator/verilator-4.216/test_regress/t/
H A Dt_trace_public.v57 reg [-1:-48] i48; initial i48 = '0; register
62 i48 <= ~i48;
73 reg [1:49] i48; initial i48 = '0; register
79 i48 <= ~i48;
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/
H A Dexpand-masked-load.ll96 define <2 x i48> @scalarize_v2i48(<2 x i48>* %p, <2 x i1> %mask, <2 x i48> %passthru) {
98 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
104 ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 0
105 ; CHECK-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
106 ; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i48> [[PASSTHRU:%.*]], i48 [[TMP5]], i64 0
114 ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 1
115 ; CHECK-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
116 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x i48> [[RES_PHI_ELSE]], i48 [[TMP10]], i64 1
122 …%ret = call <2 x i48> @llvm.masked.load.v2i48.p0v2i48(<2 x i48>* %p, i32 16, <2 x i1> %mask, <2 x
123 ret <2 x i48> %ret
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/
H A Dexpand-masked-load.ll97 define <2 x i48> @scalarize_v2i48(<2 x i48>* %p, <2 x i1> %mask, <2 x i48> %passthru) {
99 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
105 ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 0
106 ; CHECK-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
107 ; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i48> [[PASSTHRU:%.*]], i48 [[TMP5]], i64 0
115 ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 1
116 ; CHECK-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
117 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x i48> [[RES_PHI_ELSE]], i48 [[TMP10]], i64 1
123 …%ret = call <2 x i48> @llvm.masked.load.v2i48.p0v2i48(<2 x i48>* %p, i32 16, <2 x i1> %mask, <2 x
124 ret <2 x i48> %ret
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/
H A Dexpand-masked-load.ll97 define <2 x i48> @scalarize_v2i48(<2 x i48>* %p, <2 x i1> %mask, <2 x i48> %passthru) {
99 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
105 ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 0
106 ; CHECK-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
107 ; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i48> [[PASSTHRU:%.*]], i48 [[TMP5]], i64 0
115 ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 1
116 ; CHECK-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
117 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x i48> [[RES_PHI_ELSE]], i48 [[TMP10]], i64 1
123 …%ret = call <2 x i48> @llvm.masked.load.v2i48.p0v2i48(<2 x i48>* %p, i32 16, <2 x i1> %mask, <2 x
124 ret <2 x i48> %ret
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/Transforms/ScalarizeMaskedMemIntrin/X86/
H A Dexpand-masked-load.ll96 define <2 x i48> @scalarize_v2i48(<2 x i48>* %p, <2 x i1> %mask, <2 x i48> %passthru) {
98 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
104 ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 0
105 ; CHECK-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
106 ; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i48> [[PASSTHRU:%.*]], i48 [[TMP5]], i64 0
114 ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 1
115 ; CHECK-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
116 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x i48> [[RES_PHI_ELSE]], i48 [[TMP10]], i64 1
122 …%ret = call <2 x i48> @llvm.masked.load.v2i48.p0v2i48(<2 x i48>* %p, i32 16, <2 x i1> %mask, <2 x
123 ret <2 x i48> %ret
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/
H A Dexpand-masked-load.ll96 define <2 x i48> @scalarize_v2i48(<2 x i48>* %p, <2 x i1> %mask, <2 x i48> %passthru) {
98 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
104 ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 0
105 ; CHECK-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
106 ; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i48> [[PASSTHRU:%.*]], i48 [[TMP5]], i64 0
114 ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 1
115 ; CHECK-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
116 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x i48> [[RES_PHI_ELSE]], i48 [[TMP10]], i64 1
122 …%ret = call <2 x i48> @llvm.masked.load.v2i48.p0v2i48(<2 x i48>* %p, i32 16, <2 x i1> %mask, <2 x
123 ret <2 x i48> %ret
[all …]
/dports/devel/llvm10/llvm-10.0.1.src/test/Transforms/ScalarizeMaskedMemIntrin/X86/
H A Dexpand-masked-load.ll96 define <2 x i48> @scalarize_v2i48(<2 x i48>* %p, <2 x i1> %mask, <2 x i48> %passthru) {
98 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
104 ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 0
105 ; CHECK-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
106 ; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i48> [[PASSTHRU:%.*]], i48 [[TMP5]], i64 0
114 ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 1
115 ; CHECK-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
116 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x i48> [[RES_PHI_ELSE]], i48 [[TMP10]], i64 1
122 …%ret = call <2 x i48> @llvm.masked.load.v2i48.p0v2i48(<2 x i48>* %p, i32 16, <2 x i1> %mask, <2 x
123 ret <2 x i48> %ret
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/
H A Dexpand-masked-load.ll96 define <2 x i48> @scalarize_v2i48(<2 x i48>* %p, <2 x i1> %mask, <2 x i48> %passthru) {
98 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
104 ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 0
105 ; CHECK-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
106 ; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i48> [[PASSTHRU:%.*]], i48 [[TMP5]], i64 0
114 ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 1
115 ; CHECK-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
116 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x i48> [[RES_PHI_ELSE]], i48 [[TMP10]], i64 1
122 …%ret = call <2 x i48> @llvm.masked.load.v2i48.p0v2i48(<2 x i48>* %p, i32 16, <2 x i1> %mask, <2 x
123 ret <2 x i48> %ret
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/
H A Dexpand-masked-load.ll97 define <2 x i48> @scalarize_v2i48(<2 x i48>* %p, <2 x i1> %mask, <2 x i48> %passthru) {
99 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
105 ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 0
106 ; CHECK-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
107 ; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i48> [[PASSTHRU:%.*]], i48 [[TMP5]], i64 0
115 ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 1
116 ; CHECK-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
117 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x i48> [[RES_PHI_ELSE]], i48 [[TMP10]], i64 1
123 …%ret = call <2 x i48> @llvm.masked.load.v2i48.p0v2i48(<2 x i48>* %p, i32 16, <2 x i1> %mask, <2 x
124 ret <2 x i48> %ret
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/
H A Dexpand-masked-load.ll96 define <2 x i48> @scalarize_v2i48(<2 x i48>* %p, <2 x i1> %mask, <2 x i48> %passthru) {
98 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
104 ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 0
105 ; CHECK-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
106 ; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i48> [[PASSTHRU:%.*]], i48 [[TMP5]], i64 0
114 ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 1
115 ; CHECK-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
116 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x i48> [[RES_PHI_ELSE]], i48 [[TMP10]], i64 1
122 …%ret = call <2 x i48> @llvm.masked.load.v2i48.p0v2i48(<2 x i48>* %p, i32 16, <2 x i1> %mask, <2 x
123 ret <2 x i48> %ret
[all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/
H A Dexpand-masked-load.ll96 define <2 x i48> @scalarize_v2i48(<2 x i48>* %p, <2 x i1> %mask, <2 x i48> %passthru) {
98 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
104 ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 0
105 ; CHECK-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
106 ; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i48> [[PASSTHRU:%.*]], i48 [[TMP5]], i64 0
114 ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 1
115 ; CHECK-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
116 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x i48> [[RES_PHI_ELSE]], i48 [[TMP10]], i64 1
122 …%ret = call <2 x i48> @llvm.masked.load.v2i48.p0v2i48(<2 x i48>* %p, i32 16, <2 x i1> %mask, <2 x
123 ret <2 x i48> %ret
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/
H A Dexpand-masked-load.ll97 define <2 x i48> @scalarize_v2i48(<2 x i48>* %p, <2 x i1> %mask, <2 x i48> %passthru) {
99 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
105 ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 0
106 ; CHECK-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
107 ; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i48> [[PASSTHRU:%.*]], i48 [[TMP5]], i64 0
115 ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 1
116 ; CHECK-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
117 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x i48> [[RES_PHI_ELSE]], i48 [[TMP10]], i64 1
123 …%ret = call <2 x i48> @llvm.masked.load.v2i48.p0v2i48(<2 x i48>* %p, i32 16, <2 x i1> %mask, <2 x
124 ret <2 x i48> %ret
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/
H A Dexpand-masked-load.ll96 define <2 x i48> @scalarize_v2i48(<2 x i48>* %p, <2 x i1> %mask, <2 x i48> %passthru) {
98 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
104 ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 0
105 ; CHECK-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
106 ; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i48> [[PASSTHRU:%.*]], i48 [[TMP5]], i64 0
114 ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 1
115 ; CHECK-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
116 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x i48> [[RES_PHI_ELSE]], i48 [[TMP10]], i64 1
122 …%ret = call <2 x i48> @llvm.masked.load.v2i48.p0v2i48(<2 x i48>* %p, i32 16, <2 x i1> %mask, <2 x
123 ret <2 x i48> %ret
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/
H A Dexpand-masked-load.ll96 define <2 x i48> @scalarize_v2i48(<2 x i48>* %p, <2 x i1> %mask, <2 x i48> %passthru) {
98 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
104 ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 0
105 ; CHECK-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
106 ; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i48> [[PASSTHRU:%.*]], i48 [[TMP5]], i64 0
114 ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 1
115 ; CHECK-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
116 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x i48> [[RES_PHI_ELSE]], i48 [[TMP10]], i64 1
122 …%ret = call <2 x i48> @llvm.masked.load.v2i48.p0v2i48(<2 x i48>* %p, i32 16, <2 x i1> %mask, <2 x
123 ret <2 x i48> %ret
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/
H A Dexpand-masked-load.ll97 define <2 x i48> @scalarize_v2i48(<2 x i48>* %p, <2 x i1> %mask, <2 x i48> %passthru) {
99 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
105 ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 0
106 ; CHECK-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
107 ; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i48> [[PASSTHRU:%.*]], i48 [[TMP5]], i64 0
115 ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 1
116 ; CHECK-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
117 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x i48> [[RES_PHI_ELSE]], i48 [[TMP10]], i64 1
123 …%ret = call <2 x i48> @llvm.masked.load.v2i48.p0v2i48(<2 x i48>* %p, i32 16, <2 x i1> %mask, <2 x
124 ret <2 x i48> %ret
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/
H A Dexpand-masked-load.ll96 define <2 x i48> @scalarize_v2i48(<2 x i48>* %p, <2 x i1> %mask, <2 x i48> %passthru) {
98 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
104 ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 0
105 ; CHECK-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
106 ; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i48> [[PASSTHRU:%.*]], i48 [[TMP5]], i64 0
114 ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 1
115 ; CHECK-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
116 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x i48> [[RES_PHI_ELSE]], i48 [[TMP10]], i64 1
122 …%ret = call <2 x i48> @llvm.masked.load.v2i48.p0v2i48(<2 x i48>* %p, i32 16, <2 x i1> %mask, <2 x
123 ret <2 x i48> %ret
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/Transforms/ScalarizeMaskedMemIntrin/X86/
H A Dexpand-masked-load.ll96 define <2 x i48> @scalarize_v2i48(<2 x i48>* %p, <2 x i1> %mask, <2 x i48> %passthru) {
98 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
104 ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 0
105 ; CHECK-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
106 ; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i48> [[PASSTHRU:%.*]], i48 [[TMP5]], i64 0
114 ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 1
115 ; CHECK-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
116 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x i48> [[RES_PHI_ELSE]], i48 [[TMP10]], i64 1
122 …%ret = call <2 x i48> @llvm.masked.load.v2i48.p0v2i48(<2 x i48>* %p, i32 16, <2 x i1> %mask, <2 x
123 ret <2 x i48> %ret
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/
H A Dexpand-masked-load.ll96 define <2 x i48> @scalarize_v2i48(<2 x i48>* %p, <2 x i1> %mask, <2 x i48> %passthru) {
98 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
104 ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 0
105 ; CHECK-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
106 ; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i48> [[PASSTHRU:%.*]], i48 [[TMP5]], i64 0
114 ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 1
115 ; CHECK-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
116 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x i48> [[RES_PHI_ELSE]], i48 [[TMP10]], i64 1
122 …%ret = call <2 x i48> @llvm.masked.load.v2i48.p0v2i48(<2 x i48>* %p, i32 16, <2 x i1> %mask, <2 x
123 ret <2 x i48> %ret
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/
H A Dexpand-masked-load.ll148 define <2 x i48> @scalarize_v2i48(<2 x i48>* %p, <2 x i1> %mask, <2 x i48> %passthru) {
150 ; CHECK-LE-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
156 ; CHECK-LE-NEXT: [[TMP4:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 0
157 ; CHECK-LE-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
167 ; CHECK-LE-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
175 ; CHECK-BE-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
182 ; CHECK-BE-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
192 ; CHECK-BE-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
199 …%ret = call <2 x i48> @llvm.masked.load.v2i48.p0v2i48(<2 x i48>* %p, i32 16, <2 x i1> %mask, <2 x
200 ret <2 x i48> %ret
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/
H A Dexpand-masked-load.ll148 define <2 x i48> @scalarize_v2i48(<2 x i48>* %p, <2 x i1> %mask, <2 x i48> %passthru) {
150 ; CHECK-LE-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
156 ; CHECK-LE-NEXT: [[TMP4:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 0
157 ; CHECK-LE-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
167 ; CHECK-LE-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
175 ; CHECK-BE-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
182 ; CHECK-BE-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
192 ; CHECK-BE-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
199 …%ret = call <2 x i48> @llvm.masked.load.v2i48.p0v2i48(<2 x i48>* %p, i32 16, <2 x i1> %mask, <2 x
200 ret <2 x i48> %ret
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/
H A Dexpand-masked-load.ll148 define <2 x i48> @scalarize_v2i48(<2 x i48>* %p, <2 x i1> %mask, <2 x i48> %passthru) {
150 ; CHECK-LE-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
156 ; CHECK-LE-NEXT: [[TMP4:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 0
157 ; CHECK-LE-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
167 ; CHECK-LE-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
175 ; CHECK-BE-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
182 ; CHECK-BE-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
192 ; CHECK-BE-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
199 …%ret = call <2 x i48> @llvm.masked.load.v2i48.p0v2i48(<2 x i48>* %p, i32 16, <2 x i1> %mask, <2 x
200 ret <2 x i48> %ret
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/
H A Dexpand-masked-load.ll148 define <2 x i48> @scalarize_v2i48(<2 x i48>* %p, <2 x i1> %mask, <2 x i48> %passthru) {
150 ; CHECK-LE-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
156 ; CHECK-LE-NEXT: [[TMP4:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 0
157 ; CHECK-LE-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
167 ; CHECK-LE-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
175 ; CHECK-BE-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
182 ; CHECK-BE-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
192 ; CHECK-BE-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
199 …%ret = call <2 x i48> @llvm.masked.load.v2i48.p0v2i48(<2 x i48>* %p, i32 16, <2 x i1> %mask, <2 x
200 ret <2 x i48> %ret
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/
H A Dexpand-masked-load.ll148 define <2 x i48> @scalarize_v2i48(<2 x i48>* %p, <2 x i1> %mask, <2 x i48> %passthru) {
150 ; CHECK-LE-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
156 ; CHECK-LE-NEXT: [[TMP4:%.*]] = getelementptr inbounds i48, i48* [[TMP1]], i32 0
157 ; CHECK-LE-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
167 ; CHECK-LE-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
175 ; CHECK-BE-NEXT: [[TMP1:%.*]] = bitcast <2 x i48>* [[P:%.*]] to i48*
182 ; CHECK-BE-NEXT: [[TMP5:%.*]] = load i48, i48* [[TMP4]], align 2
192 ; CHECK-BE-NEXT: [[TMP10:%.*]] = load i48, i48* [[TMP9]], align 2
199 …%ret = call <2 x i48> @llvm.masked.load.v2i48.p0v2i48(<2 x i48>* %p, i32 16, <2 x i1> %mask, <2 x
200 ret <2 x i48> %ret
[all …]

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