| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/Transforms/ConstantHoisting/AArch64/ |
| H A D | large-immediate.ll | 12 define i512 @test2(i512 %a) nounwind {
14 ; CHECK-NOT: %const = bitcast i512 7 to i512
15 %1 = and i512 %a, 7
16 %2 = or i512 %1, 7
17 ret i512 %2
21 define i512 @test3(i512 %a) nounwind {
23 ; CHECK-NOT: %const = bitcast i512 504 to i512
24 %1 = shl i512 %a, 504
25 %2 = ashr i512 %1, 504
26 ret i512 %2
|
| /dports/devel/llvm10/llvm-10.0.1.src/test/Transforms/ConstantHoisting/AArch64/ |
| H A D | large-immediate.ll | 12 define i512 @test2(i512 %a) nounwind {
14 ; CHECK-NOT: %const = bitcast i512 7 to i512
15 %1 = and i512 %a, 7
16 %2 = or i512 %1, 7
17 ret i512 %2
21 define i512 @test3(i512 %a) nounwind {
23 ; CHECK-NOT: %const = bitcast i512 504 to i512
24 %1 = shl i512 %a, 504
25 %2 = ashr i512 %1, 504
26 ret i512 %2
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/Transforms/ConstantHoisting/AArch64/ |
| H A D | large-immediate.ll | 12 define i512 @test2(i512 %a) nounwind {
14 ; CHECK-NOT: %const = bitcast i512 7 to i512
15 %1 = and i512 %a, 7
16 %2 = or i512 %1, 7
17 ret i512 %2
21 define i512 @test3(i512 %a) nounwind {
23 ; CHECK-NOT: %const = bitcast i512 504 to i512
24 %1 = shl i512 %a, 504
25 %2 = ashr i512 %1, 504
26 ret i512 %2
|
| /dports/devel/llvm11/llvm-11.0.1.src/test/Transforms/ConstantHoisting/AArch64/ |
| H A D | large-immediate.ll | 12 define i512 @test2(i512 %a) nounwind {
14 ; CHECK-NOT: %const = bitcast i512 7 to i512
15 %1 = and i512 %a, 7
16 %2 = or i512 %1, 7
17 ret i512 %2
21 define i512 @test3(i512 %a) nounwind {
23 ; CHECK-NOT: %const = bitcast i512 504 to i512
24 %1 = shl i512 %a, 504
25 %2 = ashr i512 %1, 504
26 ret i512 %2
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/Transforms/ConstantHoisting/AArch64/ |
| H A D | large-immediate.ll | 12 define i512 @test2(i512 %a) nounwind {
14 ; CHECK-NOT: %const = bitcast i512 7 to i512
15 %1 = and i512 %a, 7
16 %2 = or i512 %1, 7
17 ret i512 %2
21 define i512 @test3(i512 %a) nounwind {
23 ; CHECK-NOT: %const = bitcast i512 504 to i512
24 %1 = shl i512 %a, 504
25 %2 = ashr i512 %1, 504
26 ret i512 %2
|
| /dports/devel/llvm90/llvm-9.0.1.src/test/Transforms/ConstantHoisting/AArch64/ |
| H A D | large-immediate.ll | 12 define i512 @test2(i512 %a) nounwind {
14 ; CHECK-NOT: %const = bitcast i512 7 to i512
15 %1 = and i512 %a, 7
16 %2 = or i512 %1, 7
17 ret i512 %2
21 define i512 @test3(i512 %a) nounwind {
23 ; CHECK-NOT: %const = bitcast i512 504 to i512
24 %1 = shl i512 %a, 504
25 %2 = ashr i512 %1, 504
26 ret i512 %2
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/Transforms/ConstantHoisting/AArch64/ |
| H A D | large-immediate.ll | 12 define i512 @test2(i512 %a) nounwind {
14 ; CHECK-NOT: %const = bitcast i512 7 to i512
15 %1 = and i512 %a, 7
16 %2 = or i512 %1, 7
17 ret i512 %2
21 define i512 @test3(i512 %a) nounwind {
23 ; CHECK-NOT: %const = bitcast i512 504 to i512
24 %1 = shl i512 %a, 504
25 %2 = ashr i512 %1, 504
26 ret i512 %2
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/Transforms/ConstantHoisting/AArch64/ |
| H A D | large-immediate.ll | 12 define i512 @test2(i512 %a) nounwind {
14 ; CHECK-NOT: %const = bitcast i512 7 to i512
15 %1 = and i512 %a, 7
16 %2 = or i512 %1, 7
17 ret i512 %2
21 define i512 @test3(i512 %a) nounwind {
23 ; CHECK-NOT: %const = bitcast i512 504 to i512
24 %1 = shl i512 %a, 504
25 %2 = ashr i512 %1, 504
26 ret i512 %2
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/Transforms/ConstantHoisting/AArch64/ |
| H A D | large-immediate.ll | 12 define i512 @test2(i512 %a) nounwind {
14 ; CHECK-NOT: %const = bitcast i512 7 to i512
15 %1 = and i512 %a, 7
16 %2 = or i512 %1, 7
17 ret i512 %2
21 define i512 @test3(i512 %a) nounwind {
23 ; CHECK-NOT: %const = bitcast i512 504 to i512
24 %1 = shl i512 %a, 504
25 %2 = ashr i512 %1, 504
26 ret i512 %2
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/Transforms/ConstantHoisting/AArch64/ |
| H A D | large-immediate.ll | 12 define i512 @test2(i512 %a) nounwind {
14 ; CHECK-NOT: %const = bitcast i512 7 to i512
15 %1 = and i512 %a, 7
16 %2 = or i512 %1, 7
17 ret i512 %2
21 define i512 @test3(i512 %a) nounwind {
23 ; CHECK-NOT: %const = bitcast i512 504 to i512
24 %1 = shl i512 %a, 504
25 %2 = ashr i512 %1, 504
26 ret i512 %2
|
| /dports/devel/llvm80/llvm-8.0.1.src/test/Transforms/ConstantHoisting/AArch64/ |
| H A D | large-immediate.ll | 12 define i512 @test2(i512 %a) nounwind {
14 ; CHECK-NOT: %const = bitcast i512 7 to i512
15 %1 = and i512 %a, 7
16 %2 = or i512 %1, 7
17 ret i512 %2
21 define i512 @test3(i512 %a) nounwind {
23 ; CHECK-NOT: %const = bitcast i512 504 to i512
24 %1 = shl i512 %a, 504
25 %2 = ashr i512 %1, 504
26 ret i512 %2
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/Transforms/ConstantHoisting/AArch64/ |
| H A D | large-immediate.ll | 12 define i512 @test2(i512 %a) nounwind {
14 ; CHECK-NOT: %const = bitcast i512 7 to i512
15 %1 = and i512 %a, 7
16 %2 = or i512 %1, 7
17 ret i512 %2
21 define i512 @test3(i512 %a) nounwind {
23 ; CHECK-NOT: %const = bitcast i512 504 to i512
24 %1 = shl i512 %a, 504
25 %2 = ashr i512 %1, 504
26 ret i512 %2
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/test/Transforms/ConstantHoisting/AArch64/ |
| H A D | large-immediate.ll | 12 define i512 @test2(i512 %a) nounwind {
14 ; CHECK-NOT: %const = bitcast i512 7 to i512
15 %1 = and i512 %a, 7
16 %2 = or i512 %1, 7
17 ret i512 %2
21 define i512 @test3(i512 %a) nounwind {
23 ; CHECK-NOT: %const = bitcast i512 504 to i512
24 %1 = shl i512 %a, 504
25 %2 = ashr i512 %1, 504
26 ret i512 %2
|
| /dports/devel/llvm70/llvm-7.0.1.src/test/Transforms/ConstantHoisting/AArch64/ |
| H A D | large-immediate.ll | 12 define i512 @test2(i512 %a) nounwind {
14 ; CHECK-NOT: %const = bitcast i512 7 to i512
15 %1 = and i512 %a, 7
16 %2 = or i512 %1, 7
17 ret i512 %2
21 define i512 @test3(i512 %a) nounwind {
23 ; CHECK-NOT: %const = bitcast i512 504 to i512
24 %1 = shl i512 %a, 504
25 %2 = ashr i512 %1, 504
26 ret i512 %2
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/Transforms/ConstantHoisting/AArch64/ |
| H A D | large-immediate.ll | 12 define i512 @test2(i512 %a) nounwind {
14 ; CHECK-NOT: %const = bitcast i512 7 to i512
15 %1 = and i512 %a, 7
16 %2 = or i512 %1, 7
17 ret i512 %2
21 define i512 @test3(i512 %a) nounwind {
23 ; CHECK-NOT: %const = bitcast i512 504 to i512
24 %1 = shl i512 %a, 504
25 %2 = ashr i512 %1, 504
26 ret i512 %2
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/ |
| H A D | ls64-inline-asm.ll | 19 %outcast = bitcast %struct.foo* %output to i512*
20 store i512 %val, i512* %outcast, align 8
36 %incast = bitcast %struct.foo* %input to i512*
37 %val = load i512, i512* %incast, align 8
85 %s.sroa.9.0.insert.ext = zext i64 %conv17 to i512
88 %s.sroa.8.0.insert.ext = zext i64 %conv14 to i512
91 %s.sroa.7.0.insert.ext = zext i64 %conv11 to i512
94 %s.sroa.6.0.insert.ext = zext i64 %conv8 to i512
97 %s.sroa.5.0.insert.ext = zext i64 %conv5 to i512
99 %s.sroa.4.0.insert.ext = zext i64 %conv2 to i512
[all …]
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AArch64/ |
| H A D | ls64-inline-asm.ll | 19 %outcast = bitcast %struct.foo* %output to i512*
20 store i512 %val, i512* %outcast, align 8
36 %incast = bitcast %struct.foo* %input to i512*
37 %val = load i512, i512* %incast, align 8
85 %s.sroa.9.0.insert.ext = zext i64 %conv17 to i512
88 %s.sroa.8.0.insert.ext = zext i64 %conv14 to i512
91 %s.sroa.7.0.insert.ext = zext i64 %conv11 to i512
94 %s.sroa.6.0.insert.ext = zext i64 %conv8 to i512
97 %s.sroa.5.0.insert.ext = zext i64 %conv5 to i512
99 %s.sroa.4.0.insert.ext = zext i64 %conv2 to i512
[all …]
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AArch64/ |
| H A D | ls64-inline-asm.ll | 19 %outcast = bitcast %struct.foo* %output to i512*
20 store i512 %val, i512* %outcast, align 8
36 %incast = bitcast %struct.foo* %input to i512*
37 %val = load i512, i512* %incast, align 8
85 %s.sroa.9.0.insert.ext = zext i64 %conv17 to i512
88 %s.sroa.8.0.insert.ext = zext i64 %conv14 to i512
91 %s.sroa.7.0.insert.ext = zext i64 %conv11 to i512
94 %s.sroa.6.0.insert.ext = zext i64 %conv8 to i512
97 %s.sroa.5.0.insert.ext = zext i64 %conv5 to i512
99 %s.sroa.4.0.insert.ext = zext i64 %conv2 to i512
[all …]
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/ |
| H A D | ls64-inline-asm.ll | 19 %outcast = bitcast %struct.foo* %output to i512*
20 store i512 %val, i512* %outcast, align 8
36 %incast = bitcast %struct.foo* %input to i512*
37 %val = load i512, i512* %incast, align 8
85 %s.sroa.9.0.insert.ext = zext i64 %conv17 to i512
88 %s.sroa.8.0.insert.ext = zext i64 %conv14 to i512
91 %s.sroa.7.0.insert.ext = zext i64 %conv11 to i512
94 %s.sroa.6.0.insert.ext = zext i64 %conv8 to i512
97 %s.sroa.5.0.insert.ext = zext i64 %conv5 to i512
99 %s.sroa.4.0.insert.ext = zext i64 %conv2 to i512
[all …]
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/ |
| H A D | ls64-inline-asm.ll | 19 %outcast = bitcast %struct.foo* %output to i512*
20 store i512 %val, i512* %outcast, align 8
36 %incast = bitcast %struct.foo* %input to i512*
37 %val = load i512, i512* %incast, align 8
85 %s.sroa.9.0.insert.ext = zext i64 %conv17 to i512
88 %s.sroa.8.0.insert.ext = zext i64 %conv14 to i512
91 %s.sroa.7.0.insert.ext = zext i64 %conv11 to i512
94 %s.sroa.6.0.insert.ext = zext i64 %conv8 to i512
97 %s.sroa.5.0.insert.ext = zext i64 %conv5 to i512
99 %s.sroa.4.0.insert.ext = zext i64 %conv2 to i512
[all …]
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/X86/ |
| H A D | mem-promote-integers.ll | 73 define <1 x i512> @test_1xi512(<1 x i512> %x, <1 x i512>* %b) {
74 %bb = load <1 x i512>, <1 x i512>* %b
76 store <1 x i512> %tt, <1 x i512>* %b
150 define <2 x i512> @test_2xi512(<2 x i512> %x, <2 x i512>* %b) {
151 %bb = load <2 x i512>, <2 x i512>* %b
153 store <2 x i512> %tt, <2 x i512>* %b
227 define <3 x i512> @test_3xi512(<3 x i512> %x, <3 x i512>* %b) {
230 store <3 x i512> %tt, <3 x i512>* %b
304 define <4 x i512> @test_4xi512(<4 x i512> %x, <4 x i512>* %b) {
307 store <4 x i512> %tt, <4 x i512>* %b
[all …]
|
| /dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/X86/ |
| H A D | mem-promote-integers.ll | 73 define <1 x i512> @test_1xi512(<1 x i512> %x, <1 x i512>* %b) {
74 %bb = load <1 x i512>, <1 x i512>* %b
76 store <1 x i512> %tt, <1 x i512>* %b
150 define <2 x i512> @test_2xi512(<2 x i512> %x, <2 x i512>* %b) {
151 %bb = load <2 x i512>, <2 x i512>* %b
153 store <2 x i512> %tt, <2 x i512>* %b
227 define <3 x i512> @test_3xi512(<3 x i512> %x, <3 x i512>* %b) {
230 store <3 x i512> %tt, <3 x i512>* %b
304 define <4 x i512> @test_4xi512(<4 x i512> %x, <4 x i512>* %b) {
307 store <4 x i512> %tt, <4 x i512>* %b
[all …]
|
| /dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/X86/ |
| H A D | mem-promote-integers.ll | 73 define <1 x i512> @test_1xi512(<1 x i512> %x, <1 x i512>* %b) {
74 %bb = load <1 x i512>, <1 x i512>* %b
76 store <1 x i512> %tt, <1 x i512>* %b
150 define <2 x i512> @test_2xi512(<2 x i512> %x, <2 x i512>* %b) {
151 %bb = load <2 x i512>, <2 x i512>* %b
153 store <2 x i512> %tt, <2 x i512>* %b
227 define <3 x i512> @test_3xi512(<3 x i512> %x, <3 x i512>* %b) {
230 store <3 x i512> %tt, <3 x i512>* %b
304 define <4 x i512> @test_4xi512(<4 x i512> %x, <4 x i512>* %b) {
307 store <4 x i512> %tt, <4 x i512>* %b
[all …]
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/X86/ |
| H A D | mem-promote-integers.ll | 73 define <1 x i512> @test_1xi512(<1 x i512> %x, <1 x i512>* %b) {
74 %bb = load <1 x i512>, <1 x i512>* %b
76 store <1 x i512> %tt, <1 x i512>* %b
150 define <2 x i512> @test_2xi512(<2 x i512> %x, <2 x i512>* %b) {
151 %bb = load <2 x i512>, <2 x i512>* %b
153 store <2 x i512> %tt, <2 x i512>* %b
227 define <3 x i512> @test_3xi512(<3 x i512> %x, <3 x i512>* %b) {
230 store <3 x i512> %tt, <3 x i512>* %b
304 define <4 x i512> @test_4xi512(<4 x i512> %x, <4 x i512>* %b) {
307 store <4 x i512> %tt, <4 x i512>* %b
[all …]
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/X86/ |
| H A D | mem-promote-integers.ll | 73 define <1 x i512> @test_1xi512(<1 x i512> %x, <1 x i512>* %b) {
74 %bb = load <1 x i512>, <1 x i512>* %b
76 store <1 x i512> %tt, <1 x i512>* %b
150 define <2 x i512> @test_2xi512(<2 x i512> %x, <2 x i512>* %b) {
151 %bb = load <2 x i512>, <2 x i512>* %b
153 store <2 x i512> %tt, <2 x i512>* %b
227 define <3 x i512> @test_3xi512(<3 x i512> %x, <3 x i512>* %b) {
230 store <3 x i512> %tt, <3 x i512>* %b
304 define <4 x i512> @test_4xi512(<4 x i512> %x, <4 x i512>* %b) {
307 store <4 x i512> %tt, <4 x i512>* %b
[all …]
|