Searched refs:i5_tlast (Results 1 – 2 of 2) sorted by relevance
| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/fifo/ |
| H A D | axi_mux8.v | 21 input [WIDTH-1:0] i5_tdata, input i5_tlast, input i5_tvalid, output i5_tready, port
44 .i1_tdata(i5_tdata), .i1_tlast(i5_tlast), .i1_tvalid(i5_tvalid), .i1_tready(i5_tready),
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/x300/ |
| H A D | x300_pcie_int.v | 299 ….i5_tdata({3'd5, `GET_DMA_BUS(dmatx_tdata_gt,5)}), .i5_tlast(dmatx_tlast_gt[5]), .i5_tvalid(dmatx_…
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