| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/X86/ |
| H A D | pr13220.ll | 4 define <8 x i32> @foo(<8 x i96> %x) {
5 %a = lshr <8 x i96> %x, <i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1>
6 %b = trunc <8 x i96> %a to <8 x i32>
17 …%a = lshr <8 x i96> <i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4>, <i96 1, i96 1, i96 1…
18 %b = trunc <8 x i96> %a to <8 x i32>
|
| /dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/X86/ |
| H A D | pr13220.ll | 4 define <8 x i32> @foo(<8 x i96> %x) {
5 %a = lshr <8 x i96> %x, <i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1>
6 %b = trunc <8 x i96> %a to <8 x i32>
17 …%a = lshr <8 x i96> <i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4>, <i96 1, i96 1, i96 1…
18 %b = trunc <8 x i96> %a to <8 x i32>
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/X86/ |
| H A D | pr13220.ll | 4 define <8 x i32> @foo(<8 x i96> %x) {
5 %a = lshr <8 x i96> %x, <i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1>
6 %b = trunc <8 x i96> %a to <8 x i32>
17 …%a = lshr <8 x i96> <i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4>, <i96 1, i96 1, i96 1…
18 %b = trunc <8 x i96> %a to <8 x i32>
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/X86/ |
| H A D | pr13220.ll | 4 define <8 x i32> @foo(<8 x i96> %x) {
5 %a = lshr <8 x i96> %x, <i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1>
6 %b = trunc <8 x i96> %a to <8 x i32>
17 …%a = lshr <8 x i96> <i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4>, <i96 1, i96 1, i96 1…
18 %b = trunc <8 x i96> %a to <8 x i32>
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/X86/ |
| H A D | pr13220.ll | 4 define <8 x i32> @foo(<8 x i96> %x) {
5 %a = lshr <8 x i96> %x, <i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1>
6 %b = trunc <8 x i96> %a to <8 x i32>
17 …%a = lshr <8 x i96> <i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4>, <i96 1, i96 1, i96 1…
18 %b = trunc <8 x i96> %a to <8 x i32>
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/X86/ |
| H A D | pr13220.ll | 4 define <8 x i32> @foo(<8 x i96> %x) {
5 %a = lshr <8 x i96> %x, <i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1>
6 %b = trunc <8 x i96> %a to <8 x i32>
17 …%a = lshr <8 x i96> <i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4>, <i96 1, i96 1, i96 1…
18 %b = trunc <8 x i96> %a to <8 x i32>
|
| /dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/X86/ |
| H A D | pr13220.ll | 4 define <8 x i32> @foo(<8 x i96> %x) {
5 %a = lshr <8 x i96> %x, <i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1>
6 %b = trunc <8 x i96> %a to <8 x i32>
17 …%a = lshr <8 x i96> <i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4>, <i96 1, i96 1, i96 1…
18 %b = trunc <8 x i96> %a to <8 x i32>
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/X86/ |
| H A D | pr13220.ll | 4 define <8 x i32> @foo(<8 x i96> %x) {
5 %a = lshr <8 x i96> %x, <i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1>
6 %b = trunc <8 x i96> %a to <8 x i32>
17 …%a = lshr <8 x i96> <i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4>, <i96 1, i96 1, i96 1…
18 %b = trunc <8 x i96> %a to <8 x i32>
|
| /dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/X86/ |
| H A D | pr13220.ll | 4 define <8 x i32> @foo(<8 x i96> %x) {
5 %a = lshr <8 x i96> %x, <i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1>
6 %b = trunc <8 x i96> %a to <8 x i32>
17 …%a = lshr <8 x i96> <i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4>, <i96 1, i96 1, i96 1…
18 %b = trunc <8 x i96> %a to <8 x i32>
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/X86/ |
| H A D | pr13220.ll | 4 define <8 x i32> @foo(<8 x i96> %x) {
5 %a = lshr <8 x i96> %x, <i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1>
6 %b = trunc <8 x i96> %a to <8 x i32>
17 …%a = lshr <8 x i96> <i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4>, <i96 1, i96 1, i96 1…
18 %b = trunc <8 x i96> %a to <8 x i32>
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/X86/ |
| H A D | pr13220.ll | 4 define <8 x i32> @foo(<8 x i96> %x) {
5 %a = lshr <8 x i96> %x, <i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1>
6 %b = trunc <8 x i96> %a to <8 x i32>
17 …%a = lshr <8 x i96> <i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4>, <i96 1, i96 1, i96 1…
18 %b = trunc <8 x i96> %a to <8 x i32>
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/X86/ |
| H A D | pr13220.ll | 4 define <8 x i32> @foo(<8 x i96> %x) {
5 %a = lshr <8 x i96> %x, <i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1>
6 %b = trunc <8 x i96> %a to <8 x i32>
17 …%a = lshr <8 x i96> <i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4>, <i96 1, i96 1, i96 1…
18 %b = trunc <8 x i96> %a to <8 x i32>
|
| /dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/X86/ |
| H A D | pr13220.ll | 4 define <8 x i32> @foo(<8 x i96> %x) {
5 %a = lshr <8 x i96> %x, <i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1>
6 %b = trunc <8 x i96> %a to <8 x i32>
17 …%a = lshr <8 x i96> <i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4>, <i96 1, i96 1, i96 1…
18 %b = trunc <8 x i96> %a to <8 x i32>
|
| /dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/X86/ |
| H A D | pr13220.ll | 4 define <8 x i32> @foo(<8 x i96> %x) {
5 %a = lshr <8 x i96> %x, <i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1>
6 %b = trunc <8 x i96> %a to <8 x i32>
17 …%a = lshr <8 x i96> <i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4>, <i96 1, i96 1, i96 1…
18 %b = trunc <8 x i96> %a to <8 x i32>
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/X86/ |
| H A D | pr13220.ll | 4 define <8 x i32> @foo(<8 x i96> %x) {
5 %a = lshr <8 x i96> %x, <i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1, i96 1>
6 %b = trunc <8 x i96> %a to <8 x i32>
17 …%a = lshr <8 x i96> <i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4, i96 4>, <i96 1, i96 1, i96 1…
18 %b = trunc <8 x i96> %a to <8 x i32>
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/Hexagon/ |
| H A D | combiner-lts.ll | 26 %v3 = zext i32 %a0 to i96
27 %v4 = load i96, i96* %v2, align 4
31 %v8 = or i96 %v7, %v6
32 store i96 %v8, i96* %v2, align 4
42 %v12 = load i96, i96* %v11, align 4
45 %v15 = zext i32 %v14 to i96
48 %v18 = or i96 %v16, %v17
49 store i96 %v18, i96* %v2, align 4
50 %v19 = load i96, i96* %v11, align 4
53 %v22 = or i96 %v21, %v20
[all …]
|
| /dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/Hexagon/ |
| H A D | combiner-lts.ll | 26 %v3 = zext i32 %a0 to i96
27 %v4 = load i96, i96* %v2, align 4
31 %v8 = or i96 %v7, %v6
32 store i96 %v8, i96* %v2, align 4
42 %v12 = load i96, i96* %v11, align 4
45 %v15 = zext i32 %v14 to i96
48 %v18 = or i96 %v16, %v17
49 store i96 %v18, i96* %v2, align 4
50 %v19 = load i96, i96* %v11, align 4
53 %v22 = or i96 %v21, %v20
[all …]
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/Hexagon/ |
| H A D | combiner-lts.ll | 26 %v3 = zext i32 %a0 to i96
27 %v4 = load i96, i96* %v2, align 4
31 %v8 = or i96 %v7, %v6
32 store i96 %v8, i96* %v2, align 4
42 %v12 = load i96, i96* %v11, align 4
45 %v15 = zext i32 %v14 to i96
48 %v18 = or i96 %v16, %v17
49 store i96 %v18, i96* %v2, align 4
50 %v19 = load i96, i96* %v11, align 4
53 %v22 = or i96 %v21, %v20
[all …]
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/Hexagon/ |
| H A D | combiner-lts.ll | 26 %v3 = zext i32 %a0 to i96
27 %v4 = load i96, i96* %v2, align 4
31 %v8 = or i96 %v7, %v6
32 store i96 %v8, i96* %v2, align 4
42 %v12 = load i96, i96* %v11, align 4
45 %v15 = zext i32 %v14 to i96
48 %v18 = or i96 %v16, %v17
49 store i96 %v18, i96* %v2, align 4
50 %v19 = load i96, i96* %v11, align 4
53 %v22 = or i96 %v21, %v20
[all …]
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/Hexagon/ |
| H A D | combiner-lts.ll | 26 %v3 = zext i32 %a0 to i96
27 %v4 = load i96, i96* %v2, align 4
31 %v8 = or i96 %v7, %v6
32 store i96 %v8, i96* %v2, align 4
42 %v12 = load i96, i96* %v11, align 4
45 %v15 = zext i32 %v14 to i96
48 %v18 = or i96 %v16, %v17
49 store i96 %v18, i96* %v2, align 4
50 %v19 = load i96, i96* %v11, align 4
53 %v22 = or i96 %v21, %v20
[all …]
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/Hexagon/ |
| H A D | combiner-lts.ll | 26 %v3 = zext i32 %a0 to i96
27 %v4 = load i96, i96* %v2, align 4
31 %v8 = or i96 %v7, %v6
32 store i96 %v8, i96* %v2, align 4
42 %v12 = load i96, i96* %v11, align 4
45 %v15 = zext i32 %v14 to i96
48 %v18 = or i96 %v16, %v17
49 store i96 %v18, i96* %v2, align 4
50 %v19 = load i96, i96* %v11, align 4
53 %v22 = or i96 %v21, %v20
[all …]
|
| /dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/Hexagon/ |
| H A D | combiner-lts.ll | 26 %v3 = zext i32 %a0 to i96
27 %v4 = load i96, i96* %v2, align 4
31 %v8 = or i96 %v7, %v6
32 store i96 %v8, i96* %v2, align 4
42 %v12 = load i96, i96* %v11, align 4
45 %v15 = zext i32 %v14 to i96
48 %v18 = or i96 %v16, %v17
49 store i96 %v18, i96* %v2, align 4
50 %v19 = load i96, i96* %v11, align 4
53 %v22 = or i96 %v21, %v20
[all …]
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/Hexagon/ |
| H A D | combiner-lts.ll | 26 %v3 = zext i32 %a0 to i96
27 %v4 = load i96, i96* %v2, align 4
31 %v8 = or i96 %v7, %v6
32 store i96 %v8, i96* %v2, align 4
42 %v12 = load i96, i96* %v11, align 4
45 %v15 = zext i32 %v14 to i96
48 %v18 = or i96 %v16, %v17
49 store i96 %v18, i96* %v2, align 4
50 %v19 = load i96, i96* %v11, align 4
53 %v22 = or i96 %v21, %v20
[all …]
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/Hexagon/ |
| H A D | combiner-lts.ll | 26 %v3 = zext i32 %a0 to i96
27 %v4 = load i96, i96* %v2, align 4
31 %v8 = or i96 %v7, %v6
32 store i96 %v8, i96* %v2, align 4
42 %v12 = load i96, i96* %v11, align 4
45 %v15 = zext i32 %v14 to i96
48 %v18 = or i96 %v16, %v17
49 store i96 %v18, i96* %v2, align 4
50 %v19 = load i96, i96* %v11, align 4
53 %v22 = or i96 %v21, %v20
[all …]
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/Hexagon/ |
| H A D | combiner-lts.ll | 26 %v3 = zext i32 %a0 to i96
27 %v4 = load i96, i96* %v2, align 4
31 %v8 = or i96 %v7, %v6
32 store i96 %v8, i96* %v2, align 4
42 %v12 = load i96, i96* %v11, align 4
45 %v15 = zext i32 %v14 to i96
48 %v18 = or i96 %v16, %v17
49 store i96 %v18, i96* %v2, align 4
50 %v19 = load i96, i96* %v11, align 4
53 %v22 = or i96 %v21, %v20
[all …]
|