/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/Transforms/InstCombine/ |
H A D | dce-iterate.ll | 6 %sx3435 = zext i64 %sx34 to i960 ; <i960> [#uses=1] 8 %sy2223 = zext i64 %sy22 to i960 ; <i960> [#uses=1] 9 %sy222324 = shl i960 %sy2223, 320 ; <i960> [#uses=1] 10 %sy222324.ins = or i960 %sx3435, %sy222324 ; <i960> [#uses=1] 12 %sz1011 = zext i64 %sz10 to i960 ; <i960> [#uses=1] 13 %sz101112 = shl i960 %sz1011, 640 ; <i960> [#uses=1] 14 %sz101112.ins = or i960 %sy222324.ins, %sz101112 16 %a = trunc i960 %sz101112.ins to i64 ; <i64> [#uses=1] 18 %c = lshr i960 %sz101112.ins, 320 ; <i960> [#uses=1] 19 %d = trunc i960 %c to i64 ; <i64> [#uses=1]
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/dports/devel/llvm11/llvm-11.0.1.src/test/Transforms/InstCombine/ |
H A D | dce-iterate.ll | 6 %sx3435 = zext i64 %sx34 to i960 ; <i960> [#uses=1] 8 %sy2223 = zext i64 %sy22 to i960 ; <i960> [#uses=1] 9 %sy222324 = shl i960 %sy2223, 320 ; <i960> [#uses=1] 10 %sy222324.ins = or i960 %sx3435, %sy222324 ; <i960> [#uses=1] 12 %sz1011 = zext i64 %sz10 to i960 ; <i960> [#uses=1] 13 %sz101112 = shl i960 %sz1011, 640 ; <i960> [#uses=1] 14 %sz101112.ins = or i960 %sy222324.ins, %sz101112 16 %a = trunc i960 %sz101112.ins to i64 ; <i64> [#uses=1] 18 %c = lshr i960 %sz101112.ins, 320 ; <i960> [#uses=1] 19 %d = trunc i960 %c to i64 ; <i64> [#uses=1]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/Transforms/InstCombine/ |
H A D | dce-iterate.ll | 6 %sx3435 = zext i64 %sx34 to i960 ; <i960> [#uses=1] 8 %sy2223 = zext i64 %sy22 to i960 ; <i960> [#uses=1] 9 %sy222324 = shl i960 %sy2223, 320 ; <i960> [#uses=1] 10 %sy222324.ins = or i960 %sx3435, %sy222324 ; <i960> [#uses=1] 12 %sz1011 = zext i64 %sz10 to i960 ; <i960> [#uses=1] 13 %sz101112 = shl i960 %sz1011, 640 ; <i960> [#uses=1] 14 %sz101112.ins = or i960 %sy222324.ins, %sz101112 16 %a = trunc i960 %sz101112.ins to i64 ; <i64> [#uses=1] 18 %c = lshr i960 %sz101112.ins, 320 ; <i960> [#uses=1] 19 %d = trunc i960 %c to i64 ; <i64> [#uses=1]
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/Transforms/InstCombine/ |
H A D | dce-iterate.ll | 6 %sx3435 = zext i64 %sx34 to i960 ; <i960> [#uses=1] 8 %sy2223 = zext i64 %sy22 to i960 ; <i960> [#uses=1] 9 %sy222324 = shl i960 %sy2223, 320 ; <i960> [#uses=1] 10 %sy222324.ins = or i960 %sx3435, %sy222324 ; <i960> [#uses=1] 12 %sz1011 = zext i64 %sz10 to i960 ; <i960> [#uses=1] 13 %sz101112 = shl i960 %sz1011, 640 ; <i960> [#uses=1] 14 %sz101112.ins = or i960 %sy222324.ins, %sz101112 16 %a = trunc i960 %sz101112.ins to i64 ; <i64> [#uses=1] 18 %c = lshr i960 %sz101112.ins, 320 ; <i960> [#uses=1] 19 %d = trunc i960 %c to i64 ; <i64> [#uses=1]
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/dports/devel/llvm10/llvm-10.0.1.src/test/Transforms/InstCombine/ |
H A D | dce-iterate.ll | 6 %sx3435 = zext i64 %sx34 to i960 ; <i960> [#uses=1] 8 %sy2223 = zext i64 %sy22 to i960 ; <i960> [#uses=1] 9 %sy222324 = shl i960 %sy2223, 320 ; <i960> [#uses=1] 10 %sy222324.ins = or i960 %sx3435, %sy222324 ; <i960> [#uses=1] 12 %sz1011 = zext i64 %sz10 to i960 ; <i960> [#uses=1] 13 %sz101112 = shl i960 %sz1011, 640 ; <i960> [#uses=1] 14 %sz101112.ins = or i960 %sy222324.ins, %sz101112 16 %a = trunc i960 %sz101112.ins to i64 ; <i64> [#uses=1] 18 %c = lshr i960 %sz101112.ins, 320 ; <i960> [#uses=1] 19 %d = trunc i960 %c to i64 ; <i64> [#uses=1]
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/Transforms/InstCombine/ |
H A D | dce-iterate.ll | 6 %sx3435 = zext i64 %sx34 to i960 ; <i960> [#uses=1] 8 %sy2223 = zext i64 %sy22 to i960 ; <i960> [#uses=1] 9 %sy222324 = shl i960 %sy2223, 320 ; <i960> [#uses=1] 10 %sy222324.ins = or i960 %sx3435, %sy222324 ; <i960> [#uses=1] 12 %sz1011 = zext i64 %sz10 to i960 ; <i960> [#uses=1] 13 %sz101112 = shl i960 %sz1011, 640 ; <i960> [#uses=1] 14 %sz101112.ins = or i960 %sy222324.ins, %sz101112 16 %a = trunc i960 %sz101112.ins to i64 ; <i64> [#uses=1] 18 %c = lshr i960 %sz101112.ins, 320 ; <i960> [#uses=1] 19 %d = trunc i960 %c to i64 ; <i64> [#uses=1]
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/dports/devel/llvm90/llvm-9.0.1.src/test/Transforms/InstCombine/ |
H A D | dce-iterate.ll | 6 %sx3435 = zext i64 %sx34 to i960 ; <i960> [#uses=1] 8 %sy2223 = zext i64 %sy22 to i960 ; <i960> [#uses=1] 9 %sy222324 = shl i960 %sy2223, 320 ; <i960> [#uses=1] 10 %sy222324.ins = or i960 %sx3435, %sy222324 ; <i960> [#uses=1] 12 %sz1011 = zext i64 %sz10 to i960 ; <i960> [#uses=1] 13 %sz101112 = shl i960 %sz1011, 640 ; <i960> [#uses=1] 14 %sz101112.ins = or i960 %sy222324.ins, %sz101112 16 %a = trunc i960 %sz101112.ins to i64 ; <i64> [#uses=1] 18 %c = lshr i960 %sz101112.ins, 320 ; <i960> [#uses=1] 19 %d = trunc i960 %c to i64 ; <i64> [#uses=1]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/Transforms/InstCombine/ |
H A D | dce-iterate.ll | 6 %sx3435 = zext i64 %sx34 to i960 ; <i960> [#uses=1] 8 %sy2223 = zext i64 %sy22 to i960 ; <i960> [#uses=1] 9 %sy222324 = shl i960 %sy2223, 320 ; <i960> [#uses=1] 10 %sy222324.ins = or i960 %sx3435, %sy222324 ; <i960> [#uses=1] 12 %sz1011 = zext i64 %sz10 to i960 ; <i960> [#uses=1] 13 %sz101112 = shl i960 %sz1011, 640 ; <i960> [#uses=1] 14 %sz101112.ins = or i960 %sy222324.ins, %sz101112 16 %a = trunc i960 %sz101112.ins to i64 ; <i64> [#uses=1] 18 %c = lshr i960 %sz101112.ins, 320 ; <i960> [#uses=1] 19 %d = trunc i960 %c to i64 ; <i64> [#uses=1]
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/Transforms/InstCombine/ |
H A D | dce-iterate.ll | 6 %sx3435 = zext i64 %sx34 to i960 ; <i960> [#uses=1] 8 %sy2223 = zext i64 %sy22 to i960 ; <i960> [#uses=1] 9 %sy222324 = shl i960 %sy2223, 320 ; <i960> [#uses=1] 10 %sy222324.ins = or i960 %sx3435, %sy222324 ; <i960> [#uses=1] 12 %sz1011 = zext i64 %sz10 to i960 ; <i960> [#uses=1] 13 %sz101112 = shl i960 %sz1011, 640 ; <i960> [#uses=1] 14 %sz101112.ins = or i960 %sy222324.ins, %sz101112 16 %a = trunc i960 %sz101112.ins to i64 ; <i64> [#uses=1] 18 %c = lshr i960 %sz101112.ins, 320 ; <i960> [#uses=1] 19 %d = trunc i960 %c to i64 ; <i64> [#uses=1]
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/Transforms/InstCombine/ |
H A D | dce-iterate.ll | 6 %sx3435 = zext i64 %sx34 to i960 ; <i960> [#uses=1] 8 %sy2223 = zext i64 %sy22 to i960 ; <i960> [#uses=1] 9 %sy222324 = shl i960 %sy2223, 320 ; <i960> [#uses=1] 10 %sy222324.ins = or i960 %sx3435, %sy222324 ; <i960> [#uses=1] 12 %sz1011 = zext i64 %sz10 to i960 ; <i960> [#uses=1] 13 %sz101112 = shl i960 %sz1011, 640 ; <i960> [#uses=1] 14 %sz101112.ins = or i960 %sy222324.ins, %sz101112 16 %a = trunc i960 %sz101112.ins to i64 ; <i64> [#uses=1] 18 %c = lshr i960 %sz101112.ins, 320 ; <i960> [#uses=1] 19 %d = trunc i960 %c to i64 ; <i64> [#uses=1]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/Transforms/InstCombine/ |
H A D | dce-iterate.ll | 6 %sx3435 = zext i64 %sx34 to i960 ; <i960> [#uses=1] 8 %sy2223 = zext i64 %sy22 to i960 ; <i960> [#uses=1] 9 %sy222324 = shl i960 %sy2223, 320 ; <i960> [#uses=1] 10 %sy222324.ins = or i960 %sx3435, %sy222324 ; <i960> [#uses=1] 12 %sz1011 = zext i64 %sz10 to i960 ; <i960> [#uses=1] 13 %sz101112 = shl i960 %sz1011, 640 ; <i960> [#uses=1] 14 %sz101112.ins = or i960 %sy222324.ins, %sz101112 16 %a = trunc i960 %sz101112.ins to i64 ; <i64> [#uses=1] 18 %c = lshr i960 %sz101112.ins, 320 ; <i960> [#uses=1] 19 %d = trunc i960 %c to i64 ; <i64> [#uses=1]
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/dports/devel/llvm80/llvm-8.0.1.src/test/Transforms/InstCombine/ |
H A D | dce-iterate.ll | 6 %sx3435 = zext i64 %sx34 to i960 ; <i960> [#uses=1] 8 %sy2223 = zext i64 %sy22 to i960 ; <i960> [#uses=1] 9 %sy222324 = shl i960 %sy2223, 320 ; <i960> [#uses=1] 10 %sy222324.ins = or i960 %sx3435, %sy222324 ; <i960> [#uses=1] 12 %sz1011 = zext i64 %sz10 to i960 ; <i960> [#uses=1] 13 %sz101112 = shl i960 %sz1011, 640 ; <i960> [#uses=1] 14 %sz101112.ins = or i960 %sy222324.ins, %sz101112 16 %a = trunc i960 %sz101112.ins to i64 ; <i64> [#uses=1] 18 %c = lshr i960 %sz101112.ins, 320 ; <i960> [#uses=1] 19 %d = trunc i960 %c to i64 ; <i64> [#uses=1]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/Transforms/InstCombine/ |
H A D | dce-iterate.ll | 6 %sx3435 = zext i64 %sx34 to i960 ; <i960> [#uses=1] 8 %sy2223 = zext i64 %sy22 to i960 ; <i960> [#uses=1] 9 %sy222324 = shl i960 %sy2223, 320 ; <i960> [#uses=1] 10 %sy222324.ins = or i960 %sx3435, %sy222324 ; <i960> [#uses=1] 12 %sz1011 = zext i64 %sz10 to i960 ; <i960> [#uses=1] 13 %sz101112 = shl i960 %sz1011, 640 ; <i960> [#uses=1] 14 %sz101112.ins = or i960 %sy222324.ins, %sz101112 16 %a = trunc i960 %sz101112.ins to i64 ; <i64> [#uses=1] 18 %c = lshr i960 %sz101112.ins, 320 ; <i960> [#uses=1] 19 %d = trunc i960 %c to i64 ; <i64> [#uses=1]
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/dports/devel/llvm70/llvm-7.0.1.src/test/Transforms/InstCombine/ |
H A D | dce-iterate.ll | 6 %sx3435 = zext i64 %sx34 to i960 ; <i960> [#uses=1] 8 %sy2223 = zext i64 %sy22 to i960 ; <i960> [#uses=1] 9 %sy222324 = shl i960 %sy2223, 320 ; <i960> [#uses=1] 10 %sy222324.ins = or i960 %sx3435, %sy222324 ; <i960> [#uses=1] 12 %sz1011 = zext i64 %sz10 to i960 ; <i960> [#uses=1] 13 %sz101112 = shl i960 %sz1011, 640 ; <i960> [#uses=1] 14 %sz101112.ins = or i960 %sy222324.ins, %sz101112 16 %a = trunc i960 %sz101112.ins to i64 ; <i64> [#uses=1] 18 %c = lshr i960 %sz101112.ins, 320 ; <i960> [#uses=1] 19 %d = trunc i960 %c to i64 ; <i64> [#uses=1]
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/Transforms/InstCombine/ |
H A D | dce-iterate.ll | 6 %sx3435 = zext i64 %sx34 to i960 ; <i960> [#uses=1] 8 %sy2223 = zext i64 %sy22 to i960 ; <i960> [#uses=1] 9 %sy222324 = shl i960 %sy2223, 320 ; <i960> [#uses=1] 10 %sy222324.ins = or i960 %sx3435, %sy222324 ; <i960> [#uses=1] 12 %sz1011 = zext i64 %sz10 to i960 ; <i960> [#uses=1] 13 %sz101112 = shl i960 %sz1011, 640 ; <i960> [#uses=1] 14 %sz101112.ins = or i960 %sy222324.ins, %sz101112 16 %a = trunc i960 %sz101112.ins to i64 ; <i64> [#uses=1] 18 %c = lshr i960 %sz101112.ins, 320 ; <i960> [#uses=1] 19 %d = trunc i960 %c to i64 ; <i64> [#uses=1]
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/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/i960/ |
H A D | Makefile.in | 23 I960_OBJS = i960.o cpu.o decode.o sem.o model.o mloop.o i960-desc.o 46 arch.h cpuall.h i960-sim.h i960-desc.h i960-opc.h 51 SIM_EXTRA_CLEAN = i960-clean 62 arch = i960 77 i960.o: i960.c $(I960BASE_INCLUDE_DEPS) 98 i960-clean: 110 archfile=$(CGEN_CPU_DIR)/i960.cpu \ 117 cpu=i960base mach=i960:ka_sa,i960:ca SUFFIX= \ 127 cpu=i960 mach=all \ 128 archfile=$(CGEN_CPU_DIR)/i960.cpu [all …]
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H A D | ChangeLog | 72 * i960-desc.h: Rebuild. 86 * i960-desc.c,i960-desc.h: Rebuild. 100 * sim-if.c: s/m32r/i960. s/sparc32/i960. 101 * decode.c, decode.h, i960-desc.c, i960-desc.h, i960-opc.h, model.c, 110 * arch.c,arch.h,model.c,i960-desc.c,i960-desc.h,i960-opc.h: Rebuild. 119 * arch.c,arch.h,cpu.c,i960-desc.c,i960-desc.h: Rebuild. 124 * i960-desc.c,i960-desc.h: Rebuild. 129 (SIM_EXTRA_DEPS): Replace cpu-opc.h with i960-desc.h,i960-opc.h. 134 * i960-desc.c: New file. 136 * i960-opc.h: New file. [all …]
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/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/i960/ |
H A D | Makefile.in | 23 I960_OBJS = i960.o cpu.o decode.o sem.o model.o mloop.o i960-desc.o 46 arch.h cpuall.h i960-sim.h i960-desc.h i960-opc.h 51 SIM_EXTRA_CLEAN = i960-clean 62 arch = i960 77 i960.o: i960.c $(I960BASE_INCLUDE_DEPS) 98 i960-clean: 110 archfile=$(CGEN_CPU_DIR)/i960.cpu \ 117 cpu=i960base mach=i960:ka_sa,i960:ca SUFFIX= \ 127 cpu=i960 mach=all \ 128 archfile=$(CGEN_CPU_DIR)/i960.cpu [all …]
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H A D | ChangeLog | 72 * i960-desc.h: Rebuild. 86 * i960-desc.c,i960-desc.h: Rebuild. 100 * sim-if.c: s/m32r/i960. s/sparc32/i960. 101 * decode.c, decode.h, i960-desc.c, i960-desc.h, i960-opc.h, model.c, 110 * arch.c,arch.h,model.c,i960-desc.c,i960-desc.h,i960-opc.h: Rebuild. 119 * arch.c,arch.h,cpu.c,i960-desc.c,i960-desc.h: Rebuild. 124 * i960-desc.c,i960-desc.h: Rebuild. 129 (SIM_EXTRA_DEPS): Replace cpu-opc.h with i960-desc.h,i960-opc.h. 134 * i960-desc.c: New file. 136 * i960-opc.h: New file. [all …]
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/dports/lang/gnatdroid-binutils-x86/binutils-2.27/gas/doc/ |
H A D | c-i960.texi | 6 @node i960-Dependent 14 @cindex i960 support 16 * Options-i960:: i960 Command-line Options 18 * Directives-i960:: i960 Machine Directives 19 * Opcodes for i960:: i960 Opcodes 20 * Syntax of i960:: i960 Syntax 26 @node Options-i960 30 @cindex i960 options 31 @cindex options, i960 213 @node callj-i960 [all …]
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/dports/lang/gnatdroid-binutils/binutils-2.27/gas/doc/ |
H A D | c-i960.texi | 6 @node i960-Dependent 14 @cindex i960 support 16 * Options-i960:: i960 Command-line Options 18 * Directives-i960:: i960 Machine Directives 19 * Opcodes for i960:: i960 Opcodes 20 * Syntax of i960:: i960 Syntax 26 @node Options-i960 30 @cindex i960 options 31 @cindex options, i960 213 @node callj-i960 [all …]
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/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/gas/doc/ |
H A D | c-i960.texi | 7 @node i960-Dependent 15 @cindex i960 support 17 * Options-i960:: i960 Command-line Options 19 * Directives-i960:: i960 Machine Directives 20 * Opcodes for i960:: i960 Opcodes 26 @node Options-i960 30 @cindex i960 options 31 @cindex options, i960 198 @cindex i960 opcodes 200 @pxref{Options-i960,,i960 Command-line Options} for a discussion of [all …]
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/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/gas/doc/ |
H A D | c-i960.texi | 7 @node i960-Dependent 15 @cindex i960 support 17 * Options-i960:: i960 Command-line Options 19 * Directives-i960:: i960 Machine Directives 20 * Opcodes for i960:: i960 Opcodes 26 @node Options-i960 30 @cindex i960 options 31 @cindex options, i960 198 @cindex i960 opcodes 200 @pxref{Options-i960,,i960 Command-line Options} for a discussion of [all …]
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/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/gas/doc/ |
H A D | c-i960.texi | 7 @node i960-Dependent 15 @cindex i960 support 17 * Options-i960:: i960 Command-line Options 19 * Directives-i960:: i960 Machine Directives 20 * Opcodes for i960:: i960 Opcodes 26 @node Options-i960 30 @cindex i960 options 31 @cindex options, i960 198 @cindex i960 opcodes 200 @pxref{Options-i960,,i960 Command-line Options} for a discussion of [all …]
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/dports/devel/djgpp-binutils/binutils-2.17/gas/doc/ |
H A D | c-i960.texi | 7 @node i960-Dependent 15 @cindex i960 support 17 * Options-i960:: i960 Command-line Options 19 * Directives-i960:: i960 Machine Directives 20 * Opcodes for i960:: i960 Opcodes 26 @node Options-i960 30 @cindex i960 options 31 @cindex options, i960 198 @cindex i960 opcodes 200 @pxref{Options-i960,,i960 Command-line Options} for a discussion of [all …]
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