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Searched refs:iface_params (Results 1 – 25 of 74) sorted by relevance

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/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c57 if (iface_params->memory_freq == MV_DDR_FREQ_SAR) in mv_ddr_topology_map_update()
58 iface_params->memory_freq = mv_ddr_init_freq_get(); in mv_ddr_topology_map_update()
86 iface_params->as_bus_params[i].cs_bitmask = val; in mv_ddr_topology_map_update()
115 iface_params->cas_wl = val; in mv_ddr_topology_map_update()
124 iface_params->cas_l = val; in mv_ddr_topology_map_update()
127 speed_bin_index = iface_params->speed_bin_index; in mv_ddr_topology_map_update()
128 freq = iface_params->memory_freq; in mv_ddr_topology_map_update()
131 iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT; in mv_ddr_topology_map_update()
132 iface_params->memory_size -= 1; in mv_ddr_topology_map_update()
135 if (iface_params->cas_l == 0) in mv_ddr_topology_map_update()
[all …]
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c57 if (iface_params->memory_freq == MV_DDR_FREQ_SAR) in mv_ddr_topology_map_update()
58 iface_params->memory_freq = mv_ddr_init_freq_get(); in mv_ddr_topology_map_update()
86 iface_params->as_bus_params[i].cs_bitmask = val; in mv_ddr_topology_map_update()
115 iface_params->cas_wl = val; in mv_ddr_topology_map_update()
124 iface_params->cas_l = val; in mv_ddr_topology_map_update()
127 speed_bin_index = iface_params->speed_bin_index; in mv_ddr_topology_map_update()
128 freq = iface_params->memory_freq; in mv_ddr_topology_map_update()
131 iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT; in mv_ddr_topology_map_update()
132 iface_params->memory_size -= 1; in mv_ddr_topology_map_update()
135 if (iface_params->cas_l == 0) in mv_ddr_topology_map_update()
[all …]
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c57 if (iface_params->memory_freq == MV_DDR_FREQ_SAR) in mv_ddr_topology_map_update()
58 iface_params->memory_freq = mv_ddr_init_freq_get(); in mv_ddr_topology_map_update()
86 iface_params->as_bus_params[i].cs_bitmask = val; in mv_ddr_topology_map_update()
115 iface_params->cas_wl = val; in mv_ddr_topology_map_update()
124 iface_params->cas_l = val; in mv_ddr_topology_map_update()
127 speed_bin_index = iface_params->speed_bin_index; in mv_ddr_topology_map_update()
128 freq = iface_params->memory_freq; in mv_ddr_topology_map_update()
131 iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT; in mv_ddr_topology_map_update()
132 iface_params->memory_size -= 1; in mv_ddr_topology_map_update()
135 if (iface_params->cas_l == 0) in mv_ddr_topology_map_update()
[all …]
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c57 if (iface_params->memory_freq == MV_DDR_FREQ_SAR) in mv_ddr_topology_map_update()
58 iface_params->memory_freq = mv_ddr_init_freq_get(); in mv_ddr_topology_map_update()
86 iface_params->as_bus_params[i].cs_bitmask = val; in mv_ddr_topology_map_update()
115 iface_params->cas_wl = val; in mv_ddr_topology_map_update()
124 iface_params->cas_l = val; in mv_ddr_topology_map_update()
127 speed_bin_index = iface_params->speed_bin_index; in mv_ddr_topology_map_update()
128 freq = iface_params->memory_freq; in mv_ddr_topology_map_update()
131 iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT; in mv_ddr_topology_map_update()
132 iface_params->memory_size -= 1; in mv_ddr_topology_map_update()
135 if (iface_params->cas_l == 0) in mv_ddr_topology_map_update()
[all …]
/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c57 if (iface_params->memory_freq == MV_DDR_FREQ_SAR) in mv_ddr_topology_map_update()
58 iface_params->memory_freq = mv_ddr_init_freq_get(); in mv_ddr_topology_map_update()
86 iface_params->as_bus_params[i].cs_bitmask = val; in mv_ddr_topology_map_update()
115 iface_params->cas_wl = val; in mv_ddr_topology_map_update()
124 iface_params->cas_l = val; in mv_ddr_topology_map_update()
127 speed_bin_index = iface_params->speed_bin_index; in mv_ddr_topology_map_update()
128 freq = iface_params->memory_freq; in mv_ddr_topology_map_update()
131 iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT; in mv_ddr_topology_map_update()
132 iface_params->memory_size -= 1; in mv_ddr_topology_map_update()
135 if (iface_params->cas_l == 0) in mv_ddr_topology_map_update()
[all …]
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c57 if (iface_params->memory_freq == MV_DDR_FREQ_SAR) in mv_ddr_topology_map_update()
58 iface_params->memory_freq = mv_ddr_init_freq_get(); in mv_ddr_topology_map_update()
86 iface_params->as_bus_params[i].cs_bitmask = val; in mv_ddr_topology_map_update()
115 iface_params->cas_wl = val; in mv_ddr_topology_map_update()
124 iface_params->cas_l = val; in mv_ddr_topology_map_update()
127 speed_bin_index = iface_params->speed_bin_index; in mv_ddr_topology_map_update()
128 freq = iface_params->memory_freq; in mv_ddr_topology_map_update()
131 iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT; in mv_ddr_topology_map_update()
132 iface_params->memory_size -= 1; in mv_ddr_topology_map_update()
135 if (iface_params->cas_l == 0) in mv_ddr_topology_map_update()
[all …]
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c57 if (iface_params->memory_freq == MV_DDR_FREQ_SAR) in mv_ddr_topology_map_update()
58 iface_params->memory_freq = mv_ddr_init_freq_get(); in mv_ddr_topology_map_update()
86 iface_params->as_bus_params[i].cs_bitmask = val; in mv_ddr_topology_map_update()
115 iface_params->cas_wl = val; in mv_ddr_topology_map_update()
124 iface_params->cas_l = val; in mv_ddr_topology_map_update()
127 speed_bin_index = iface_params->speed_bin_index; in mv_ddr_topology_map_update()
128 freq = iface_params->memory_freq; in mv_ddr_topology_map_update()
131 iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT; in mv_ddr_topology_map_update()
132 iface_params->memory_size -= 1; in mv_ddr_topology_map_update()
135 if (iface_params->cas_l == 0) in mv_ddr_topology_map_update()
[all …]
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c57 if (iface_params->memory_freq == MV_DDR_FREQ_SAR) in mv_ddr_topology_map_update()
58 iface_params->memory_freq = mv_ddr_init_freq_get(); in mv_ddr_topology_map_update()
86 iface_params->as_bus_params[i].cs_bitmask = val; in mv_ddr_topology_map_update()
115 iface_params->cas_wl = val; in mv_ddr_topology_map_update()
124 iface_params->cas_l = val; in mv_ddr_topology_map_update()
127 speed_bin_index = iface_params->speed_bin_index; in mv_ddr_topology_map_update()
128 freq = iface_params->memory_freq; in mv_ddr_topology_map_update()
131 iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT; in mv_ddr_topology_map_update()
132 iface_params->memory_size -= 1; in mv_ddr_topology_map_update()
135 if (iface_params->cas_l == 0) in mv_ddr_topology_map_update()
[all …]
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c57 if (iface_params->memory_freq == MV_DDR_FREQ_SAR) in mv_ddr_topology_map_update()
58 iface_params->memory_freq = mv_ddr_init_freq_get(); in mv_ddr_topology_map_update()
86 iface_params->as_bus_params[i].cs_bitmask = val; in mv_ddr_topology_map_update()
115 iface_params->cas_wl = val; in mv_ddr_topology_map_update()
124 iface_params->cas_l = val; in mv_ddr_topology_map_update()
127 speed_bin_index = iface_params->speed_bin_index; in mv_ddr_topology_map_update()
128 freq = iface_params->memory_freq; in mv_ddr_topology_map_update()
131 iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT; in mv_ddr_topology_map_update()
132 iface_params->memory_size -= 1; in mv_ddr_topology_map_update()
135 if (iface_params->cas_l == 0) in mv_ddr_topology_map_update()
[all …]
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c57 if (iface_params->memory_freq == MV_DDR_FREQ_SAR) in mv_ddr_topology_map_update()
58 iface_params->memory_freq = mv_ddr_init_freq_get(); in mv_ddr_topology_map_update()
86 iface_params->as_bus_params[i].cs_bitmask = val; in mv_ddr_topology_map_update()
115 iface_params->cas_wl = val; in mv_ddr_topology_map_update()
124 iface_params->cas_l = val; in mv_ddr_topology_map_update()
127 speed_bin_index = iface_params->speed_bin_index; in mv_ddr_topology_map_update()
128 freq = iface_params->memory_freq; in mv_ddr_topology_map_update()
131 iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT; in mv_ddr_topology_map_update()
132 iface_params->memory_size -= 1; in mv_ddr_topology_map_update()
135 if (iface_params->cas_l == 0) in mv_ddr_topology_map_update()
[all …]
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c57 if (iface_params->memory_freq == MV_DDR_FREQ_SAR) in mv_ddr_topology_map_update()
58 iface_params->memory_freq = mv_ddr_init_freq_get(); in mv_ddr_topology_map_update()
86 iface_params->as_bus_params[i].cs_bitmask = val; in mv_ddr_topology_map_update()
115 iface_params->cas_wl = val; in mv_ddr_topology_map_update()
124 iface_params->cas_l = val; in mv_ddr_topology_map_update()
127 speed_bin_index = iface_params->speed_bin_index; in mv_ddr_topology_map_update()
128 freq = iface_params->memory_freq; in mv_ddr_topology_map_update()
131 iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT; in mv_ddr_topology_map_update()
132 iface_params->memory_size -= 1; in mv_ddr_topology_map_update()
135 if (iface_params->cas_l == 0) in mv_ddr_topology_map_update()
[all …]
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c57 if (iface_params->memory_freq == MV_DDR_FREQ_SAR) in mv_ddr_topology_map_update()
58 iface_params->memory_freq = mv_ddr_init_freq_get(); in mv_ddr_topology_map_update()
86 iface_params->as_bus_params[i].cs_bitmask = val; in mv_ddr_topology_map_update()
115 iface_params->cas_wl = val; in mv_ddr_topology_map_update()
124 iface_params->cas_l = val; in mv_ddr_topology_map_update()
127 speed_bin_index = iface_params->speed_bin_index; in mv_ddr_topology_map_update()
128 freq = iface_params->memory_freq; in mv_ddr_topology_map_update()
131 iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT; in mv_ddr_topology_map_update()
132 iface_params->memory_size -= 1; in mv_ddr_topology_map_update()
135 if (iface_params->cas_l == 0) in mv_ddr_topology_map_update()
[all …]
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c57 if (iface_params->memory_freq == MV_DDR_FREQ_SAR) in mv_ddr_topology_map_update()
58 iface_params->memory_freq = mv_ddr_init_freq_get(); in mv_ddr_topology_map_update()
86 iface_params->as_bus_params[i].cs_bitmask = val; in mv_ddr_topology_map_update()
115 iface_params->cas_wl = val; in mv_ddr_topology_map_update()
124 iface_params->cas_l = val; in mv_ddr_topology_map_update()
127 speed_bin_index = iface_params->speed_bin_index; in mv_ddr_topology_map_update()
128 freq = iface_params->memory_freq; in mv_ddr_topology_map_update()
131 iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT; in mv_ddr_topology_map_update()
132 iface_params->memory_size -= 1; in mv_ddr_topology_map_update()
135 if (iface_params->cas_l == 0) in mv_ddr_topology_map_update()
[all …]
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c57 if (iface_params->memory_freq == MV_DDR_FREQ_SAR) in mv_ddr_topology_map_update()
58 iface_params->memory_freq = mv_ddr_init_freq_get(); in mv_ddr_topology_map_update()
86 iface_params->as_bus_params[i].cs_bitmask = val; in mv_ddr_topology_map_update()
115 iface_params->cas_wl = val; in mv_ddr_topology_map_update()
124 iface_params->cas_l = val; in mv_ddr_topology_map_update()
127 speed_bin_index = iface_params->speed_bin_index; in mv_ddr_topology_map_update()
128 freq = iface_params->memory_freq; in mv_ddr_topology_map_update()
131 iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT; in mv_ddr_topology_map_update()
132 iface_params->memory_size -= 1; in mv_ddr_topology_map_update()
135 if (iface_params->cas_l == 0) in mv_ddr_topology_map_update()
[all …]
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c57 if (iface_params->memory_freq == MV_DDR_FREQ_SAR) in mv_ddr_topology_map_update()
58 iface_params->memory_freq = mv_ddr_init_freq_get(); in mv_ddr_topology_map_update()
86 iface_params->as_bus_params[i].cs_bitmask = val; in mv_ddr_topology_map_update()
115 iface_params->cas_wl = val; in mv_ddr_topology_map_update()
124 iface_params->cas_l = val; in mv_ddr_topology_map_update()
127 speed_bin_index = iface_params->speed_bin_index; in mv_ddr_topology_map_update()
128 freq = iface_params->memory_freq; in mv_ddr_topology_map_update()
131 iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT; in mv_ddr_topology_map_update()
132 iface_params->memory_size -= 1; in mv_ddr_topology_map_update()
135 if (iface_params->cas_l == 0) in mv_ddr_topology_map_update()
[all …]
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c57 if (iface_params->memory_freq == MV_DDR_FREQ_SAR) in mv_ddr_topology_map_update()
58 iface_params->memory_freq = mv_ddr_init_freq_get(); in mv_ddr_topology_map_update()
86 iface_params->as_bus_params[i].cs_bitmask = val; in mv_ddr_topology_map_update()
115 iface_params->cas_wl = val; in mv_ddr_topology_map_update()
124 iface_params->cas_l = val; in mv_ddr_topology_map_update()
127 speed_bin_index = iface_params->speed_bin_index; in mv_ddr_topology_map_update()
128 freq = iface_params->memory_freq; in mv_ddr_topology_map_update()
131 iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT; in mv_ddr_topology_map_update()
132 iface_params->memory_size -= 1; in mv_ddr_topology_map_update()
135 if (iface_params->cas_l == 0) in mv_ddr_topology_map_update()
[all …]
/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c57 if (iface_params->memory_freq == MV_DDR_FREQ_SAR) in mv_ddr_topology_map_update()
58 iface_params->memory_freq = mv_ddr_init_freq_get(); in mv_ddr_topology_map_update()
86 iface_params->as_bus_params[i].cs_bitmask = val; in mv_ddr_topology_map_update()
115 iface_params->cas_wl = val; in mv_ddr_topology_map_update()
124 iface_params->cas_l = val; in mv_ddr_topology_map_update()
127 speed_bin_index = iface_params->speed_bin_index; in mv_ddr_topology_map_update()
128 freq = iface_params->memory_freq; in mv_ddr_topology_map_update()
131 iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT; in mv_ddr_topology_map_update()
132 iface_params->memory_size -= 1; in mv_ddr_topology_map_update()
135 if (iface_params->cas_l == 0) in mv_ddr_topology_map_update()
[all …]
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c57 if (iface_params->memory_freq == MV_DDR_FREQ_SAR) in mv_ddr_topology_map_update()
58 iface_params->memory_freq = mv_ddr_init_freq_get(); in mv_ddr_topology_map_update()
86 iface_params->as_bus_params[i].cs_bitmask = val; in mv_ddr_topology_map_update()
115 iface_params->cas_wl = val; in mv_ddr_topology_map_update()
124 iface_params->cas_l = val; in mv_ddr_topology_map_update()
127 speed_bin_index = iface_params->speed_bin_index; in mv_ddr_topology_map_update()
128 freq = iface_params->memory_freq; in mv_ddr_topology_map_update()
131 iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT; in mv_ddr_topology_map_update()
132 iface_params->memory_size -= 1; in mv_ddr_topology_map_update()
135 if (iface_params->cas_l == 0) in mv_ddr_topology_map_update()
[all …]
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c57 if (iface_params->memory_freq == MV_DDR_FREQ_SAR) in mv_ddr_topology_map_update()
58 iface_params->memory_freq = mv_ddr_init_freq_get(); in mv_ddr_topology_map_update()
86 iface_params->as_bus_params[i].cs_bitmask = val; in mv_ddr_topology_map_update()
115 iface_params->cas_wl = val; in mv_ddr_topology_map_update()
124 iface_params->cas_l = val; in mv_ddr_topology_map_update()
127 speed_bin_index = iface_params->speed_bin_index; in mv_ddr_topology_map_update()
128 freq = iface_params->memory_freq; in mv_ddr_topology_map_update()
131 iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT; in mv_ddr_topology_map_update()
132 iface_params->memory_size -= 1; in mv_ddr_topology_map_update()
135 if (iface_params->cas_l == 0) in mv_ddr_topology_map_update()
[all …]
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c57 if (iface_params->memory_freq == MV_DDR_FREQ_SAR) in mv_ddr_topology_map_update()
58 iface_params->memory_freq = mv_ddr_init_freq_get(); in mv_ddr_topology_map_update()
86 iface_params->as_bus_params[i].cs_bitmask = val; in mv_ddr_topology_map_update()
115 iface_params->cas_wl = val; in mv_ddr_topology_map_update()
124 iface_params->cas_l = val; in mv_ddr_topology_map_update()
127 speed_bin_index = iface_params->speed_bin_index; in mv_ddr_topology_map_update()
128 freq = iface_params->memory_freq; in mv_ddr_topology_map_update()
131 iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT; in mv_ddr_topology_map_update()
132 iface_params->memory_size -= 1; in mv_ddr_topology_map_update()
135 if (iface_params->cas_l == 0) in mv_ddr_topology_map_update()
[all …]
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c57 if (iface_params->memory_freq == MV_DDR_FREQ_SAR) in mv_ddr_topology_map_update()
58 iface_params->memory_freq = mv_ddr_init_freq_get(); in mv_ddr_topology_map_update()
86 iface_params->as_bus_params[i].cs_bitmask = val; in mv_ddr_topology_map_update()
115 iface_params->cas_wl = val; in mv_ddr_topology_map_update()
124 iface_params->cas_l = val; in mv_ddr_topology_map_update()
127 speed_bin_index = iface_params->speed_bin_index; in mv_ddr_topology_map_update()
128 freq = iface_params->memory_freq; in mv_ddr_topology_map_update()
131 iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT; in mv_ddr_topology_map_update()
132 iface_params->memory_size -= 1; in mv_ddr_topology_map_update()
135 if (iface_params->cas_l == 0) in mv_ddr_topology_map_update()
[all …]
/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c57 if (iface_params->memory_freq == MV_DDR_FREQ_SAR) in mv_ddr_topology_map_update()
58 iface_params->memory_freq = mv_ddr_init_freq_get(); in mv_ddr_topology_map_update()
86 iface_params->as_bus_params[i].cs_bitmask = val; in mv_ddr_topology_map_update()
115 iface_params->cas_wl = val; in mv_ddr_topology_map_update()
124 iface_params->cas_l = val; in mv_ddr_topology_map_update()
127 speed_bin_index = iface_params->speed_bin_index; in mv_ddr_topology_map_update()
128 freq = iface_params->memory_freq; in mv_ddr_topology_map_update()
131 iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT; in mv_ddr_topology_map_update()
132 iface_params->memory_size -= 1; in mv_ddr_topology_map_update()
135 if (iface_params->cas_l == 0) in mv_ddr_topology_map_update()
[all …]
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c57 if (iface_params->memory_freq == MV_DDR_FREQ_SAR) in mv_ddr_topology_map_update()
58 iface_params->memory_freq = mv_ddr_init_freq_get(); in mv_ddr_topology_map_update()
86 iface_params->as_bus_params[i].cs_bitmask = val; in mv_ddr_topology_map_update()
115 iface_params->cas_wl = val; in mv_ddr_topology_map_update()
124 iface_params->cas_l = val; in mv_ddr_topology_map_update()
127 speed_bin_index = iface_params->speed_bin_index; in mv_ddr_topology_map_update()
128 freq = iface_params->memory_freq; in mv_ddr_topology_map_update()
131 iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT; in mv_ddr_topology_map_update()
132 iface_params->memory_size -= 1; in mv_ddr_topology_map_update()
135 if (iface_params->cas_l == 0) in mv_ddr_topology_map_update()
[all …]
/dports/sysutils/u-boot-pine64/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c57 if (iface_params->memory_freq == MV_DDR_FREQ_SAR) in mv_ddr_topology_map_update()
58 iface_params->memory_freq = mv_ddr_init_freq_get(); in mv_ddr_topology_map_update()
86 iface_params->as_bus_params[i].cs_bitmask = val; in mv_ddr_topology_map_update()
115 iface_params->cas_wl = val; in mv_ddr_topology_map_update()
124 iface_params->cas_l = val; in mv_ddr_topology_map_update()
127 speed_bin_index = iface_params->speed_bin_index; in mv_ddr_topology_map_update()
128 freq = iface_params->memory_freq; in mv_ddr_topology_map_update()
131 iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT; in mv_ddr_topology_map_update()
132 iface_params->memory_size -= 1; in mv_ddr_topology_map_update()
135 if (iface_params->cas_l == 0) in mv_ddr_topology_map_update()
[all …]
/dports/sysutils/u-boot-pine-h64/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c57 if (iface_params->memory_freq == MV_DDR_FREQ_SAR) in mv_ddr_topology_map_update()
58 iface_params->memory_freq = mv_ddr_init_freq_get(); in mv_ddr_topology_map_update()
86 iface_params->as_bus_params[i].cs_bitmask = val; in mv_ddr_topology_map_update()
115 iface_params->cas_wl = val; in mv_ddr_topology_map_update()
124 iface_params->cas_l = val; in mv_ddr_topology_map_update()
127 speed_bin_index = iface_params->speed_bin_index; in mv_ddr_topology_map_update()
128 freq = iface_params->memory_freq; in mv_ddr_topology_map_update()
131 iface_params->bus_width = MV_DDR_DEV_WIDTH_8BIT; in mv_ddr_topology_map_update()
132 iface_params->memory_size -= 1; in mv_ddr_topology_map_update()
135 if (iface_params->cas_l == 0) in mv_ddr_topology_map_update()
[all …]

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