/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/x86/platform/intel-quark/ |
H A D | imr.c | 221 &base, &end, size, imr.rmask, imr.wmask, in imr_dbgfs_state_show() 326 imr.rmask = rmask; in imr_add_range() 327 imr.wmask = wmask; in imr_add_range() 369 imr.rmask = rmask; in imr_add_range() 370 imr.wmask = wmask; in imr_add_range() 379 imr.addr_lo = 0; in imr_add_range() 380 imr.addr_hi = 0; in imr_add_range() 442 if (!imr_is_enabled(&imr) || imr.addr_lo & IMR_LOCK) { in __imr_remove_range() 454 if (!imr_is_enabled(&imr) || imr.addr_lo & IMR_LOCK) in __imr_remove_range() 474 imr.addr_lo = 0; in __imr_remove_range() [all …]
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/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/x86/platform/intel-quark/ |
H A D | imr.c | 221 &base, &end, size, imr.rmask, imr.wmask, in imr_dbgfs_state_show() 326 imr.rmask = rmask; in imr_add_range() 327 imr.wmask = wmask; in imr_add_range() 369 imr.rmask = rmask; in imr_add_range() 370 imr.wmask = wmask; in imr_add_range() 379 imr.addr_lo = 0; in imr_add_range() 380 imr.addr_hi = 0; in imr_add_range() 442 if (!imr_is_enabled(&imr) || imr.addr_lo & IMR_LOCK) { in __imr_remove_range() 454 if (!imr_is_enabled(&imr) || imr.addr_lo & IMR_LOCK) in __imr_remove_range() 474 imr.addr_lo = 0; in __imr_remove_range() [all …]
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/dports/multimedia/libv4l/linux-5.13-rc2/arch/x86/platform/intel-quark/ |
H A D | imr.c | 221 &base, &end, size, imr.rmask, imr.wmask, in imr_dbgfs_state_show() 326 imr.rmask = rmask; in imr_add_range() 327 imr.wmask = wmask; in imr_add_range() 369 imr.rmask = rmask; in imr_add_range() 370 imr.wmask = wmask; in imr_add_range() 379 imr.addr_lo = 0; in imr_add_range() 380 imr.addr_hi = 0; in imr_add_range() 442 if (!imr_is_enabled(&imr) || imr.addr_lo & IMR_LOCK) { in __imr_remove_range() 454 if (!imr_is_enabled(&imr) || imr.addr_lo & IMR_LOCK) in __imr_remove_range() 474 imr.addr_lo = 0; in __imr_remove_range() [all …]
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/dports/multimedia/vlc/vlc-3.0.16/contrib/src/live555/ |
H A D | in_addr-s_addr-field.patch | 8 struct ip_mreq_source imr; 10 - imr.imr_multiaddr = groupAddress; 11 - imr.imr_sourceaddr = sourceFilterAddr; 12 - imr.imr_interface = ReceivingInterfaceAddr; 14 - imr.imr_multiaddr.s_addr = groupAddress; 18 + imr.imr_multiaddr.s_addr = groupAddress; 27 struct ip_mreq_source imr; 29 - imr.imr_multiaddr = groupAddress; 30 - imr.imr_sourceaddr = sourceFilterAddr; 33 - imr.imr_multiaddr.s_addr = groupAddress; [all …]
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/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/m68k/coldfire/ |
H A D | intc.c | 47 u16 imr; in mcf_setimr() local 48 imr = __raw_readw(MCFSIM_IMR); in mcf_setimr() 54 u16 imr; in mcf_clrimr() local 55 imr = __raw_readw(MCFSIM_IMR); in mcf_clrimr() 61 u16 imr; in mcf_maskimr() local 62 imr = __raw_readw(MCFSIM_IMR); in mcf_maskimr() 63 imr |= mask; in mcf_maskimr() 71 u32 imr; in mcf_setimr() local 78 u32 imr; in mcf_clrimr() local 85 u32 imr; in mcf_maskimr() local [all …]
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H A D | intc-525x.c | 23 u32 imr = readl(MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_mask() local 28 imr &= ~(0x001 << irq); in intc2_irq_gpio_mask() 30 imr &= ~(0x100 << irq); in intc2_irq_gpio_mask() 31 writel(imr, MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_mask() 41 imr |= (0x001 << irq); in intc2_irq_gpio_unmask() 43 imr |= (0x100 << irq); in intc2_irq_gpio_unmask() 44 writel(imr, MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_unmask() 49 u32 imr = 0; in intc2_irq_gpio_ack() local 54 imr |= (0x001 << irq); in intc2_irq_gpio_ack() 56 imr |= (0x100 << irq); in intc2_irq_gpio_ack() [all …]
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H A D | intc-5249.c | 22 u32 imr; in intc2_irq_gpio_mask() local 23 imr = readl(MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_mask() 24 imr &= ~(0x1 << (d->irq - MCF_IRQ_GPIO0)); in intc2_irq_gpio_mask() 25 writel(imr, MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_mask() 30 u32 imr; in intc2_irq_gpio_unmask() local 31 imr = readl(MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_unmask() 32 imr |= (0x1 << (d->irq - MCF_IRQ_GPIO0)); in intc2_irq_gpio_unmask() 33 writel(imr, MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_unmask()
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/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/m68k/coldfire/ |
H A D | intc.c | 47 u16 imr; in mcf_setimr() local 48 imr = __raw_readw(MCFSIM_IMR); in mcf_setimr() 54 u16 imr; in mcf_clrimr() local 55 imr = __raw_readw(MCFSIM_IMR); in mcf_clrimr() 61 u16 imr; in mcf_maskimr() local 62 imr = __raw_readw(MCFSIM_IMR); in mcf_maskimr() 63 imr |= mask; in mcf_maskimr() 71 u32 imr; in mcf_setimr() local 78 u32 imr; in mcf_clrimr() local 85 u32 imr; in mcf_maskimr() local [all …]
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H A D | intc-525x.c | 23 u32 imr = readl(MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_mask() local 28 imr &= ~(0x001 << irq); in intc2_irq_gpio_mask() 30 imr &= ~(0x100 << irq); in intc2_irq_gpio_mask() 31 writel(imr, MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_mask() 41 imr |= (0x001 << irq); in intc2_irq_gpio_unmask() 43 imr |= (0x100 << irq); in intc2_irq_gpio_unmask() 44 writel(imr, MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_unmask() 49 u32 imr = 0; in intc2_irq_gpio_ack() local 54 imr |= (0x001 << irq); in intc2_irq_gpio_ack() 56 imr |= (0x100 << irq); in intc2_irq_gpio_ack() [all …]
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H A D | intc-5249.c | 22 u32 imr; in intc2_irq_gpio_mask() local 23 imr = readl(MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_mask() 24 imr &= ~(0x1 << (d->irq - MCF_IRQ_GPIO0)); in intc2_irq_gpio_mask() 25 writel(imr, MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_mask() 30 u32 imr; in intc2_irq_gpio_unmask() local 31 imr = readl(MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_unmask() 32 imr |= (0x1 << (d->irq - MCF_IRQ_GPIO0)); in intc2_irq_gpio_unmask() 33 writel(imr, MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_unmask()
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/dports/multimedia/libv4l/linux-5.13-rc2/arch/m68k/coldfire/ |
H A D | intc.c | 47 u16 imr; in mcf_setimr() local 48 imr = __raw_readw(MCFSIM_IMR); in mcf_setimr() 54 u16 imr; in mcf_clrimr() local 55 imr = __raw_readw(MCFSIM_IMR); in mcf_clrimr() 61 u16 imr; in mcf_maskimr() local 62 imr = __raw_readw(MCFSIM_IMR); in mcf_maskimr() 63 imr |= mask; in mcf_maskimr() 71 u32 imr; in mcf_setimr() local 78 u32 imr; in mcf_clrimr() local 85 u32 imr; in mcf_maskimr() local [all …]
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H A D | intc-525x.c | 23 u32 imr = readl(MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_mask() local 28 imr &= ~(0x001 << irq); in intc2_irq_gpio_mask() 30 imr &= ~(0x100 << irq); in intc2_irq_gpio_mask() 31 writel(imr, MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_mask() 41 imr |= (0x001 << irq); in intc2_irq_gpio_unmask() 43 imr |= (0x100 << irq); in intc2_irq_gpio_unmask() 44 writel(imr, MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_unmask() 49 u32 imr = 0; in intc2_irq_gpio_ack() local 54 imr |= (0x001 << irq); in intc2_irq_gpio_ack() 56 imr |= (0x100 << irq); in intc2_irq_gpio_ack() [all …]
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H A D | intc-5249.c | 22 u32 imr; in intc2_irq_gpio_mask() local 23 imr = readl(MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_mask() 24 imr &= ~(0x1 << (d->irq - MCF_IRQ_GPIO0)); in intc2_irq_gpio_mask() 25 writel(imr, MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_mask() 30 u32 imr; in intc2_irq_gpio_unmask() local 31 imr = readl(MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_unmask() 32 imr |= (0x1 << (d->irq - MCF_IRQ_GPIO0)); in intc2_irq_gpio_unmask() 33 writel(imr, MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_unmask()
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/dports/games/billardgl/BillardGL-1.75/src/ |
H A D | createTexture.cpp | 15 texels=(GLfloat *) malloc (3*imr.width()*imr.height()*sizeof(GLfloat)); in createTexture() 18 for (y=imr.nrl;y<=imr.nrh;y++) { in createTexture() 19 for (x=imr.ncl;x<=imr.nch;x++) { in createTexture() 52 texels=(GLfloat *) malloc (4*imr.width()*imr.height()*sizeof(GLfloat)); in createTextureAlpha() 55 for (y=imr.nrl;y<=imr.nrh;y++) { in createTextureAlpha() 56 for (x=imr.ncl;x<=imr.nch;x++) { in createTextureAlpha() 163 texels=(GLfloat *) malloc (4*imr.width()*imr.height()*sizeof(GLfloat)); in createTextureAlpha2() 166 for (y=imr.nrl;y<=imr.nrh;y++) { in createTextureAlpha2() 167 for (x=imr.ncl;x<=imr.nch;x++) { in createTextureAlpha2() 204 for (y=imr.nrl;y<=imr.nrh;y++) { in createTextureMipmap() [all …]
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/dports/emulators/qemu42/qemu-4.2.1/hw/m68k/ |
H A D | mcf_intc.c | 25 uint64_t imr; member 40 active = (s->ipr | s->ifr) & s->enabled & ~s->imr; in mcf_intc_update() 71 return (uint32_t)(s->imr >> 32); in mcf_intc_read() 73 return (uint32_t)s->imr; in mcf_intc_read() 110 s->imr = (s->imr & 0xffffffff) | ((uint64_t)val << 32); in mcf_intc_write() 113 s->imr = (s->imr & 0xffffffff00000000ull) | (uint32_t)val; in mcf_intc_write() 117 s->imr = ~0ull; in mcf_intc_write() 119 s->imr |= (0x1ull << (val & 0x3f)); in mcf_intc_write() 124 s->imr = 0ull; in mcf_intc_write() 126 s->imr &= ~(0x1ull << (val & 0x3f)); in mcf_intc_write() [all …]
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/dports/emulators/qemu/qemu-6.2.0/hw/m68k/ |
H A D | mcf_intc.c | 27 uint64_t imr; member 42 active = (s->ipr | s->ifr) & s->enabled & ~s->imr; in mcf_intc_update() 73 return (uint32_t)(s->imr >> 32); in mcf_intc_read() 75 return (uint32_t)s->imr; in mcf_intc_read() 114 s->imr = (s->imr & 0xffffffff) | ((uint64_t)val << 32); in mcf_intc_write() 117 s->imr = (s->imr & 0xffffffff00000000ull) | (uint32_t)val; in mcf_intc_write() 121 s->imr = ~0ull; in mcf_intc_write() 123 s->imr |= (0x1ull << (val & 0x3f)); in mcf_intc_write() 128 s->imr = 0ull; in mcf_intc_write() 130 s->imr &= ~(0x1ull << (val & 0x3f)); in mcf_intc_write() [all …]
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/dports/emulators/qemu60/qemu-6.0.0/hw/m68k/ |
H A D | mcf_intc.c | 28 uint64_t imr; member 43 active = (s->ipr | s->ifr) & s->enabled & ~s->imr; in mcf_intc_update() 74 return (uint32_t)(s->imr >> 32); in mcf_intc_read() 76 return (uint32_t)s->imr; in mcf_intc_read() 115 s->imr = (s->imr & 0xffffffff) | ((uint64_t)val << 32); in mcf_intc_write() 118 s->imr = (s->imr & 0xffffffff00000000ull) | (uint32_t)val; in mcf_intc_write() 122 s->imr = ~0ull; in mcf_intc_write() 124 s->imr |= (0x1ull << (val & 0x3f)); in mcf_intc_write() 129 s->imr = 0ull; in mcf_intc_write() 131 s->imr &= ~(0x1ull << (val & 0x3f)); in mcf_intc_write() [all …]
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/m68k/ |
H A D | mcf_intc.c | 23 uint64_t imr; member 38 active = (s->ipr | s->ifr) & s->enabled & ~s->imr; in mcf_intc_update() 69 return (uint32_t)(s->imr >> 32); in mcf_intc_read() 71 return (uint32_t)s->imr; in mcf_intc_read() 108 s->imr = (s->imr & 0xffffffff) | ((uint64_t)val << 32); in mcf_intc_write() 111 s->imr = (s->imr & 0xffffffff00000000ull) | (uint32_t)val; in mcf_intc_write() 115 s->imr = ~0ull; in mcf_intc_write() 117 s->imr |= (0x1ull << (val & 0x3f)); in mcf_intc_write() 122 s->imr = 0ull; in mcf_intc_write() 124 s->imr &= ~(0x1ull << (val & 0x3f)); in mcf_intc_write() [all …]
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/dports/emulators/qemu5/qemu-5.2.0/hw/m68k/ |
H A D | mcf_intc.c | 28 uint64_t imr; member 43 active = (s->ipr | s->ifr) & s->enabled & ~s->imr; in mcf_intc_update() 74 return (uint32_t)(s->imr >> 32); in mcf_intc_read() 76 return (uint32_t)s->imr; in mcf_intc_read() 115 s->imr = (s->imr & 0xffffffff) | ((uint64_t)val << 32); in mcf_intc_write() 118 s->imr = (s->imr & 0xffffffff00000000ull) | (uint32_t)val; in mcf_intc_write() 122 s->imr = ~0ull; in mcf_intc_write() 124 s->imr |= (0x1ull << (val & 0x3f)); in mcf_intc_write() 129 s->imr = 0ull; in mcf_intc_write() 131 s->imr &= ~(0x1ull << (val & 0x3f)); in mcf_intc_write() [all …]
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/dports/emulators/qemu-utils/qemu-4.2.1/hw/m68k/ |
H A D | mcf_intc.c | 25 uint64_t imr; member 40 active = (s->ipr | s->ifr) & s->enabled & ~s->imr; in mcf_intc_update() 71 return (uint32_t)(s->imr >> 32); in mcf_intc_read() 73 return (uint32_t)s->imr; in mcf_intc_read() 110 s->imr = (s->imr & 0xffffffff) | ((uint64_t)val << 32); in mcf_intc_write() 113 s->imr = (s->imr & 0xffffffff00000000ull) | (uint32_t)val; in mcf_intc_write() 117 s->imr = ~0ull; in mcf_intc_write() 119 s->imr |= (0x1ull << (val & 0x3f)); in mcf_intc_write() 124 s->imr = 0ull; in mcf_intc_write() 126 s->imr &= ~(0x1ull << (val & 0x3f)); in mcf_intc_write() [all …]
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/m68k/ |
H A D | mcf_intc.c | 25 uint64_t imr; member 40 active = (s->ipr | s->ifr) & s->enabled & ~s->imr; in mcf_intc_update() 71 return (uint32_t)(s->imr >> 32); in mcf_intc_read() 73 return (uint32_t)s->imr; in mcf_intc_read() 110 s->imr = (s->imr & 0xffffffff) | ((uint64_t)val << 32); in mcf_intc_write() 113 s->imr = (s->imr & 0xffffffff00000000ull) | (uint32_t)val; in mcf_intc_write() 117 s->imr = ~0ull; in mcf_intc_write() 119 s->imr |= (0x1ull << (val & 0x3f)); in mcf_intc_write() 124 s->imr = 0ull; in mcf_intc_write() 126 s->imr &= ~(0x1ull << (val & 0x3f)); in mcf_intc_write() [all …]
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/m68k/ |
H A D | mcf_intc.c | 25 uint64_t imr; member 40 active = (s->ipr | s->ifr) & s->enabled & ~s->imr; in mcf_intc_update() 71 return (uint32_t)(s->imr >> 32); in mcf_intc_read() 73 return (uint32_t)s->imr; in mcf_intc_read() 110 s->imr = (s->imr & 0xffffffff) | ((uint64_t)val << 32); in mcf_intc_write() 113 s->imr = (s->imr & 0xffffffff00000000ull) | (uint32_t)val; in mcf_intc_write() 117 s->imr = ~0ull; in mcf_intc_write() 119 s->imr |= (0x1ull << (val & 0x3f)); in mcf_intc_write() 124 s->imr = 0ull; in mcf_intc_write() 126 s->imr &= ~(0x1ull << (val & 0x3f)); in mcf_intc_write() [all …]
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/m68k/ |
H A D | mcf_intc.c | 27 uint64_t imr; member 42 active = (s->ipr | s->ifr) & s->enabled & ~s->imr; in mcf_intc_update() 73 return (uint32_t)(s->imr >> 32); in mcf_intc_read() 75 return (uint32_t)s->imr; in mcf_intc_read() 114 s->imr = (s->imr & 0xffffffff) | ((uint64_t)val << 32); in mcf_intc_write() 117 s->imr = (s->imr & 0xffffffff00000000ull) | (uint32_t)val; in mcf_intc_write() 121 s->imr = ~0ull; in mcf_intc_write() 123 s->imr |= (0x1ull << (val & 0x3f)); in mcf_intc_write() 128 s->imr = 0ull; in mcf_intc_write() 130 s->imr &= ~(0x1ull << (val & 0x3f)); in mcf_intc_write() [all …]
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/dports/science/cp2k/cp2k-2e995eec7fd208c8a72d9544807bd8b8ba8cd1cc/tools/autotune_grid/ |
H A D | cube_utils.F | 43 IF (imr.gt.info%max_radius) THEN 44 imr = info%max_radius 46 lb_cube(:) = info%lb_cube(:,imr) 47 ub_cube(:) = info%ub_cube(:,imr) 48 sphere_bounds => info%sphere_bounds(imr)%p 96 imr=max_radius 97 info%max_radius=imr 109 ALLOCATE(info%lb_cube(3,imr),info%ub_cube(3,imr), & 110 info%sphere_bounds_count(imr),info%sphere_bounds(imr)) 116 DO i=1,imr [all …]
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/dports/science/cp2k-data/cp2k-7.1.0/tools/autotune_grid/ |
H A D | cube_utils.F | 43 IF (imr.gt.info%max_radius) THEN 44 imr = info%max_radius 46 lb_cube(:) = info%lb_cube(:,imr) 47 ub_cube(:) = info%ub_cube(:,imr) 48 sphere_bounds => info%sphere_bounds(imr)%p 96 imr=max_radius 97 info%max_radius=imr 109 ALLOCATE(info%lb_cube(3,imr),info%ub_cube(3,imr), & 110 info%sphere_bounds_count(imr),info%sphere_bounds(imr)) 116 DO i=1,imr [all …]
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