| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/clk/imx/ |
| H A D | clk-imx5.c | 141 clk[IMX5_CLK_PER_PRED1] = imx_clk_divider("per_pred1", "per_lp_apm", MXC_CCM_CBCDR, 6, 2); in mx5_clocks_common_init()
142 clk[IMX5_CLK_PER_PRED2] = imx_clk_divider("per_pred2", "per_pred1", MXC_CCM_CBCDR, 3, 3); in mx5_clocks_common_init()
143 clk[IMX5_CLK_PER_PODF] = imx_clk_divider("per_podf", "per_pred2", MXC_CCM_CBCDR, 0, 3); in mx5_clocks_common_init()
146 clk[IMX5_CLK_AHB] = imx_clk_divider("ahb", "main_bus", MXC_CCM_CBCDR, 10, 3); in mx5_clocks_common_init()
154 clk[IMX5_CLK_IPG] = imx_clk_divider("ipg", "ahb", MXC_CCM_CBCDR, 8, 2); in mx5_clocks_common_init()
155 clk[IMX5_CLK_AXI_A] = imx_clk_divider("axi_a", "main_bus", MXC_CCM_CBCDR, 16, 3); in mx5_clocks_common_init()
156 clk[IMX5_CLK_AXI_B] = imx_clk_divider("axi_b", "main_bus", MXC_CCM_CBCDR, 19, 3); in mx5_clocks_common_init()
159 clk[IMX5_CLK_UART_PRED] = imx_clk_divider("uart_pred", "uart_sel", MXC_CCM_CSCDR1, 3, 3); in mx5_clocks_common_init()
160 clk[IMX5_CLK_UART_ROOT] = imx_clk_divider("uart_root", "uart_pred", MXC_CCM_CSCDR1, 0, 3); in mx5_clocks_common_init()
186 clk[IMX5_CLK_DI_PRED] = imx_clk_divider("di_pred", "pll3_sw", MXC_CCM_CDCDR, 6, 3); in mx5_clocks_common_init()
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| H A D | clk-imx27.c | 70 clk[IMX27_CLK_AHB] = imx_clk_divider("ahb", "mpll_main2", CCM_CSCR, 8, 2); in _mx27_clocks_init()
73 clk[IMX27_CLK_AHB] = imx_clk_divider("ahb", "mpll_main2", CCM_CSCR, 9, 4); in _mx27_clocks_init()
74 clk[IMX27_CLK_IPG] = imx_clk_divider("ipg", "ahb", CCM_CSCR, 8, 1); in _mx27_clocks_init()
77 clk[IMX27_CLK_MSHC_DIV] = imx_clk_divider("mshc_div", "ahb", CCM_PCDR0, 0, 6); in _mx27_clocks_init()
78 clk[IMX27_CLK_NFC_DIV] = imx_clk_divider("nfc_div", "ahb", CCM_PCDR0, 6, 4); in _mx27_clocks_init()
84 clk[IMX27_CLK_VPU_DIV] = imx_clk_divider("vpu_div", "vpu_sel", CCM_PCDR0, 10, 6); in _mx27_clocks_init()
85 clk[IMX27_CLK_USB_DIV] = imx_clk_divider("usb_div", "spll_gate", CCM_CSCR, 28, 3); in _mx27_clocks_init()
90 clk[IMX27_CLK_CPU_DIV] = imx_clk_divider("cpu_div", "cpu_sel", CCM_CSCR, 12, 2); in _mx27_clocks_init()
92 clk[IMX27_CLK_CPU_DIV] = imx_clk_divider("cpu_div", "cpu_sel", CCM_CSCR, 13, 3); in _mx27_clocks_init()
94 clk[IMX27_CLK_CLKO_DIV] = imx_clk_divider("clko_div", "clko_sel", CCM_PCDR0, 22, 3); in _mx27_clocks_init()
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| H A D | clk-imx25.c | 85 clk[cpu] = imx_clk_divider("cpu", "cpu_sel", ccm(CCM_CCTL), 30, 2); in __mx25_clocks_init()
86 clk[ahb] = imx_clk_divider("ahb", "cpu", ccm(CCM_CCTL), 28, 2); in __mx25_clocks_init()
108 clk[per0] = imx_clk_divider("per0", "per0_sel", ccm(CCM_PCDR0), 0, 6); in __mx25_clocks_init()
109 clk[per1] = imx_clk_divider("per1", "per1_sel", ccm(CCM_PCDR0), 8, 6); in __mx25_clocks_init()
110 clk[per2] = imx_clk_divider("per2", "per2_sel", ccm(CCM_PCDR0), 16, 6); in __mx25_clocks_init()
111 clk[per3] = imx_clk_divider("per3", "per3_sel", ccm(CCM_PCDR0), 24, 6); in __mx25_clocks_init()
112 clk[per4] = imx_clk_divider("per4", "per4_sel", ccm(CCM_PCDR1), 0, 6); in __mx25_clocks_init()
113 clk[per5] = imx_clk_divider("per5", "per5_sel", ccm(CCM_PCDR1), 8, 6); in __mx25_clocks_init()
114 clk[per6] = imx_clk_divider("per6", "per6_sel", ccm(CCM_PCDR1), 16, 6); in __mx25_clocks_init()
116 clk[per8] = imx_clk_divider("per8", "per8_sel", ccm(CCM_PCDR2), 0, 6); in __mx25_clocks_init()
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| H A D | clk-imx1.c | 51 clk[IMX1_CLK_MCU] = imx_clk_divider("mcu", "clk32_premult", CCM_CSCR, 15, 1); in mx1_clocks_init_dt()
52 clk[IMX1_CLK_FCLK] = imx_clk_divider("fclk", "mpll_gate", CCM_CSCR, 15, 1); in mx1_clocks_init_dt()
53 clk[IMX1_CLK_HCLK] = imx_clk_divider("hclk", "spll_gate", CCM_CSCR, 10, 4); in mx1_clocks_init_dt()
54 clk[IMX1_CLK_CLK48M] = imx_clk_divider("clk48m", "spll_gate", CCM_CSCR, 26, 3); in mx1_clocks_init_dt()
55 clk[IMX1_CLK_PER1] = imx_clk_divider("per1", "spll_gate", CCM_PCDR, 0, 4); in mx1_clocks_init_dt()
56 clk[IMX1_CLK_PER2] = imx_clk_divider("per2", "spll_gate", CCM_PCDR, 4, 4); in mx1_clocks_init_dt()
57 clk[IMX1_CLK_PER3] = imx_clk_divider("per3", "spll_gate", CCM_PCDR, 16, 7); in mx1_clocks_init_dt()
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| H A D | clk-imx35.c | 135 clk[arm_per_div] = imx_clk_divider("arm_per_div", "arm", base + MX35_CCM_PDR4, 16, 6); in _mx35_clocks_init()
136 clk[ahb_per_div] = imx_clk_divider("ahb_per_div", "ahb", base + MXC_CCM_PDR0, 12, 3); in _mx35_clocks_init()
140 clk[uart_div] = imx_clk_divider("uart_div", "uart_sel", base + MX35_CCM_PDR4, 10, 6); in _mx35_clocks_init()
143 clk[esdhc1_div] = imx_clk_divider("esdhc1_div", "esdhc_sel", base + MX35_CCM_PDR3, 0, 6); in _mx35_clocks_init()
144 clk[esdhc2_div] = imx_clk_divider("esdhc2_div", "esdhc_sel", base + MX35_CCM_PDR3, 8, 6); in _mx35_clocks_init()
145 clk[esdhc3_div] = imx_clk_divider("esdhc3_div", "esdhc_sel", base + MX35_CCM_PDR3, 16, 6); in _mx35_clocks_init()
152 clk[ssi1_div_pre] = imx_clk_divider("ssi1_div_pre", "ssi_sel", base + MX35_CCM_PDR2, 24, 3); in _mx35_clocks_init()
154 clk[ssi2_div_pre] = imx_clk_divider("ssi2_div_pre", "ssi_sel", base + MX35_CCM_PDR2, 27, 3); in _mx35_clocks_init()
158 clk[usb_div] = imx_clk_divider("usb_div", "usb_sel", base + MX35_CCM_PDR4, 22, 6); in _mx35_clocks_init()
160 clk[nfc_div] = imx_clk_divider("nfc_div", "ahb", base + MX35_CCM_PDR4, 28, 4); in _mx35_clocks_init()
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| H A D | clk-vf610.c | 273 clk[VF610_CLK_SYS_BUS] = imx_clk_divider("sys_bus", "sys_sel", CCM_CACRR, 0, 3); in vf610_clocks_init()
275 clk[VF610_CLK_IPG_BUS] = imx_clk_divider("ipg_bus", "platform_bus", CCM_CACRR, 11, 2); in vf610_clocks_init()
292 clk[VF610_CLK_QSPI0_X4_DIV] = imx_clk_divider("qspi0_x4", "qspi0_en", CCM_CSCDR3, 0, 2); in vf610_clocks_init()
372 clk[VF610_CLK_DCU0_DIV] = imx_clk_divider("dcu0_div", "dcu0_en", CCM_CSCDR3, 16, 3); in vf610_clocks_init()
376 clk[VF610_CLK_DCU1_DIV] = imx_clk_divider("dcu1_div", "dcu1_en", CCM_CSCDR3, 20, 3); in vf610_clocks_init()
384 clk[VF610_CLK_ESAI_DIV] = imx_clk_divider("esai_div", "esai_en", CCM_CSCDR2, 24, 4); in vf610_clocks_init()
389 clk[VF610_CLK_SAI0_DIV] = imx_clk_divider("sai0_div", "sai0_en", CCM_CSCDR1, 0, 4); in vf610_clocks_init()
394 clk[VF610_CLK_SAI1_DIV] = imx_clk_divider("sai1_div", "sai1_en", CCM_CSCDR1, 4, 4); in vf610_clocks_init()
399 clk[VF610_CLK_SAI2_DIV] = imx_clk_divider("sai2_div", "sai2_en", CCM_CSCDR1, 8, 4); in vf610_clocks_init()
404 clk[VF610_CLK_SAI3_DIV] = imx_clk_divider("sai3_div", "sai3_en", CCM_CSCDR1, 12, 4); in vf610_clocks_init()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/clk/imx/ |
| H A D | clk-imx5.c | 141 clk[IMX5_CLK_PER_PRED1] = imx_clk_divider("per_pred1", "per_lp_apm", MXC_CCM_CBCDR, 6, 2); in mx5_clocks_common_init()
142 clk[IMX5_CLK_PER_PRED2] = imx_clk_divider("per_pred2", "per_pred1", MXC_CCM_CBCDR, 3, 3); in mx5_clocks_common_init()
143 clk[IMX5_CLK_PER_PODF] = imx_clk_divider("per_podf", "per_pred2", MXC_CCM_CBCDR, 0, 3); in mx5_clocks_common_init()
146 clk[IMX5_CLK_AHB] = imx_clk_divider("ahb", "main_bus", MXC_CCM_CBCDR, 10, 3); in mx5_clocks_common_init()
154 clk[IMX5_CLK_IPG] = imx_clk_divider("ipg", "ahb", MXC_CCM_CBCDR, 8, 2); in mx5_clocks_common_init()
155 clk[IMX5_CLK_AXI_A] = imx_clk_divider("axi_a", "main_bus", MXC_CCM_CBCDR, 16, 3); in mx5_clocks_common_init()
156 clk[IMX5_CLK_AXI_B] = imx_clk_divider("axi_b", "main_bus", MXC_CCM_CBCDR, 19, 3); in mx5_clocks_common_init()
159 clk[IMX5_CLK_UART_PRED] = imx_clk_divider("uart_pred", "uart_sel", MXC_CCM_CSCDR1, 3, 3); in mx5_clocks_common_init()
160 clk[IMX5_CLK_UART_ROOT] = imx_clk_divider("uart_root", "uart_pred", MXC_CCM_CSCDR1, 0, 3); in mx5_clocks_common_init()
186 clk[IMX5_CLK_DI_PRED] = imx_clk_divider("di_pred", "pll3_sw", MXC_CCM_CDCDR, 6, 3); in mx5_clocks_common_init()
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| H A D | clk-imx27.c | 70 clk[IMX27_CLK_AHB] = imx_clk_divider("ahb", "mpll_main2", CCM_CSCR, 8, 2); in _mx27_clocks_init()
73 clk[IMX27_CLK_AHB] = imx_clk_divider("ahb", "mpll_main2", CCM_CSCR, 9, 4); in _mx27_clocks_init()
74 clk[IMX27_CLK_IPG] = imx_clk_divider("ipg", "ahb", CCM_CSCR, 8, 1); in _mx27_clocks_init()
77 clk[IMX27_CLK_MSHC_DIV] = imx_clk_divider("mshc_div", "ahb", CCM_PCDR0, 0, 6); in _mx27_clocks_init()
78 clk[IMX27_CLK_NFC_DIV] = imx_clk_divider("nfc_div", "ahb", CCM_PCDR0, 6, 4); in _mx27_clocks_init()
84 clk[IMX27_CLK_VPU_DIV] = imx_clk_divider("vpu_div", "vpu_sel", CCM_PCDR0, 10, 6); in _mx27_clocks_init()
85 clk[IMX27_CLK_USB_DIV] = imx_clk_divider("usb_div", "spll_gate", CCM_CSCR, 28, 3); in _mx27_clocks_init()
90 clk[IMX27_CLK_CPU_DIV] = imx_clk_divider("cpu_div", "cpu_sel", CCM_CSCR, 12, 2); in _mx27_clocks_init()
92 clk[IMX27_CLK_CPU_DIV] = imx_clk_divider("cpu_div", "cpu_sel", CCM_CSCR, 13, 3); in _mx27_clocks_init()
94 clk[IMX27_CLK_CLKO_DIV] = imx_clk_divider("clko_div", "clko_sel", CCM_PCDR0, 22, 3); in _mx27_clocks_init()
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| H A D | clk-imx25.c | 85 clk[cpu] = imx_clk_divider("cpu", "cpu_sel", ccm(CCM_CCTL), 30, 2); in __mx25_clocks_init()
86 clk[ahb] = imx_clk_divider("ahb", "cpu", ccm(CCM_CCTL), 28, 2); in __mx25_clocks_init()
108 clk[per0] = imx_clk_divider("per0", "per0_sel", ccm(CCM_PCDR0), 0, 6); in __mx25_clocks_init()
109 clk[per1] = imx_clk_divider("per1", "per1_sel", ccm(CCM_PCDR0), 8, 6); in __mx25_clocks_init()
110 clk[per2] = imx_clk_divider("per2", "per2_sel", ccm(CCM_PCDR0), 16, 6); in __mx25_clocks_init()
111 clk[per3] = imx_clk_divider("per3", "per3_sel", ccm(CCM_PCDR0), 24, 6); in __mx25_clocks_init()
112 clk[per4] = imx_clk_divider("per4", "per4_sel", ccm(CCM_PCDR1), 0, 6); in __mx25_clocks_init()
113 clk[per5] = imx_clk_divider("per5", "per5_sel", ccm(CCM_PCDR1), 8, 6); in __mx25_clocks_init()
114 clk[per6] = imx_clk_divider("per6", "per6_sel", ccm(CCM_PCDR1), 16, 6); in __mx25_clocks_init()
116 clk[per8] = imx_clk_divider("per8", "per8_sel", ccm(CCM_PCDR2), 0, 6); in __mx25_clocks_init()
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| H A D | clk-imx1.c | 51 clk[IMX1_CLK_MCU] = imx_clk_divider("mcu", "clk32_premult", CCM_CSCR, 15, 1); in mx1_clocks_init_dt()
52 clk[IMX1_CLK_FCLK] = imx_clk_divider("fclk", "mpll_gate", CCM_CSCR, 15, 1); in mx1_clocks_init_dt()
53 clk[IMX1_CLK_HCLK] = imx_clk_divider("hclk", "spll_gate", CCM_CSCR, 10, 4); in mx1_clocks_init_dt()
54 clk[IMX1_CLK_CLK48M] = imx_clk_divider("clk48m", "spll_gate", CCM_CSCR, 26, 3); in mx1_clocks_init_dt()
55 clk[IMX1_CLK_PER1] = imx_clk_divider("per1", "spll_gate", CCM_PCDR, 0, 4); in mx1_clocks_init_dt()
56 clk[IMX1_CLK_PER2] = imx_clk_divider("per2", "spll_gate", CCM_PCDR, 4, 4); in mx1_clocks_init_dt()
57 clk[IMX1_CLK_PER3] = imx_clk_divider("per3", "spll_gate", CCM_PCDR, 16, 7); in mx1_clocks_init_dt()
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| H A D | clk-imx35.c | 135 clk[arm_per_div] = imx_clk_divider("arm_per_div", "arm", base + MX35_CCM_PDR4, 16, 6); in _mx35_clocks_init()
136 clk[ahb_per_div] = imx_clk_divider("ahb_per_div", "ahb", base + MXC_CCM_PDR0, 12, 3); in _mx35_clocks_init()
140 clk[uart_div] = imx_clk_divider("uart_div", "uart_sel", base + MX35_CCM_PDR4, 10, 6); in _mx35_clocks_init()
143 clk[esdhc1_div] = imx_clk_divider("esdhc1_div", "esdhc_sel", base + MX35_CCM_PDR3, 0, 6); in _mx35_clocks_init()
144 clk[esdhc2_div] = imx_clk_divider("esdhc2_div", "esdhc_sel", base + MX35_CCM_PDR3, 8, 6); in _mx35_clocks_init()
145 clk[esdhc3_div] = imx_clk_divider("esdhc3_div", "esdhc_sel", base + MX35_CCM_PDR3, 16, 6); in _mx35_clocks_init()
152 clk[ssi1_div_pre] = imx_clk_divider("ssi1_div_pre", "ssi_sel", base + MX35_CCM_PDR2, 24, 3); in _mx35_clocks_init()
154 clk[ssi2_div_pre] = imx_clk_divider("ssi2_div_pre", "ssi_sel", base + MX35_CCM_PDR2, 27, 3); in _mx35_clocks_init()
158 clk[usb_div] = imx_clk_divider("usb_div", "usb_sel", base + MX35_CCM_PDR4, 22, 6); in _mx35_clocks_init()
160 clk[nfc_div] = imx_clk_divider("nfc_div", "ahb", base + MX35_CCM_PDR4, 28, 4); in _mx35_clocks_init()
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| H A D | clk-vf610.c | 273 clk[VF610_CLK_SYS_BUS] = imx_clk_divider("sys_bus", "sys_sel", CCM_CACRR, 0, 3); in vf610_clocks_init()
275 clk[VF610_CLK_IPG_BUS] = imx_clk_divider("ipg_bus", "platform_bus", CCM_CACRR, 11, 2); in vf610_clocks_init()
292 clk[VF610_CLK_QSPI0_X4_DIV] = imx_clk_divider("qspi0_x4", "qspi0_en", CCM_CSCDR3, 0, 2); in vf610_clocks_init()
372 clk[VF610_CLK_DCU0_DIV] = imx_clk_divider("dcu0_div", "dcu0_en", CCM_CSCDR3, 16, 3); in vf610_clocks_init()
376 clk[VF610_CLK_DCU1_DIV] = imx_clk_divider("dcu1_div", "dcu1_en", CCM_CSCDR3, 20, 3); in vf610_clocks_init()
384 clk[VF610_CLK_ESAI_DIV] = imx_clk_divider("esai_div", "esai_en", CCM_CSCDR2, 24, 4); in vf610_clocks_init()
389 clk[VF610_CLK_SAI0_DIV] = imx_clk_divider("sai0_div", "sai0_en", CCM_CSCDR1, 0, 4); in vf610_clocks_init()
394 clk[VF610_CLK_SAI1_DIV] = imx_clk_divider("sai1_div", "sai1_en", CCM_CSCDR1, 4, 4); in vf610_clocks_init()
399 clk[VF610_CLK_SAI2_DIV] = imx_clk_divider("sai2_div", "sai2_en", CCM_CSCDR1, 8, 4); in vf610_clocks_init()
404 clk[VF610_CLK_SAI3_DIV] = imx_clk_divider("sai3_div", "sai3_en", CCM_CSCDR1, 12, 4); in vf610_clocks_init()
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/clk/imx/ |
| H A D | clk-imx5.c | 141 clk[IMX5_CLK_PER_PRED1] = imx_clk_divider("per_pred1", "per_lp_apm", MXC_CCM_CBCDR, 6, 2); in mx5_clocks_common_init()
142 clk[IMX5_CLK_PER_PRED2] = imx_clk_divider("per_pred2", "per_pred1", MXC_CCM_CBCDR, 3, 3); in mx5_clocks_common_init()
143 clk[IMX5_CLK_PER_PODF] = imx_clk_divider("per_podf", "per_pred2", MXC_CCM_CBCDR, 0, 3); in mx5_clocks_common_init()
146 clk[IMX5_CLK_AHB] = imx_clk_divider("ahb", "main_bus", MXC_CCM_CBCDR, 10, 3); in mx5_clocks_common_init()
154 clk[IMX5_CLK_IPG] = imx_clk_divider("ipg", "ahb", MXC_CCM_CBCDR, 8, 2); in mx5_clocks_common_init()
155 clk[IMX5_CLK_AXI_A] = imx_clk_divider("axi_a", "main_bus", MXC_CCM_CBCDR, 16, 3); in mx5_clocks_common_init()
156 clk[IMX5_CLK_AXI_B] = imx_clk_divider("axi_b", "main_bus", MXC_CCM_CBCDR, 19, 3); in mx5_clocks_common_init()
159 clk[IMX5_CLK_UART_PRED] = imx_clk_divider("uart_pred", "uart_sel", MXC_CCM_CSCDR1, 3, 3); in mx5_clocks_common_init()
160 clk[IMX5_CLK_UART_ROOT] = imx_clk_divider("uart_root", "uart_pred", MXC_CCM_CSCDR1, 0, 3); in mx5_clocks_common_init()
186 clk[IMX5_CLK_DI_PRED] = imx_clk_divider("di_pred", "pll3_sw", MXC_CCM_CDCDR, 6, 3); in mx5_clocks_common_init()
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| H A D | clk-imx27.c | 70 clk[IMX27_CLK_AHB] = imx_clk_divider("ahb", "mpll_main2", CCM_CSCR, 8, 2); in _mx27_clocks_init()
73 clk[IMX27_CLK_AHB] = imx_clk_divider("ahb", "mpll_main2", CCM_CSCR, 9, 4); in _mx27_clocks_init()
74 clk[IMX27_CLK_IPG] = imx_clk_divider("ipg", "ahb", CCM_CSCR, 8, 1); in _mx27_clocks_init()
77 clk[IMX27_CLK_MSHC_DIV] = imx_clk_divider("mshc_div", "ahb", CCM_PCDR0, 0, 6); in _mx27_clocks_init()
78 clk[IMX27_CLK_NFC_DIV] = imx_clk_divider("nfc_div", "ahb", CCM_PCDR0, 6, 4); in _mx27_clocks_init()
84 clk[IMX27_CLK_VPU_DIV] = imx_clk_divider("vpu_div", "vpu_sel", CCM_PCDR0, 10, 6); in _mx27_clocks_init()
85 clk[IMX27_CLK_USB_DIV] = imx_clk_divider("usb_div", "spll_gate", CCM_CSCR, 28, 3); in _mx27_clocks_init()
90 clk[IMX27_CLK_CPU_DIV] = imx_clk_divider("cpu_div", "cpu_sel", CCM_CSCR, 12, 2); in _mx27_clocks_init()
92 clk[IMX27_CLK_CPU_DIV] = imx_clk_divider("cpu_div", "cpu_sel", CCM_CSCR, 13, 3); in _mx27_clocks_init()
94 clk[IMX27_CLK_CLKO_DIV] = imx_clk_divider("clko_div", "clko_sel", CCM_PCDR0, 22, 3); in _mx27_clocks_init()
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| H A D | clk-imx25.c | 85 clk[cpu] = imx_clk_divider("cpu", "cpu_sel", ccm(CCM_CCTL), 30, 2); in __mx25_clocks_init()
86 clk[ahb] = imx_clk_divider("ahb", "cpu", ccm(CCM_CCTL), 28, 2); in __mx25_clocks_init()
108 clk[per0] = imx_clk_divider("per0", "per0_sel", ccm(CCM_PCDR0), 0, 6); in __mx25_clocks_init()
109 clk[per1] = imx_clk_divider("per1", "per1_sel", ccm(CCM_PCDR0), 8, 6); in __mx25_clocks_init()
110 clk[per2] = imx_clk_divider("per2", "per2_sel", ccm(CCM_PCDR0), 16, 6); in __mx25_clocks_init()
111 clk[per3] = imx_clk_divider("per3", "per3_sel", ccm(CCM_PCDR0), 24, 6); in __mx25_clocks_init()
112 clk[per4] = imx_clk_divider("per4", "per4_sel", ccm(CCM_PCDR1), 0, 6); in __mx25_clocks_init()
113 clk[per5] = imx_clk_divider("per5", "per5_sel", ccm(CCM_PCDR1), 8, 6); in __mx25_clocks_init()
114 clk[per6] = imx_clk_divider("per6", "per6_sel", ccm(CCM_PCDR1), 16, 6); in __mx25_clocks_init()
116 clk[per8] = imx_clk_divider("per8", "per8_sel", ccm(CCM_PCDR2), 0, 6); in __mx25_clocks_init()
[all …]
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| H A D | clk-imx1.c | 51 clk[IMX1_CLK_MCU] = imx_clk_divider("mcu", "clk32_premult", CCM_CSCR, 15, 1); in mx1_clocks_init_dt()
52 clk[IMX1_CLK_FCLK] = imx_clk_divider("fclk", "mpll_gate", CCM_CSCR, 15, 1); in mx1_clocks_init_dt()
53 clk[IMX1_CLK_HCLK] = imx_clk_divider("hclk", "spll_gate", CCM_CSCR, 10, 4); in mx1_clocks_init_dt()
54 clk[IMX1_CLK_CLK48M] = imx_clk_divider("clk48m", "spll_gate", CCM_CSCR, 26, 3); in mx1_clocks_init_dt()
55 clk[IMX1_CLK_PER1] = imx_clk_divider("per1", "spll_gate", CCM_PCDR, 0, 4); in mx1_clocks_init_dt()
56 clk[IMX1_CLK_PER2] = imx_clk_divider("per2", "spll_gate", CCM_PCDR, 4, 4); in mx1_clocks_init_dt()
57 clk[IMX1_CLK_PER3] = imx_clk_divider("per3", "spll_gate", CCM_PCDR, 16, 7); in mx1_clocks_init_dt()
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| H A D | clk-imx35.c | 135 clk[arm_per_div] = imx_clk_divider("arm_per_div", "arm", base + MX35_CCM_PDR4, 16, 6); in _mx35_clocks_init()
136 clk[ahb_per_div] = imx_clk_divider("ahb_per_div", "ahb", base + MXC_CCM_PDR0, 12, 3); in _mx35_clocks_init()
140 clk[uart_div] = imx_clk_divider("uart_div", "uart_sel", base + MX35_CCM_PDR4, 10, 6); in _mx35_clocks_init()
143 clk[esdhc1_div] = imx_clk_divider("esdhc1_div", "esdhc_sel", base + MX35_CCM_PDR3, 0, 6); in _mx35_clocks_init()
144 clk[esdhc2_div] = imx_clk_divider("esdhc2_div", "esdhc_sel", base + MX35_CCM_PDR3, 8, 6); in _mx35_clocks_init()
145 clk[esdhc3_div] = imx_clk_divider("esdhc3_div", "esdhc_sel", base + MX35_CCM_PDR3, 16, 6); in _mx35_clocks_init()
152 clk[ssi1_div_pre] = imx_clk_divider("ssi1_div_pre", "ssi_sel", base + MX35_CCM_PDR2, 24, 3); in _mx35_clocks_init()
154 clk[ssi2_div_pre] = imx_clk_divider("ssi2_div_pre", "ssi_sel", base + MX35_CCM_PDR2, 27, 3); in _mx35_clocks_init()
158 clk[usb_div] = imx_clk_divider("usb_div", "usb_sel", base + MX35_CCM_PDR4, 22, 6); in _mx35_clocks_init()
160 clk[nfc_div] = imx_clk_divider("nfc_div", "ahb", base + MX35_CCM_PDR4, 28, 4); in _mx35_clocks_init()
[all …]
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| H A D | clk-vf610.c | 273 clk[VF610_CLK_SYS_BUS] = imx_clk_divider("sys_bus", "sys_sel", CCM_CACRR, 0, 3); in vf610_clocks_init()
275 clk[VF610_CLK_IPG_BUS] = imx_clk_divider("ipg_bus", "platform_bus", CCM_CACRR, 11, 2); in vf610_clocks_init()
292 clk[VF610_CLK_QSPI0_X4_DIV] = imx_clk_divider("qspi0_x4", "qspi0_en", CCM_CSCDR3, 0, 2); in vf610_clocks_init()
372 clk[VF610_CLK_DCU0_DIV] = imx_clk_divider("dcu0_div", "dcu0_en", CCM_CSCDR3, 16, 3); in vf610_clocks_init()
376 clk[VF610_CLK_DCU1_DIV] = imx_clk_divider("dcu1_div", "dcu1_en", CCM_CSCDR3, 20, 3); in vf610_clocks_init()
384 clk[VF610_CLK_ESAI_DIV] = imx_clk_divider("esai_div", "esai_en", CCM_CSCDR2, 24, 4); in vf610_clocks_init()
389 clk[VF610_CLK_SAI0_DIV] = imx_clk_divider("sai0_div", "sai0_en", CCM_CSCDR1, 0, 4); in vf610_clocks_init()
394 clk[VF610_CLK_SAI1_DIV] = imx_clk_divider("sai1_div", "sai1_en", CCM_CSCDR1, 4, 4); in vf610_clocks_init()
399 clk[VF610_CLK_SAI2_DIV] = imx_clk_divider("sai2_div", "sai2_en", CCM_CSCDR1, 8, 4); in vf610_clocks_init()
404 clk[VF610_CLK_SAI3_DIV] = imx_clk_divider("sai3_div", "sai3_en", CCM_CSCDR1, 12, 4); in vf610_clocks_init()
[all …]
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| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/clk/imx/ |
| H A D | clk-imxrt1050.c | 172 imx_clk_divider("video_post_div_sel", "pll5_video", in imxrt1050_clk_probe()
175 imx_clk_divider("video_div", "video_post_div_sel", in imxrt1050_clk_probe()
200 imx_clk_divider("arm_podf", "pll1_arm", in imxrt1050_clk_probe()
229 imx_clk_divider("ahb_podf", "periph_sel", in imxrt1050_clk_probe()
232 imx_clk_divider("usdhc1_podf", "usdhc1_sel", in imxrt1050_clk_probe()
235 imx_clk_divider("usdhc2_podf", "usdhc2_sel", in imxrt1050_clk_probe()
238 imx_clk_divider("lpuart_podf", "lpuart_sel", in imxrt1050_clk_probe()
241 imx_clk_divider("semc_podf", "semc_sel", in imxrt1050_clk_probe()
244 imx_clk_divider("lcdif_pred", "lcdif_sel", in imxrt1050_clk_probe()
247 imx_clk_divider("lcdif_podf", "lcdif_pred", in imxrt1050_clk_probe()
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| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/clk/imx/ |
| H A D | clk-imxrt1050.c | 172 imx_clk_divider("video_post_div_sel", "pll5_video", in imxrt1050_clk_probe()
175 imx_clk_divider("video_div", "video_post_div_sel", in imxrt1050_clk_probe()
200 imx_clk_divider("arm_podf", "pll1_arm", in imxrt1050_clk_probe()
229 imx_clk_divider("ahb_podf", "periph_sel", in imxrt1050_clk_probe()
232 imx_clk_divider("usdhc1_podf", "usdhc1_sel", in imxrt1050_clk_probe()
235 imx_clk_divider("usdhc2_podf", "usdhc2_sel", in imxrt1050_clk_probe()
238 imx_clk_divider("lpuart_podf", "lpuart_sel", in imxrt1050_clk_probe()
241 imx_clk_divider("semc_podf", "semc_sel", in imxrt1050_clk_probe()
244 imx_clk_divider("lcdif_pred", "lcdif_sel", in imxrt1050_clk_probe()
247 imx_clk_divider("lcdif_podf", "lcdif_pred", in imxrt1050_clk_probe()
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| /dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/clk/imx/ |
| H A D | clk-imxrt1050.c | 172 imx_clk_divider("video_post_div_sel", "pll5_video", in imxrt1050_clk_probe()
175 imx_clk_divider("video_div", "video_post_div_sel", in imxrt1050_clk_probe()
200 imx_clk_divider("arm_podf", "pll1_arm", in imxrt1050_clk_probe()
229 imx_clk_divider("ahb_podf", "periph_sel", in imxrt1050_clk_probe()
232 imx_clk_divider("usdhc1_podf", "usdhc1_sel", in imxrt1050_clk_probe()
235 imx_clk_divider("usdhc2_podf", "usdhc2_sel", in imxrt1050_clk_probe()
238 imx_clk_divider("lpuart_podf", "lpuart_sel", in imxrt1050_clk_probe()
241 imx_clk_divider("semc_podf", "semc_sel", in imxrt1050_clk_probe()
244 imx_clk_divider("lcdif_pred", "lcdif_sel", in imxrt1050_clk_probe()
247 imx_clk_divider("lcdif_podf", "lcdif_pred", in imxrt1050_clk_probe()
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| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/clk/imx/ |
| H A D | clk-imxrt1050.c | 172 imx_clk_divider("video_post_div_sel", "pll5_video", in imxrt1050_clk_probe()
175 imx_clk_divider("video_div", "video_post_div_sel", in imxrt1050_clk_probe()
200 imx_clk_divider("arm_podf", "pll1_arm", in imxrt1050_clk_probe()
229 imx_clk_divider("ahb_podf", "periph_sel", in imxrt1050_clk_probe()
232 imx_clk_divider("usdhc1_podf", "usdhc1_sel", in imxrt1050_clk_probe()
235 imx_clk_divider("usdhc2_podf", "usdhc2_sel", in imxrt1050_clk_probe()
238 imx_clk_divider("lpuart_podf", "lpuart_sel", in imxrt1050_clk_probe()
241 imx_clk_divider("semc_podf", "semc_sel", in imxrt1050_clk_probe()
244 imx_clk_divider("lcdif_pred", "lcdif_sel", in imxrt1050_clk_probe()
247 imx_clk_divider("lcdif_podf", "lcdif_pred", in imxrt1050_clk_probe()
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| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/clk/imx/ |
| H A D | clk-imxrt1050.c | 172 imx_clk_divider("video_post_div_sel", "pll5_video", in imxrt1050_clk_probe()
175 imx_clk_divider("video_div", "video_post_div_sel", in imxrt1050_clk_probe()
200 imx_clk_divider("arm_podf", "pll1_arm", in imxrt1050_clk_probe()
229 imx_clk_divider("ahb_podf", "periph_sel", in imxrt1050_clk_probe()
232 imx_clk_divider("usdhc1_podf", "usdhc1_sel", in imxrt1050_clk_probe()
235 imx_clk_divider("usdhc2_podf", "usdhc2_sel", in imxrt1050_clk_probe()
238 imx_clk_divider("lpuart_podf", "lpuart_sel", in imxrt1050_clk_probe()
241 imx_clk_divider("semc_podf", "semc_sel", in imxrt1050_clk_probe()
244 imx_clk_divider("lcdif_pred", "lcdif_sel", in imxrt1050_clk_probe()
247 imx_clk_divider("lcdif_podf", "lcdif_pred", in imxrt1050_clk_probe()
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| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/clk/imx/ |
| H A D | clk-imxrt1050.c | 172 imx_clk_divider("video_post_div_sel", "pll5_video", in imxrt1050_clk_probe()
175 imx_clk_divider("video_div", "video_post_div_sel", in imxrt1050_clk_probe()
200 imx_clk_divider("arm_podf", "pll1_arm", in imxrt1050_clk_probe()
229 imx_clk_divider("ahb_podf", "periph_sel", in imxrt1050_clk_probe()
232 imx_clk_divider("usdhc1_podf", "usdhc1_sel", in imxrt1050_clk_probe()
235 imx_clk_divider("usdhc2_podf", "usdhc2_sel", in imxrt1050_clk_probe()
238 imx_clk_divider("lpuart_podf", "lpuart_sel", in imxrt1050_clk_probe()
241 imx_clk_divider("semc_podf", "semc_sel", in imxrt1050_clk_probe()
244 imx_clk_divider("lcdif_pred", "lcdif_sel", in imxrt1050_clk_probe()
247 imx_clk_divider("lcdif_podf", "lcdif_pred", in imxrt1050_clk_probe()
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| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/clk/imx/ |
| H A D | clk-imxrt1050.c | 172 imx_clk_divider("video_post_div_sel", "pll5_video", in imxrt1050_clk_probe()
175 imx_clk_divider("video_div", "video_post_div_sel", in imxrt1050_clk_probe()
200 imx_clk_divider("arm_podf", "pll1_arm", in imxrt1050_clk_probe()
229 imx_clk_divider("ahb_podf", "periph_sel", in imxrt1050_clk_probe()
232 imx_clk_divider("usdhc1_podf", "usdhc1_sel", in imxrt1050_clk_probe()
235 imx_clk_divider("usdhc2_podf", "usdhc2_sel", in imxrt1050_clk_probe()
238 imx_clk_divider("lpuart_podf", "lpuart_sel", in imxrt1050_clk_probe()
241 imx_clk_divider("semc_podf", "semc_sel", in imxrt1050_clk_probe()
244 imx_clk_divider("lcdif_pred", "lcdif_sel", in imxrt1050_clk_probe()
247 imx_clk_divider("lcdif_podf", "lcdif_pred", in imxrt1050_clk_probe()
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