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/dports/net-mgmt/kismet/kismet-2016-07-R1/
H A Dnetframework.h65 virtual void RegisterGlobals(GlobalRegistry *in_reg) { in RegisterGlobals() argument
66 globalreg = in_reg; in RegisterGlobals()
176 ServerFramework(GlobalRegistry *in_reg) { in ServerFramework() argument
177 globalreg = in_reg; in ServerFramework()
184 virtual void RegisterGlobals(GlobalRegistry *in_reg) { in RegisterGlobals() argument
185 globalreg = in_reg; in RegisterGlobals()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/tests/
H A Divshmem-test.c71 static inline unsigned in_reg(IVState *s, enum Reg reg) in in_reg() function
171 g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0); in test_ivshmem_single()
172 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0); in test_ivshmem_single()
173 g_assert_cmpuint(in_reg(s, IVPOSITION), ==, 0); in test_ivshmem_single()
180 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 1); in test_ivshmem_single()
182 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0); in test_ivshmem_single()
187 in_reg(s, DOORBELL); in test_ivshmem_single()
350 vm1 = in_reg(s1, IVPOSITION); in test_ivshmem_server()
351 vm2 = in_reg(s2, IVPOSITION); in test_ivshmem_server()
370 g_assert_cmpuint(in_reg(s1, INTRSTATUS), ==, 0); in test_ivshmem_server()
[all …]
/dports/x11-drivers/xorgxrdp/xorgxrdp-0.2.17/module/
H A DrdpCapture.c598 num_rects = REGION_NUM_RECTS(in_reg); in rdpCapture0()
599 psrc_rects = REGION_RECTS(in_reg); in rdpCapture0()
707 num_rects = REGION_NUM_RECTS(in_reg); in rdpCapture1()
708 psrc_rects = REGION_RECTS(in_reg); in rdpCapture1()
864 extents_rect = *rdpRegionExtents(in_reg); in rdpCapture2()
963 num_rects = REGION_NUM_RECTS(in_reg); in rdpCapture3()
964 psrc_rects = REGION_RECTS(in_reg); in rdpCapture3()
1025 copy_vmem(rdpPtr dev, RegionPtr in_reg) in copy_vmem() argument
1051 count = REGION_NUM_RECTS(in_reg); in copy_vmem()
1052 pbox = REGION_RECTS(in_reg); in copy_vmem()
[all …]
/dports/lang/rust/rustc-1.58.1-src/compiler/rustc_codegen_llvm/src/
H A Dva_arg.rs106 let mut in_reg = bx.build_sibling_block("va_arg.in_reg"); in emit_aapcs_va_arg() localVariable
145 maybe_reg.cond_br(use_stack, on_stack.llbb(), in_reg.llbb()); in emit_aapcs_va_arg()
148 let top = in_reg.struct_gep(va_list_ty, va_list_addr, reg_top_index); in emit_aapcs_va_arg()
149 let top = in_reg.load(top_type, top, bx.tcx().data_layout.pointer_align.abi); in emit_aapcs_va_arg()
152 let mut reg_addr = in_reg.gep(bx.type_i8(), top, &[reg_off_v]); in emit_aapcs_va_arg()
156 reg_addr = in_reg.gep(bx.type_i8(), reg_addr, &[offset]); in emit_aapcs_va_arg()
159 let reg_addr = in_reg.bitcast(reg_addr, bx.cx.type_ptr_to(reg_type)); in emit_aapcs_va_arg()
160 let reg_value = in_reg.load(reg_type, reg_addr, layout.align.abi); in emit_aapcs_va_arg()
161 in_reg.br(end.llbb()); in emit_aapcs_va_arg()
171 &[in_reg.llbb(), on_stack.llbb()], in emit_aapcs_va_arg()
/dports/emulators/qemu-utils/qemu-4.2.1/tests/
H A Divshmem-test.c71 static inline unsigned in_reg(IVState *s, enum Reg reg) in in_reg() function
156 g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0); in test_ivshmem_single()
157 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0); in test_ivshmem_single()
158 g_assert_cmpuint(in_reg(s, IVPOSITION), ==, 0); in test_ivshmem_single()
162 g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0xffffffff); in test_ivshmem_single()
165 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 1); in test_ivshmem_single()
167 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0); in test_ivshmem_single()
172 in_reg(s, DOORBELL); in test_ivshmem_single()
335 vm1 = in_reg(s1, IVPOSITION); in test_ivshmem_server()
336 vm2 = in_reg(s2, IVPOSITION); in test_ivshmem_server()
/dports/emulators/qemu5/qemu-5.2.0/tests/qtest/
H A Divshmem-test.c71 static inline unsigned in_reg(IVState *s, enum Reg reg) in in_reg() function
156 g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0); in test_ivshmem_single()
157 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0); in test_ivshmem_single()
158 g_assert_cmpuint(in_reg(s, IVPOSITION), ==, 0); in test_ivshmem_single()
162 g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0xffffffff); in test_ivshmem_single()
165 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 1); in test_ivshmem_single()
167 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0); in test_ivshmem_single()
172 in_reg(s, DOORBELL); in test_ivshmem_single()
335 vm1 = in_reg(s1, IVPOSITION); in test_ivshmem_server()
336 vm2 = in_reg(s2, IVPOSITION); in test_ivshmem_server()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/tests/qtest/
H A Divshmem-test.c71 static inline unsigned in_reg(IVState *s, enum Reg reg) in in_reg() function
156 g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0); in test_ivshmem_single()
157 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0); in test_ivshmem_single()
158 g_assert_cmpuint(in_reg(s, IVPOSITION), ==, 0); in test_ivshmem_single()
162 g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0xffffffff); in test_ivshmem_single()
165 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 1); in test_ivshmem_single()
167 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0); in test_ivshmem_single()
172 in_reg(s, DOORBELL); in test_ivshmem_single()
335 vm1 = in_reg(s1, IVPOSITION); in test_ivshmem_server()
336 vm2 = in_reg(s2, IVPOSITION); in test_ivshmem_server()
/dports/emulators/qemu42/qemu-4.2.1/tests/
H A Divshmem-test.c71 static inline unsigned in_reg(IVState *s, enum Reg reg) in in_reg() function
156 g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0); in test_ivshmem_single()
157 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0); in test_ivshmem_single()
158 g_assert_cmpuint(in_reg(s, IVPOSITION), ==, 0); in test_ivshmem_single()
162 g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0xffffffff); in test_ivshmem_single()
165 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 1); in test_ivshmem_single()
167 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0); in test_ivshmem_single()
172 in_reg(s, DOORBELL); in test_ivshmem_single()
335 vm1 = in_reg(s1, IVPOSITION); in test_ivshmem_server()
336 vm2 = in_reg(s2, IVPOSITION); in test_ivshmem_server()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/tests/qtest/
H A Divshmem-test.c71 static inline unsigned in_reg(IVState *s, enum Reg reg) in in_reg() function
156 g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0); in test_ivshmem_single()
157 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0); in test_ivshmem_single()
158 g_assert_cmpuint(in_reg(s, IVPOSITION), ==, 0); in test_ivshmem_single()
162 g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0xffffffff); in test_ivshmem_single()
165 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 1); in test_ivshmem_single()
167 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0); in test_ivshmem_single()
172 in_reg(s, DOORBELL); in test_ivshmem_single()
335 vm1 = in_reg(s1, IVPOSITION); in test_ivshmem_server()
336 vm2 = in_reg(s2, IVPOSITION); in test_ivshmem_server()
/dports/emulators/qemu/qemu-6.2.0/tests/qtest/
H A Divshmem-test.c71 static inline unsigned in_reg(IVState *s, enum Reg reg) in in_reg() function
156 g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0); in test_ivshmem_single()
157 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0); in test_ivshmem_single()
158 g_assert_cmpuint(in_reg(s, IVPOSITION), ==, 0); in test_ivshmem_single()
162 g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0xffffffff); in test_ivshmem_single()
165 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 1); in test_ivshmem_single()
167 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0); in test_ivshmem_single()
172 in_reg(s, DOORBELL); in test_ivshmem_single()
335 vm1 = in_reg(s1, IVPOSITION); in test_ivshmem_server()
336 vm2 = in_reg(s2, IVPOSITION); in test_ivshmem_server()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/tests/qtest/
H A Divshmem-test.c71 static inline unsigned in_reg(IVState *s, enum Reg reg) in in_reg() function
156 g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0); in test_ivshmem_single()
157 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0); in test_ivshmem_single()
158 g_assert_cmpuint(in_reg(s, IVPOSITION), ==, 0); in test_ivshmem_single()
162 g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0xffffffff); in test_ivshmem_single()
165 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 1); in test_ivshmem_single()
167 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0); in test_ivshmem_single()
172 in_reg(s, DOORBELL); in test_ivshmem_single()
335 vm1 = in_reg(s1, IVPOSITION); in test_ivshmem_server()
336 vm2 = in_reg(s2, IVPOSITION); in test_ivshmem_server()
/dports/emulators/qemu60/qemu-6.0.0/tests/qtest/
H A Divshmem-test.c71 static inline unsigned in_reg(IVState *s, enum Reg reg) in in_reg() function
156 g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0); in test_ivshmem_single()
157 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0); in test_ivshmem_single()
158 g_assert_cmpuint(in_reg(s, IVPOSITION), ==, 0); in test_ivshmem_single()
162 g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0xffffffff); in test_ivshmem_single()
165 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 1); in test_ivshmem_single()
167 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0); in test_ivshmem_single()
172 in_reg(s, DOORBELL); in test_ivshmem_single()
335 vm1 = in_reg(s1, IVPOSITION); in test_ivshmem_server()
336 vm2 = in_reg(s2, IVPOSITION); in test_ivshmem_server()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll33 br i1 %inreg, label %vaarg.in_reg, label %vaarg.on_stack
35 vaarg.in_reg: ; preds = %vaarg.maybe_reg
52 vaarg.end: ; preds = %vaarg.on_stack, %vaarg.in_reg
53 %.sink = phi i8* [ %4, %vaarg.in_reg ], [ %stack, %vaarg.on_stack ]
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll33 br i1 %inreg, label %vaarg.in_reg, label %vaarg.on_stack
35 vaarg.in_reg: ; preds = %vaarg.maybe_reg
52 vaarg.end: ; preds = %vaarg.on_stack, %vaarg.in_reg
53 %.sink = phi i8* [ %4, %vaarg.in_reg ], [ %stack, %vaarg.on_stack ]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll33 br i1 %inreg, label %vaarg.in_reg, label %vaarg.on_stack
35 vaarg.in_reg: ; preds = %vaarg.maybe_reg
52 vaarg.end: ; preds = %vaarg.on_stack, %vaarg.in_reg
53 %.sink = phi i8* [ %4, %vaarg.in_reg ], [ %stack, %vaarg.on_stack ]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll33 br i1 %inreg, label %vaarg.in_reg, label %vaarg.on_stack
35 vaarg.in_reg: ; preds = %vaarg.maybe_reg
52 vaarg.end: ; preds = %vaarg.on_stack, %vaarg.in_reg
53 %.sink = phi i8* [ %4, %vaarg.in_reg ], [ %stack, %vaarg.on_stack ]
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll33 br i1 %inreg, label %vaarg.in_reg, label %vaarg.on_stack
35 vaarg.in_reg: ; preds = %vaarg.maybe_reg
52 vaarg.end: ; preds = %vaarg.on_stack, %vaarg.in_reg
53 %.sink = phi i8* [ %4, %vaarg.in_reg ], [ %stack, %vaarg.on_stack ]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll33 br i1 %inreg, label %vaarg.in_reg, label %vaarg.on_stack
35 vaarg.in_reg: ; preds = %vaarg.maybe_reg
52 vaarg.end: ; preds = %vaarg.on_stack, %vaarg.in_reg
53 %.sink = phi i8* [ %4, %vaarg.in_reg ], [ %stack, %vaarg.on_stack ]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll33 br i1 %inreg, label %vaarg.in_reg, label %vaarg.on_stack
35 vaarg.in_reg: ; preds = %vaarg.maybe_reg
52 vaarg.end: ; preds = %vaarg.on_stack, %vaarg.in_reg
53 %.sink = phi i8* [ %4, %vaarg.in_reg ], [ %stack, %vaarg.on_stack ]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll33 br i1 %inreg, label %vaarg.in_reg, label %vaarg.on_stack
35 vaarg.in_reg: ; preds = %vaarg.maybe_reg
52 vaarg.end: ; preds = %vaarg.on_stack, %vaarg.in_reg
53 %.sink = phi i8* [ %4, %vaarg.in_reg ], [ %stack, %vaarg.on_stack ]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll33 br i1 %inreg, label %vaarg.in_reg, label %vaarg.on_stack
35 vaarg.in_reg: ; preds = %vaarg.maybe_reg
52 vaarg.end: ; preds = %vaarg.on_stack, %vaarg.in_reg
53 %.sink = phi i8* [ %4, %vaarg.in_reg ], [ %stack, %vaarg.on_stack ]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll33 br i1 %inreg, label %vaarg.in_reg, label %vaarg.on_stack
35 vaarg.in_reg: ; preds = %vaarg.maybe_reg
52 vaarg.end: ; preds = %vaarg.on_stack, %vaarg.in_reg
53 %.sink = phi i8* [ %4, %vaarg.in_reg ], [ %stack, %vaarg.on_stack ]
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll33 br i1 %inreg, label %vaarg.in_reg, label %vaarg.on_stack
35 vaarg.in_reg: ; preds = %vaarg.maybe_reg
52 vaarg.end: ; preds = %vaarg.on_stack, %vaarg.in_reg
53 %.sink = phi i8* [ %4, %vaarg.in_reg ], [ %stack, %vaarg.on_stack ]
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll33 br i1 %inreg, label %vaarg.in_reg, label %vaarg.on_stack
35 vaarg.in_reg: ; preds = %vaarg.maybe_reg
52 vaarg.end: ; preds = %vaarg.on_stack, %vaarg.in_reg
53 %.sink = phi i8* [ %4, %vaarg.in_reg ], [ %stack, %vaarg.on_stack ]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AArch64/
H A Darm64-big-endian-varargs.ll33 br i1 %inreg, label %vaarg.in_reg, label %vaarg.on_stack
35 vaarg.in_reg: ; preds = %vaarg.maybe_reg
52 vaarg.end: ; preds = %vaarg.on_stack, %vaarg.in_reg
53 %.sink = phi i8* [ %4, %vaarg.in_reg ], [ %stack, %vaarg.on_stack ]

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