| /dports/security/py-pyvex/pyvex-9.0.5405/vex/priv/ |
| H A D | host_tilegx_defs.c | 1339 static UInt iregNo ( HReg r ) in iregNo() function
1354 rA = iregNo(am->GXam.IR.base); in doAMode_IR()
1388 UInt rA = iregNo(am->GXam.IR.base); in do_load_or_store_machine_word()
1556 UInt r_dst = iregNo(i->GXin.Alu.dst); in emit_TILEGXInstr()
1822 UInt r_dst = iregNo(i->GXin.Cmp.dst); in emit_TILEGXInstr()
1922 UInt r_dst = iregNo(i->GXin.Bf.dst); in emit_TILEGXInstr()
1923 UInt r_src = iregNo(i->GXin.Bf.src); in emit_TILEGXInstr()
1957 UInt old = iregNo(i->GXin.Acas.old); in emit_TILEGXInstr()
1958 UInt addr= iregNo(i->GXin.Acas.addr); in emit_TILEGXInstr()
1959 UInt new = iregNo(i->GXin.Acas.new); in emit_TILEGXInstr()
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| H A D | host_mips_defs.c | 2034 inline static UInt iregNo(HReg r, Bool mode64) in iregNo() function
2173 rA = iregNo(am->Mam.IR.base, mode64); in doAMode_IR()
2212 rA = iregNo(am->Mam.RR.base, mode64); in doAMode_RR()
2213 rB = iregNo(am->Mam.RR.index, mode64); in doAMode_RR()
2526 UInt r_dst = iregNo(i->Min.Alu.dst, mode64); in emit_MIPSInstr()
2756 UInt r_dst = iregNo(i->Min.Cmp.dst, mode64); in emit_MIPSInstr()
2803 UInt r_dst = iregNo(i->Min.Mul.dst, mode64); in emit_MIPSInstr()
3312 UInt old = iregNo(i->Min.Cas.old, mode64); in emit_MIPSInstr()
3313 UInt addr = iregNo(i->Min.Cas.addr, mode64); in emit_MIPSInstr()
3314 UInt expd = iregNo(i->Min.Cas.expd, mode64); in emit_MIPSInstr()
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| H A D | guest_tilegx_toIR.c | 91 static Int integerGuestRegOffset ( UInt iregNo ) in integerGuestRegOffset() argument
93 return 8 * (iregNo); in integerGuestRegOffset()
184 static IRExpr *getIReg ( UInt iregNo ) in getIReg() argument
187 if(!(iregNo < 56 || iregNo == 63 || in getIReg()
188 (iregNo >= 70 && iregNo <= 73))) { in getIReg()
189 vex_printf("iregNo=%u\n", iregNo); in getIReg()
192 return IRExpr_Get(integerGuestRegOffset(iregNo), ty); in getIReg()
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| H A D | guest_arm64_toIR.c | 1167 switch (iregNo) {
1206 return iregNo == 31 ? OFFB_XSP : offsetIReg64(iregNo);
1222 if (iregNo == 31) {
1237 if (iregNo == 31) {
1253 if (iregNo == 31) {
1273 if (iregNo == 31) {
1289 if (iregNo == 31) {
1316 return is64 ? nameIReg64orSP(iregNo) : nameIReg32orSP(iregNo);
1322 return is64 ? nameIReg64orZR(iregNo) : nameIReg32orZR(iregNo);
1328 return is64 ? getIReg64orZR(iregNo) : getIReg32orZR(iregNo);
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| H A D | guest_arm_toIR.c | 530 switch (iregNo) { in integerGuestRegOffset()
554 vassert(iregNo < 16); in llGetIReg()
564 vassert(iregNo < 16); in getIRegA()
565 if (iregNo == 15) { in getIRegA()
586 vassert(iregNo < 16); in getIRegT()
587 if (iregNo == 15) { in getIRegT()
601 vassert(iregNo < 16); in llPutIReg()
629 llPutIReg( iregNo, in putIRegA()
633 if (iregNo == 15) { in putIRegA()
657 vassert(iregNo >= 0 && iregNo <= 14); in putIRegT()
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| H A D | guest_mips_toIR.c | 105 static UInt integerGuestRegOffset(UInt iregNo) in integerGuestRegOffset() argument
112 switch (iregNo) { in integerGuestRegOffset()
182 switch (iregNo) { in integerGuestRegOffset()
1061 static IRExpr *getIReg(UInt iregNo) in getIReg() argument
1063 if (0 == iregNo) { in getIReg()
1067 vassert(iregNo < 32); in getIReg()
1068 return IRExpr_Get(integerGuestRegOffset(iregNo), ty); in getIReg()
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| /dports/devel/valgrind-lts/valgrind-dragonfly-dragonfly/VEX/priv/ |
| H A D | host_mips_defs.c | 3189 inline static UInt iregNo(HReg r, Bool mode64) in iregNo() function
3439 rA = iregNo(am->Mam.IR.base, mode64); in doAMode_IR()
3478 rA = iregNo(am->Mam.RR.base, mode64); in doAMode_RR()
3479 rB = iregNo(am->Mam.RR.index, mode64); in doAMode_RR()
3793 UInt r_dst = iregNo(i->Min.Alu.dst, mode64); in emit_MIPSInstr()
4121 UInt r_dst = iregNo(i->Min.Rotx.rd, mode64); in emit_MIPSInstr()
4122 UInt r_src = iregNo(i->Min.Rotx.rt, mode64); in emit_MIPSInstr()
4176 UInt r_dst = iregNo(i->Min.Cmp.dst, mode64); in emit_MIPSInstr()
4220 UInt r_dst = iregNo(i->Min.Mul.dst, mode64); in emit_MIPSInstr()
4249 UInt r_src = iregNo(i->Min.Ext.src, mode64); in emit_MIPSInstr()
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| H A D | guest_arm64_toIR.c | 1161 switch (iregNo) { in offsetIReg64()
1200 return iregNo == 31 ? OFFB_XSP : offsetIReg64(iregNo); in offsetIReg64orSP()
1216 if (iregNo == 31) { in nameIReg64orSP()
1231 if (iregNo == 31) { in getIReg64orZR()
1247 if (iregNo == 31) { in putIReg64orZR()
1267 if (iregNo == 31) { in nameIReg32orSP()
1283 if (iregNo == 31) { in getIReg32orZR()
1310 return is64 ? nameIReg64orSP(iregNo) : nameIReg32orSP(iregNo); in nameIRegOrSP()
1316 return is64 ? nameIReg64orZR(iregNo) : nameIReg32orZR(iregNo); in nameIRegOrZR()
1322 return is64 ? getIReg64orZR(iregNo) : getIReg32orZR(iregNo); in getIRegOrZR()
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| H A D | guest_arm_toIR.c | 508 switch (iregNo) { in integerGuestRegOffset()
532 vassert(iregNo < 16); in llGetIReg()
542 vassert(iregNo < 16); in getIRegA()
543 if (iregNo == 15) { in getIRegA()
564 vassert(iregNo < 16); in getIRegT()
565 if (iregNo == 15) { in getIRegT()
579 vassert(iregNo < 16); in llPutIReg()
607 llPutIReg( iregNo, in putIRegA()
611 if (iregNo == 15) { in putIRegA()
635 vassert(iregNo >= 0 && iregNo <= 14); in putIRegT()
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| H A D | guest_mips_toIR.c | 103 static UInt integerGuestRegOffset(UInt iregNo) in integerGuestRegOffset() argument
110 switch (iregNo) { in integerGuestRegOffset()
180 switch (iregNo) { in integerGuestRegOffset()
1414 static IRExpr *getIReg(UInt iregNo) in getIReg() argument
1416 if (0 == iregNo) { in getIReg()
1420 vassert(iregNo < 32); in getIReg()
1421 return IRExpr_Get(integerGuestRegOffset(iregNo), ty); in getIReg()
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| /dports/devel/valgrind/valgrind-dragonfly-dragonfly/VEX/priv/ |
| H A D | host_mips_defs.c | 3189 inline static UInt iregNo(HReg r, Bool mode64) in iregNo() function
3439 rA = iregNo(am->Mam.IR.base, mode64); in doAMode_IR()
3478 rA = iregNo(am->Mam.RR.base, mode64); in doAMode_RR()
3479 rB = iregNo(am->Mam.RR.index, mode64); in doAMode_RR()
3793 UInt r_dst = iregNo(i->Min.Alu.dst, mode64); in emit_MIPSInstr()
4121 UInt r_dst = iregNo(i->Min.Rotx.rd, mode64); in emit_MIPSInstr()
4122 UInt r_src = iregNo(i->Min.Rotx.rt, mode64); in emit_MIPSInstr()
4176 UInt r_dst = iregNo(i->Min.Cmp.dst, mode64); in emit_MIPSInstr()
4220 UInt r_dst = iregNo(i->Min.Mul.dst, mode64); in emit_MIPSInstr()
4249 UInt r_src = iregNo(i->Min.Ext.src, mode64); in emit_MIPSInstr()
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| H A D | guest_arm64_toIR.c | 1161 switch (iregNo) { in offsetIReg64()
1200 return iregNo == 31 ? OFFB_XSP : offsetIReg64(iregNo); in offsetIReg64orSP()
1216 if (iregNo == 31) { in nameIReg64orSP()
1231 if (iregNo == 31) { in getIReg64orZR()
1247 if (iregNo == 31) { in putIReg64orZR()
1267 if (iregNo == 31) { in nameIReg32orSP()
1283 if (iregNo == 31) { in getIReg32orZR()
1310 return is64 ? nameIReg64orSP(iregNo) : nameIReg32orSP(iregNo); in nameIRegOrSP()
1316 return is64 ? nameIReg64orZR(iregNo) : nameIReg32orZR(iregNo); in nameIRegOrZR()
1322 return is64 ? getIReg64orZR(iregNo) : getIReg32orZR(iregNo); in getIRegOrZR()
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| H A D | guest_arm_toIR.c | 508 switch (iregNo) { in integerGuestRegOffset()
532 vassert(iregNo < 16); in llGetIReg()
542 vassert(iregNo < 16); in getIRegA()
543 if (iregNo == 15) { in getIRegA()
564 vassert(iregNo < 16); in getIRegT()
565 if (iregNo == 15) { in getIRegT()
579 vassert(iregNo < 16); in llPutIReg()
607 llPutIReg( iregNo, in putIRegA()
611 if (iregNo == 15) { in putIRegA()
635 vassert(iregNo >= 0 && iregNo <= 14); in putIRegT()
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| H A D | guest_mips_toIR.c | 103 static UInt integerGuestRegOffset(UInt iregNo) in integerGuestRegOffset() argument
110 switch (iregNo) { in integerGuestRegOffset()
180 switch (iregNo) { in integerGuestRegOffset()
1414 static IRExpr *getIReg(UInt iregNo) in getIReg() argument
1416 if (0 == iregNo) { in getIReg()
1420 vassert(iregNo < 32); in getIReg()
1421 return IRExpr_Get(integerGuestRegOffset(iregNo), ty); in getIReg()
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