Searched refs:ivl_design_roots (Results 1 – 11 of 11) sorted by relevance
| /dports/cad/iverilog/verilog-11.0/tgt-pcb/ |
| H A D | pcb.cc | 60 ivl_design_roots(des, &root_scopes, &nroot); in target_design()
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| /dports/cad/iverilog/verilog-11.0/tgt-vhdl/ |
| H A D | vhdl.cc | 100 ivl_design_roots(des, &roots, &nroots); in target_design()
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| /dports/cad/iverilog/verilog-11.0/tgt-vlog95/ |
| H A D | vlog95.c | 186 ivl_design_roots(des, &roots, &nroots); in target_design()
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| /dports/cad/iverilog/verilog-11.0/tgt-blif/ |
| H A D | blif.cc | 74 ivl_design_roots(des, &roots, &nroots); in target_design()
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| /dports/cad/iverilog/verilog-11.0/tgt-vvp/ |
| H A D | vvp.c | 226 ivl_design_roots(des, &roots, &nroots); in target_design()
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| /dports/cad/iverilog/verilog-11.0/ |
| H A D | ivl.def | 14 ivl_design_roots
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| H A D | ivl_target.h | 594 extern void ivl_design_roots(ivl_design_t des,
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| H A D | cppcheck.sup | 48 //ivl_design_roots()
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| H A D | t-dll-api.cc | 89 extern "C" void ivl_design_roots(ivl_design_t des, ivl_scope_t **scopes, in ivl_design_roots() function
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| /dports/cad/iverilog/verilog-11.0/tgt-sizer/ |
| H A D | sizer.cc | 89 ivl_design_roots(des, &roots, &nroots); in target_design()
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| /dports/cad/iverilog/verilog-11.0/tgt-stub/ |
| H A D | stub.c | 1859 ivl_design_roots(des, &root_scopes, &nroot); in target_design()
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