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Searched refs:l4src (Results 1 – 25 of 126) sorted by relevance

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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-socfpga/
H A Dclock_manager_gen5.c124 &clock_manager_base->main_pll.l4src); in cm_basic_init()
303 writel(cfg->l4src, &clock_manager_base->main_pll.l4src); in cm_basic_init()
408 reg = readl(&clock_manager_base->main_pll.l4src); in cm_get_l4_sp_clk_hz()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-socfpga/
H A Dclock_manager_gen5.c124 &clock_manager_base->main_pll.l4src); in cm_basic_init()
303 writel(cfg->l4src, &clock_manager_base->main_pll.l4src); in cm_basic_init()
408 reg = readl(&clock_manager_base->main_pll.l4src); in cm_get_l4_sp_clk_hz()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/mach-socfpga/
H A Dclock_manager_gen5.c124 &clock_manager_base->main_pll.l4src); in cm_basic_init()
303 writel(cfg->l4src, &clock_manager_base->main_pll.l4src); in cm_basic_init()
408 reg = readl(&clock_manager_base->main_pll.l4src); in cm_get_l4_sp_clk_hz()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/mach-socfpga/
H A Dclock_manager_gen5.c124 &clock_manager_base->main_pll.l4src); in cm_basic_init()
303 writel(cfg->l4src, &clock_manager_base->main_pll.l4src); in cm_basic_init()
408 reg = readl(&clock_manager_base->main_pll.l4src); in cm_get_l4_sp_clk_hz()
/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/arm/mach-socfpga/
H A Dclock_manager.c145 &clock_manager_base->main_pll.l4src); in cm_basic_init()
320 writel(cfg->l4src, &clock_manager_base->main_pll.l4src); in cm_basic_init()
423 reg = readl(&clock_manager_base->main_pll.l4src); in cm_get_l4_sp_clk_hz()
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/arch/arm/mach-socfpga/
H A Dclock_manager_gen5.c124 &clock_manager_base->main_pll.l4src); in cm_basic_init()
303 writel(cfg->l4src, &clock_manager_base->main_pll.l4src); in cm_basic_init()
408 reg = readl(&clock_manager_base->main_pll.l4src); in cm_get_l4_sp_clk_hz()
/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager.h32 uint32_t l4src; member
69 u32 l4src; member
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_gen5.h23 u32 l4src; member
61 u32 l4src; member
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_gen5.h23 u32 l4src; member
61 u32 l4src; member
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_gen5.h23 u32 l4src; member
61 u32 l4src; member
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_gen5.h23 u32 l4src; member
61 u32 l4src; member
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_gen5.h23 u32 l4src; member
61 u32 l4src; member
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_gen5.h25 u32 l4src; member
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_gen5.h25 u32 l4src; member
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_gen5.h25 u32 l4src; member
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_gen5.h25 u32 l4src; member
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_gen5.h25 u32 l4src; member
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_gen5.h25 u32 l4src; member
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_gen5.h25 u32 l4src; member
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_gen5.h25 u32 l4src; member
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_gen5.h25 u32 l4src; member
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_gen5.h25 u32 l4src; member
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_gen5.h25 u32 l4src; member
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_gen5.h25 u32 l4src; member
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_gen5.h25 u32 l4src; member

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