/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/riscv/ |
H A D | op_helper_cheri.c | 230 if (addr == env->load_res) { in HELPER() 231 env->load_res = -1; // Invalidate LR/SC to the same address in HELPER() 285 env->load_res = addr; in HELPER() 334 const target_ulong expected_addr = env->load_res; in HELPER() 338 env->load_res = -1; in HELPER() 350 tcg_debug_assert(env->load_res == -1); in HELPER() 353 tcg_debug_assert(env->load_res == -1); in HELPER()
|
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/riscv/insn_trans/ |
H A D | trans_rva.inc.c | 33 tcg_gen_mov_cap_checked(load_res, addr); in gen_lr() 50 tcg_gen_brcond_cap_checked(TCG_COND_NE, load_res, addr, l1); in gen_sc() 54 tcg_gen_brcond_tl(TCG_COND_NE, load_res, src1, l1); in gen_sc() 62 tcg_gen_atomic_cmpxchg_tl_with_checked_addr(src1, load_res, load_val, src2, in gen_sc() 82 tcg_gen_movi_tl((TCGv)load_res, -1); in gen_sc()
|
/dports/emulators/qemu-utils/qemu-4.2.1/target/riscv/insn_trans/ |
H A D | trans_rva.inc.c | 33 tcg_gen_mov_tl(load_res, src1); in gen_lr() 49 tcg_gen_brcond_tl(TCG_COND_NE, load_res, src1, l1); in gen_sc() 56 tcg_gen_atomic_cmpxchg_tl(src1, load_res, load_val, src2, in gen_sc() 76 tcg_gen_movi_tl(load_res, -1); in gen_sc()
|
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/riscv/insn_trans/ |
H A D | trans_rva.inc.c | 33 tcg_gen_mov_tl(load_res, src1); in gen_lr() 49 tcg_gen_brcond_tl(TCG_COND_NE, load_res, src1, l1); in gen_sc() 56 tcg_gen_atomic_cmpxchg_tl(src1, load_res, load_val, src2, in gen_sc() 76 tcg_gen_movi_tl(load_res, -1); in gen_sc()
|
/dports/emulators/qemu42/qemu-4.2.1/target/riscv/insn_trans/ |
H A D | trans_rva.inc.c | 33 tcg_gen_mov_tl(load_res, src1); in gen_lr() 49 tcg_gen_brcond_tl(TCG_COND_NE, load_res, src1, l1); in gen_sc() 56 tcg_gen_atomic_cmpxchg_tl(src1, load_res, load_val, src2, in gen_sc() 76 tcg_gen_movi_tl(load_res, -1); in gen_sc()
|
/dports/emulators/qemu5/qemu-5.2.0/target/riscv/insn_trans/ |
H A D | trans_rva.c.inc | 24 /* Put addr in load_res, data in load_val. */ 33 tcg_gen_mov_tl(load_res, src1); 49 tcg_gen_brcond_tl(TCG_COND_NE, load_res, src1, l1); 56 tcg_gen_atomic_cmpxchg_tl(src1, load_res, load_val, src2, 76 tcg_gen_movi_tl(load_res, -1);
|
/dports/emulators/qemu60/qemu-6.0.0/target/riscv/insn_trans/ |
H A D | trans_rva.c.inc | 24 /* Put addr in load_res, data in load_val. */ 33 tcg_gen_mov_tl(load_res, src1); 49 tcg_gen_brcond_tl(TCG_COND_NE, load_res, src1, l1); 56 tcg_gen_atomic_cmpxchg_tl(src1, load_res, load_val, src2, 76 tcg_gen_movi_tl(load_res, -1);
|
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/riscv/insn_trans/ |
H A D | trans_rva.c.inc | 33 /* Put addr in load_res, data in load_val. */ 34 tcg_gen_mov_tl(load_res, src1); 47 tcg_gen_brcond_tl(TCG_COND_NE, load_res, src1, l1); 55 tcg_gen_atomic_cmpxchg_tl(dest, load_res, load_val, src2, 74 tcg_gen_movi_tl(load_res, -1);
|
/dports/emulators/qemu/qemu-6.2.0/target/riscv/insn_trans/ |
H A D | trans_rva.c.inc | 34 /* Put addr in load_res, data in load_val. */ 35 tcg_gen_mov_tl(load_res, src1); 49 tcg_gen_brcond_tl(TCG_COND_NE, load_res, src1, l1); 57 tcg_gen_atomic_cmpxchg_tl(dest, load_res, load_val, src2, 76 tcg_gen_movi_tl(load_res, -1);
|
/dports/devel/libfirm/libfirm-1.21.0/ir/be/ia32/ |
H A D | ia32_finish.c | 364 ir_node *load_res; in fix_am_source() local 385 load_res = ia32_turn_back_am(irn); in fix_am_source() 386 arch_set_irn_register(load_res, out_reg); in fix_am_source() 390 get_irn_irg(irn), irn, get_Proj_pred(load_res))); in fix_am_source()
|
H A D | ia32_fpu.c | 174 ir_node *cwstore, *load, *load_res, *orn, *store, *fldcw; in create_fpu_mode_reload() local 192 load_res = new_r_Proj(load, mode_Iu, pn_ia32_Load_res); in create_fpu_mode_reload() 198 orn = new_bd_ia32_Or(NULL, block, noreg, noreg, nomem, load_res, in create_fpu_mode_reload()
|
/dports/devel/libfirm/libfirm-1.21.0/ir/lower/ |
H A D | lower_copyb.c | 134 ir_node *load_res; in lower_small_copyb_node() local 143 load_res = new_r_Proj(load, mode, pn_Load_res); in lower_small_copyb_node() 149 store = new_r_Store(block, load_mem, add, load_res, cons_none); in lower_small_copyb_node()
|
/dports/audio/faust/faust-2.37.3/compiler/generator/interpreter/ |
H A D | fbc_mir_compiler.hh | 236 MIR_reg_t load_res = createVar(getInt64Ty(), "load_i64"); in pushLoadIntArrayImp() local 239 MIR_new_reg_op(fContext, load_res), in pushLoadIntArrayImp() 245 pushValue(load_res); in pushLoadIntArrayImp() 257 MIR_reg_t load_res = createVar(getRealTy(), "load_real"); in pushLoadRealArrayImp() local 260 MIR_new_reg_op(fContext, load_res), in pushLoadRealArrayImp() 266 pushValue(load_res); in pushLoadRealArrayImp() 318 MIR_reg_t load_res = createVar(getRealTy(), "load_real"); in pushLoadInput() local 321 MIR_new_reg_op(fContext, load_res), in pushLoadInput() 326 pushValue(load_res); in pushLoadInput()
|
/dports/mail/balsa/balsa-2.5.1/libbalsa/ |
H A D | address-book-rubrica.c | 186 LibBalsaABErr load_res; in libbalsa_address_book_rubrica_load() local 193 load_res = lbab_rubrica_load_xml(ab_rubrica, NULL); in libbalsa_address_book_rubrica_load() 194 if (load_res != LBABERR_OK) in libbalsa_address_book_rubrica_load() 195 return load_res; in libbalsa_address_book_rubrica_load()
|
/dports/games/lpairs/lpairs-1.0.5/lpairs/ |
H A D | pairs.h | 89 void load_res( Pairs *pairs );
|
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/ddr/marvell/a38x/ |
H A D | ddr3_training_ip_engine.h | 49 u32 cs_num_type, u32 **load_res,
|
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/ddr/marvell/a38x/ |
H A D | ddr3_training_ip_engine.h | 49 u32 cs_num_type, u32 **load_res,
|
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | ddr3_training_ip_engine.h | 49 u32 cs_num_type, u32 **load_res,
|
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | ddr3_training_ip_engine.h | 49 u32 cs_num_type, u32 **load_res,
|
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | ddr3_training_ip_engine.h | 49 u32 cs_num_type, u32 **load_res,
|
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | ddr3_training_ip_engine.h | 49 u32 cs_num_type, u32 **load_res,
|
/dports/cad/ghdl/ghdl-1.0.0/testsuite/vests/vhdl-ams/ashenden/compliant/analog-modeling/ |
H A D | tb_inv_integrator.vhd | 48 RLoad : entity work.load_res(ideal)
|
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/ddr/marvell/a38x/ |
H A D | ddr3_training_ip_engine.h | 49 u32 cs_num_type, u32 **load_res,
|
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | ddr3_training_ip_engine.h | 49 u32 cs_num_type, u32 **load_res,
|
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
H A D | ddr3_training_ip_engine.h | 49 u32 cs_num_type, u32 **load_res,
|