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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/Transforms/LoopUnrollAndJam/
H A Dunroll-and-jam-many-instr.ll37 %lor.ext = zext i1 %tobool21 to i32
38 %xor = xor i32 %i.addr.041, %lor.ext
40 %lor.ext.1 = zext i1 %tobool21.1 to i32
41 %xor.1 = xor i32 %xor, %lor.ext.1
44 %xor.2 = xor i32 %xor.1, %lor.ext.2
47 %xor.3 = xor i32 %xor.2, %lor.ext.3
50 %xor.4 = xor i32 %xor.3, %lor.ext.4
53 %xor.5 = xor i32 %xor.4, %lor.ext.5
56 %xor.6 = xor i32 %xor.5, %lor.ext.6
59 %xor.7 = xor i32 %xor.6, %lor.ext.7
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/Transforms/LoopUnrollAndJam/
H A Dunroll-and-jam-many-instr.ll37 %lor.ext = zext i1 %tobool21 to i32
38 %xor = xor i32 %i.addr.041, %lor.ext
40 %lor.ext.1 = zext i1 %tobool21.1 to i32
41 %xor.1 = xor i32 %xor, %lor.ext.1
44 %xor.2 = xor i32 %xor.1, %lor.ext.2
47 %xor.3 = xor i32 %xor.2, %lor.ext.3
50 %xor.4 = xor i32 %xor.3, %lor.ext.4
53 %xor.5 = xor i32 %xor.4, %lor.ext.5
56 %xor.6 = xor i32 %xor.5, %lor.ext.6
59 %xor.7 = xor i32 %xor.6, %lor.ext.7
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/Transforms/LoopUnrollAndJam/
H A Dunroll-and-jam-many-instr.ll37 %lor.ext = zext i1 %tobool21 to i32
38 %xor = xor i32 %i.addr.041, %lor.ext
40 %lor.ext.1 = zext i1 %tobool21.1 to i32
41 %xor.1 = xor i32 %xor, %lor.ext.1
44 %xor.2 = xor i32 %xor.1, %lor.ext.2
47 %xor.3 = xor i32 %xor.2, %lor.ext.3
50 %xor.4 = xor i32 %xor.3, %lor.ext.4
53 %xor.5 = xor i32 %xor.4, %lor.ext.5
56 %xor.6 = xor i32 %xor.5, %lor.ext.6
59 %xor.7 = xor i32 %xor.6, %lor.ext.7
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/Transforms/LoopUnrollAndJam/
H A Dunroll-and-jam-many-instr.ll37 %lor.ext = zext i1 %tobool21 to i32
38 %xor = xor i32 %i.addr.041, %lor.ext
40 %lor.ext.1 = zext i1 %tobool21.1 to i32
41 %xor.1 = xor i32 %xor, %lor.ext.1
44 %xor.2 = xor i32 %xor.1, %lor.ext.2
47 %xor.3 = xor i32 %xor.2, %lor.ext.3
50 %xor.4 = xor i32 %xor.3, %lor.ext.4
53 %xor.5 = xor i32 %xor.4, %lor.ext.5
56 %xor.6 = xor i32 %xor.5, %lor.ext.6
59 %xor.7 = xor i32 %xor.6, %lor.ext.7
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/Transforms/LoopUnrollAndJam/
H A Dunroll-and-jam-many-instr.ll37 %lor.ext = zext i1 %tobool21 to i32
38 %xor = xor i32 %i.addr.041, %lor.ext
40 %lor.ext.1 = zext i1 %tobool21.1 to i32
41 %xor.1 = xor i32 %xor, %lor.ext.1
44 %xor.2 = xor i32 %xor.1, %lor.ext.2
47 %xor.3 = xor i32 %xor.2, %lor.ext.3
50 %xor.4 = xor i32 %xor.3, %lor.ext.4
53 %xor.5 = xor i32 %xor.4, %lor.ext.5
56 %xor.6 = xor i32 %xor.5, %lor.ext.6
59 %xor.7 = xor i32 %xor.6, %lor.ext.7
[all …]
/dports/net-mgmt/thanos/thanos-0.11.0/vendor/github.com/aliyun/aliyun-oss-go-sdk/sample/
H A Dlist_objects.go34 lor, err := bucket.ListObjects()
41 lor, err = bucket.ListObjects(oss.MaxKeys(3))
68 marker = oss.Marker(lor.NextMarker)
70 if !lor.IsTruncated {
82 marker = oss.Marker(lor.NextMarker)
84 if !lor.IsTruncated {
97 pre = oss.Prefix(lor.Prefix)
98 marker = oss.Marker(lor.NextMarker)
100 if !lor.IsTruncated {
131 "common prefixes:", lor.CommonPrefixes)
[all …]
/dports/security/vault/vault-1.8.2/vendor/github.com/aliyun/aliyun-oss-go-sdk/sample/
H A Dlist_objects.go34 lor, err := bucket.ListObjects()
41 lor, err = bucket.ListObjects(oss.MaxKeys(3))
68 marker = oss.Marker(lor.NextMarker)
70 if !lor.IsTruncated {
82 marker = oss.Marker(lor.NextMarker)
84 if !lor.IsTruncated {
97 pre = oss.Prefix(lor.Prefix)
98 marker = oss.Marker(lor.NextMarker)
100 if !lor.IsTruncated {
131 "common prefixes:", lor.CommonPrefixes)
[all …]
/dports/sysutils/terraform/terraform-1.0.11/vendor/github.com/aliyun/aliyun-oss-go-sdk/sample/
H A Dlist_objects.go34 lor, err := bucket.ListObjects()
41 lor, err = bucket.ListObjects(oss.MaxKeys(3))
68 marker = oss.Marker(lor.NextMarker)
70 if !lor.IsTruncated {
82 marker = oss.Marker(lor.NextMarker)
84 if !lor.IsTruncated {
97 pre = oss.Prefix(lor.Prefix)
98 marker = oss.Marker(lor.NextMarker)
100 if !lor.IsTruncated {
131 "common prefixes:", lor.CommonPrefixes)
[all …]
/dports/devel/llvm80/llvm-8.0.1.src/test/Transforms/SimplifyCFG/
H A Dswitch_create-custom-dl.ll107 br i1 %cmp, label %lor.end, label %lor.lhs.false
111 br i1 %cmp4, label %lor.end, label %lor.rhs
117 lor.end: ; preds = %lor.rhs, %lor.lhs.false, %entry
245 br i1 %cmp, label %lor.end, label %lor.lhs.false
277 br i1 %cmp39, label %lor.end, label %lor.rhs
283 lor.end: ; preds = %lor.rhs, %lor.lhs.false36, %lor.lhs.fa…
284lor.lhs.false36 ], [ true, %lor.lhs.false31 ], [ true, %lor.lhs.false26 ], [ true, %lor.lhs.false2…
462 lor.false:
490 br i1 %cmp.i2, label %lor.end, label %lor.rhs
492 lor.rhs:
[all …]
H A Dswitch_create.ll107 br i1 %cmp, label %lor.end, label %lor.lhs.false
111 br i1 %cmp4, label %lor.end, label %lor.rhs
117 lor.end: ; preds = %lor.rhs, %lor.lhs.false, %entry
245 br i1 %cmp, label %lor.end, label %lor.lhs.false
277 br i1 %cmp39, label %lor.end, label %lor.rhs
283 lor.end: ; preds = %lor.rhs, %lor.lhs.false36, %lor.lhs.fa…
284lor.lhs.false36 ], [ true, %lor.lhs.false31 ], [ true, %lor.lhs.false26 ], [ true, %lor.lhs.false2…
462 lor.false:
490 br i1 %cmp.i2, label %lor.end, label %lor.rhs
492 lor.rhs:
[all …]
/dports/devel/llvm70/llvm-7.0.1.src/test/Transforms/SimplifyCFG/
H A Dswitch_create-custom-dl.ll107 br i1 %cmp, label %lor.end, label %lor.lhs.false
111 br i1 %cmp4, label %lor.end, label %lor.rhs
117 lor.end: ; preds = %lor.rhs, %lor.lhs.false, %entry
245 br i1 %cmp, label %lor.end, label %lor.lhs.false
277 br i1 %cmp39, label %lor.end, label %lor.rhs
283 lor.end: ; preds = %lor.rhs, %lor.lhs.false36, %lor.lhs.fa…
284lor.lhs.false36 ], [ true, %lor.lhs.false31 ], [ true, %lor.lhs.false26 ], [ true, %lor.lhs.false2…
462 lor.false:
490 br i1 %cmp.i2, label %lor.end, label %lor.rhs
492 lor.rhs:
[all …]
H A Dswitch_create.ll107 br i1 %cmp, label %lor.end, label %lor.lhs.false
111 br i1 %cmp4, label %lor.end, label %lor.rhs
117 lor.end: ; preds = %lor.rhs, %lor.lhs.false, %entry
245 br i1 %cmp, label %lor.end, label %lor.lhs.false
277 br i1 %cmp39, label %lor.end, label %lor.rhs
283 lor.end: ; preds = %lor.rhs, %lor.lhs.false36, %lor.lhs.fa…
284lor.lhs.false36 ], [ true, %lor.lhs.false31 ], [ true, %lor.lhs.false26 ], [ true, %lor.lhs.false2…
462 lor.false:
490 br i1 %cmp.i2, label %lor.end, label %lor.rhs
492 lor.rhs:
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/X86/
H A Dinterval-update-remat.ll26 br i1 undef, label %lor.rhs, label %lor.end
30 br label %lor.end
32 lor.end: ; preds = %lor.rhs, %entry
35 br i1 undef, label %lor.rhs5, label %lor.end7
37 lor.rhs5: ; preds = %lor.end
38 br label %lor.end7
40 lor.end7: ; preds = %lor.rhs5, %lor.end
41 %tmp3 = phi i1 [ true, %lor.end ], [ false, %lor.rhs5 ]
96 br i1 %tobool23.us, label %lor.rhs24.us, label %lor.end32.us
125 br i1 %tobool23, label %lor.rhs24, label %lor.end32
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/X86/
H A Dinterval-update-remat.ll26 br i1 undef, label %lor.rhs, label %lor.end
30 br label %lor.end
32 lor.end: ; preds = %lor.rhs, %entry
35 br i1 undef, label %lor.rhs5, label %lor.end7
37 lor.rhs5: ; preds = %lor.end
38 br label %lor.end7
40 lor.end7: ; preds = %lor.rhs5, %lor.end
41 %tmp3 = phi i1 [ true, %lor.end ], [ false, %lor.rhs5 ]
96 br i1 %tobool23.us, label %lor.rhs24.us, label %lor.end32.us
125 br i1 %tobool23, label %lor.rhs24, label %lor.end32
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/X86/
H A Dinterval-update-remat.ll26 br i1 undef, label %lor.rhs, label %lor.end
30 br label %lor.end
32 lor.end: ; preds = %lor.rhs, %entry
35 br i1 undef, label %lor.rhs5, label %lor.end7
37 lor.rhs5: ; preds = %lor.end
38 br label %lor.end7
40 lor.end7: ; preds = %lor.rhs5, %lor.end
41 %tmp3 = phi i1 [ true, %lor.end ], [ false, %lor.rhs5 ]
96 br i1 %tobool23.us, label %lor.rhs24.us, label %lor.end32.us
125 br i1 %tobool23, label %lor.rhs24, label %lor.end32
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/X86/
H A Dinterval-update-remat.ll26 br i1 undef, label %lor.rhs, label %lor.end
30 br label %lor.end
32 lor.end: ; preds = %lor.rhs, %entry
35 br i1 undef, label %lor.rhs5, label %lor.end7
37 lor.rhs5: ; preds = %lor.end
38 br label %lor.end7
40 lor.end7: ; preds = %lor.rhs5, %lor.end
41 %tmp3 = phi i1 [ true, %lor.end ], [ false, %lor.rhs5 ]
96 br i1 %tobool23.us, label %lor.rhs24.us, label %lor.end32.us
125 br i1 %tobool23, label %lor.rhs24, label %lor.end32
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/X86/
H A Dinterval-update-remat.ll26 br i1 undef, label %lor.rhs, label %lor.end
30 br label %lor.end
32 lor.end: ; preds = %lor.rhs, %entry
35 br i1 undef, label %lor.rhs5, label %lor.end7
37 lor.rhs5: ; preds = %lor.end
38 br label %lor.end7
40 lor.end7: ; preds = %lor.rhs5, %lor.end
41 %tmp3 = phi i1 [ true, %lor.end ], [ false, %lor.rhs5 ]
96 br i1 %tobool23.us, label %lor.rhs24.us, label %lor.end32.us
125 br i1 %tobool23, label %lor.rhs24, label %lor.end32
[all …]
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/X86/
H A Dinterval-update-remat.ll26 br i1 undef, label %lor.rhs, label %lor.end
30 br label %lor.end
32 lor.end: ; preds = %lor.rhs, %entry
35 br i1 undef, label %lor.rhs5, label %lor.end7
37 lor.rhs5: ; preds = %lor.end
38 br label %lor.end7
40 lor.end7: ; preds = %lor.rhs5, %lor.end
41 %tmp3 = phi i1 [ true, %lor.end ], [ false, %lor.rhs5 ]
96 br i1 %tobool23.us, label %lor.rhs24.us, label %lor.end32.us
125 br i1 %tobool23, label %lor.rhs24, label %lor.end32
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/X86/
H A Dinterval-update-remat.ll26 br i1 undef, label %lor.rhs, label %lor.end
30 br label %lor.end
32 lor.end: ; preds = %lor.rhs, %entry
35 br i1 undef, label %lor.rhs5, label %lor.end7
37 lor.rhs5: ; preds = %lor.end
38 br label %lor.end7
40 lor.end7: ; preds = %lor.rhs5, %lor.end
41 %tmp3 = phi i1 [ true, %lor.end ], [ false, %lor.rhs5 ]
96 br i1 %tobool23.us, label %lor.rhs24.us, label %lor.end32.us
125 br i1 %tobool23, label %lor.rhs24, label %lor.end32
[all …]
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/X86/
H A Dinterval-update-remat.ll26 br i1 undef, label %lor.rhs, label %lor.end
30 br label %lor.end
32 lor.end: ; preds = %lor.rhs, %entry
35 br i1 undef, label %lor.rhs5, label %lor.end7
37 lor.rhs5: ; preds = %lor.end
38 br label %lor.end7
40 lor.end7: ; preds = %lor.rhs5, %lor.end
41 %tmp3 = phi i1 [ true, %lor.end ], [ false, %lor.rhs5 ]
96 br i1 %tobool23.us, label %lor.rhs24.us, label %lor.end32.us
125 br i1 %tobool23, label %lor.rhs24, label %lor.end32
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/X86/
H A Dinterval-update-remat.ll26 br i1 undef, label %lor.rhs, label %lor.end
30 br label %lor.end
32 lor.end: ; preds = %lor.rhs, %entry
35 br i1 undef, label %lor.rhs5, label %lor.end7
37 lor.rhs5: ; preds = %lor.end
38 br label %lor.end7
40 lor.end7: ; preds = %lor.rhs5, %lor.end
41 %tmp3 = phi i1 [ true, %lor.end ], [ false, %lor.rhs5 ]
96 br i1 %tobool23.us, label %lor.rhs24.us, label %lor.end32.us
125 br i1 %tobool23, label %lor.rhs24, label %lor.end32
[all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/X86/
H A Dinterval-update-remat.ll26 br i1 undef, label %lor.rhs, label %lor.end
30 br label %lor.end
32 lor.end: ; preds = %lor.rhs, %entry
35 br i1 undef, label %lor.rhs5, label %lor.end7
37 lor.rhs5: ; preds = %lor.end
38 br label %lor.end7
40 lor.end7: ; preds = %lor.rhs5, %lor.end
41 %tmp3 = phi i1 [ true, %lor.end ], [ false, %lor.rhs5 ]
96 br i1 %tobool23.us, label %lor.rhs24.us, label %lor.end32.us
125 br i1 %tobool23, label %lor.rhs24, label %lor.end32
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/X86/
H A Dinterval-update-remat.ll26 br i1 undef, label %lor.rhs, label %lor.end
30 br label %lor.end
32 lor.end: ; preds = %lor.rhs, %entry
35 br i1 undef, label %lor.rhs5, label %lor.end7
37 lor.rhs5: ; preds = %lor.end
38 br label %lor.end7
40 lor.end7: ; preds = %lor.rhs5, %lor.end
41 %tmp3 = phi i1 [ true, %lor.end ], [ false, %lor.rhs5 ]
96 br i1 %tobool23.us, label %lor.rhs24.us, label %lor.end32.us
125 br i1 %tobool23, label %lor.rhs24, label %lor.end32
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/X86/
H A Dinterval-update-remat.ll26 br i1 undef, label %lor.rhs, label %lor.end
30 br label %lor.end
32 lor.end: ; preds = %lor.rhs, %entry
35 br i1 undef, label %lor.rhs5, label %lor.end7
37 lor.rhs5: ; preds = %lor.end
38 br label %lor.end7
40 lor.end7: ; preds = %lor.rhs5, %lor.end
41 %tmp3 = phi i1 [ true, %lor.end ], [ false, %lor.rhs5 ]
96 br i1 %tobool23.us, label %lor.rhs24.us, label %lor.end32.us
125 br i1 %tobool23, label %lor.rhs24, label %lor.end32
[all …]
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/X86/
H A Dinterval-update-remat.ll26 br i1 undef, label %lor.rhs, label %lor.end
30 br label %lor.end
32 lor.end: ; preds = %lor.rhs, %entry
35 br i1 undef, label %lor.rhs5, label %lor.end7
37 lor.rhs5: ; preds = %lor.end
38 br label %lor.end7
40 lor.end7: ; preds = %lor.rhs5, %lor.end
41 %tmp3 = phi i1 [ true, %lor.end ], [ false, %lor.rhs5 ]
96 br i1 %tobool23.us, label %lor.rhs24.us, label %lor.end32.us
125 br i1 %tobool23, label %lor.rhs24, label %lor.end32
[all …]

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