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Searched refs:lower_simd_width (Results 1 – 25 of 109) sorted by relevance

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/dports/lang/clover/mesa-21.3.6/docs/relnotes/
H A D18.1.4.rst74 - intel/fs: Split instructions low to high in lower_simd_width
H A D19.3.3.rst104 - intel/fs/gen11+: Handle ROR/ROL in lower_simd_width().
/dports/graphics/libosmesa/mesa-21.3.6/docs/relnotes/
H A D18.1.4.rst74 - intel/fs: Split instructions low to high in lower_simd_width
H A D19.3.3.rst104 - intel/fs/gen11+: Handle ROR/ROL in lower_simd_width().
/dports/graphics/libosmesa-gallium/mesa-21.3.6/docs/relnotes/
H A D18.1.4.rst74 - intel/fs: Split instructions low to high in lower_simd_width
H A D19.3.3.rst104 - intel/fs/gen11+: Handle ROR/ROL in lower_simd_width().
/dports/graphics/mesa-gallium-xa/mesa-21.3.6/docs/relnotes/
H A D18.1.4.rst74 - intel/fs: Split instructions low to high in lower_simd_width
/dports/graphics/mesa-libs/mesa-21.3.6/docs/relnotes/
H A D18.1.4.rst74 - intel/fs: Split instructions low to high in lower_simd_width
/dports/graphics/mesa-dri-gallium/mesa-21.3.6/docs/relnotes/
H A D18.1.4.rst74 - intel/fs: Split instructions low to high in lower_simd_width
/dports/graphics/mesa-gallium-va/mesa-21.3.6/docs/relnotes/
H A D18.1.4.rst74 - intel/fs: Split instructions low to high in lower_simd_width
/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/docs/relnotes/
H A D18.1.4.rst74 - intel/fs: Split instructions low to high in lower_simd_width
/dports/graphics/mesa-dri/mesa-21.3.6/docs/relnotes/
H A D18.1.4.rst74 - intel/fs: Split instructions low to high in lower_simd_width
/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/docs/relnotes/
H A D18.1.4.rst74 - intel/fs: Split instructions low to high in lower_simd_width
/dports/graphics/mesa-dri-classic/mesa-20.2.3/docs/relnotes/
H A D18.1.4.rst74 - intel/fs: Split instructions low to high in lower_simd_width
/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/intel/compiler/
H A Dbrw_vec4.h161 bool lower_simd_width();
/dports/lang/clover/mesa-21.3.6/src/intel/compiler/
H A Dbrw_vec4.h164 bool lower_simd_width();
/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/intel/compiler/
H A Dbrw_vec4.h164 bool lower_simd_width();
/dports/graphics/libosmesa/mesa-21.3.6/src/intel/compiler/
H A Dbrw_vec4.h164 bool lower_simd_width();
/dports/graphics/mesa-libs/mesa-21.3.6/src/intel/compiler/
H A Dbrw_vec4.h164 bool lower_simd_width();
/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/intel/compiler/
H A Dbrw_vec4.h164 bool lower_simd_width();
/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/intel/compiler/
H A Dbrw_vec4.h164 bool lower_simd_width();
/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/intel/compiler/
H A Dbrw_vec4.h164 bool lower_simd_width();
/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/intel/compiler/
H A Dbrw_vec4.h164 bool lower_simd_width();
/dports/graphics/mesa-dri/mesa-21.3.6/src/intel/compiler/
H A Dbrw_vec4.h164 bool lower_simd_width();
/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/intel/compiler/
H A Dbrw_vec4.h161 bool lower_simd_width();

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