/dports/emulators/mess/mame-mame0226/src/devices/machine/ |
H A D | hd63450.cpp | 27 memset(&m_reg[i], 0, sizeof(m_reg[i])); in hd63450_device() 87 m_reg[x].cpr = 0; in device_reset() 114 return (m_reg[channel].csr << 8) | m_reg[channel].cer; in read() 116 return (m_reg[channel].dcr << 8) | m_reg[channel].ocr; in read() 118 return (m_reg[channel].scr << 8) | m_reg[channel].ccr; in read() 284 m_reg[channel].mar |= space.read_word(m_reg[channel].bar+2); in dma_transfer_start() 285 m_reg[channel].mtc = space.read_word(m_reg[channel].bar+4); in dma_transfer_start() 455 if ((m_reg[x].ocr & 0x0c) != 0 && m_reg[x].btc > 0) in single_transfer() 459 m_reg[x].mar = space.read_word(m_reg[x].bar) << 16; in single_transfer() 460 m_reg[x].mar |= space.read_word(m_reg[x].bar+2); in single_transfer() [all …]
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H A D | upd71071.cpp | 193 m_reg.address_current[channel] = m_reg.address_base[channel]; in TIMER_CALLBACK_MEMBER() 194 m_reg.count_current[channel] = m_reg.count_base[channel]; in TIMER_CALLBACK_MEMBER() 237 m_reg.address_current[channel] = m_reg.address_base[channel]; in TIMER_CALLBACK_MEMBER() 238 m_reg.count_current[channel] = m_reg.count_base[channel]; in TIMER_CALLBACK_MEMBER() 263 m_reg.temp_h = 0; in soft_reset() 264 m_reg.temp_l = 0; in soft_reset() 267 m_reg.request = 0; in soft_reset() 382 ret = m_reg.mask; in read() 453 m_reg.device_control = (m_reg.device_control & 0xff00) | data; in write() 457 m_reg.device_control = (m_reg.device_control & 0x00ff) | (data << 8); in write() [all …]
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H A D | dp83932c.cpp | 152 m_reg[CRDA] = m_bus->read_word(EA(m_reg[URDA], m_reg[LLFA])); in recv_start_cb() 161 m_reg[TRBA0] = m_reg[CRBA0]; in recv_start_cb() 162 m_reg[TRBA1] = m_reg[CRBA1]; in recv_start_cb() 163 m_reg[TBWC0] = m_reg[RBWC0]; in recv_start_cb() 164 m_reg[TBWC1] = m_reg[RBWC1]; in recv_start_cb() 203 m_reg[RSC] = (m_reg[RSC] & 0xff00) | u8(m_reg[RSC] + 1); in recv_start_cb() 346 m_reg[TTDA] = m_reg[CTDA]; in transmit() 449 EA(m_reg[CRBA1], m_reg[CRBA0]), EA(m_reg[RBWC1], m_reg[RBWC0])); in read_rra() 455 if (m_reg[RRP] == m_reg[REA]) in read_rra() 456 m_reg[RRP] = m_reg[RSA]; in read_rra() [all …]
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H A D | lh5810.cpp | 80 save_item(NAME(m_reg)); in device_start() 90 memset(m_reg, 0, sizeof(m_reg)); in device_reset() 110 return m_reg[offset]; in data_r() 114 m_reg[offset] |= 2; in data_r() 118 return m_reg[offset]; in data_r() 121 return (m_reg[offset]&0x0f) | (m_irq<<4) | (BIT(m_reg[LH5810_OPB],7)<<5); in data_r() 124 m_reg[offset] = (m_reg[offset] & m_reg[LH5810_DDA]) | (m_porta_r_cb(0) & ~m_reg[LH5810_DDA]); in data_r() 128 m_reg[offset] = (m_reg[offset] & m_reg[LH5810_DDB]) | (m_portb_r_cb(0) & ~m_reg[LH5810_DDB]); in data_r() 174 m_reg[offset] = (m_reg[offset] & 0xfc) | (data & 0x03); in data_w() 178 m_reg[offset] = (data & m_reg[LH5810_DDA]) | (m_reg[offset] & ~m_reg[LH5810_DDA]); in data_w() [all …]
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H A D | smc91c9x.cpp | 101 m_reg[B3_REVISION] = 0x3345; in device_start() 103 m_reg[B3_REVISION] = 0x3346; in device_start() 108 save_item(NAME(m_reg)); in device_start() 316 if (m_reg[B0_RCR] & PRMS) in address_filter() 340 if (m_reg[B0_RCR] & ALMUL) in address_filter() 426 if (!(m_reg[B0_RCR] & RXEN)) in receive() 643 m_reg[B0_TCR] &= ~TXENA; in send_complete_cb() 651 m_reg[B0_TCR] &= ~TXENA; in send_complete_cb() 803 result = m_reg[offset]; in read() 848 m_reg[B2_POINTER] = (m_reg[B2_POINTER] & ~0x7ff) | (addr & 0x7ff); in read() [all …]
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H A D | mos8722.cpp | 104 for (auto & elem : m_reg) in device_reset() 109 m_reg[P1L] = 0x01; in device_reset() 132 data = m_reg[CR] | 0x80; in read() 157 data = m_reg[CR] | 0x80; in read() 185 m_reg[CR] = data & 0x7f; in write() 200 m_reg[MCR] = data; in write() 212 m_reg[P0L] = data; in write() 221 m_reg[P1L] = data; in write() 244 m_reg[CR] = m_reg[offset & 0x0f]; in write() 303 ta = m_reg[P0L] << 8; in ta_r() [all …]
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H A D | i3002.cpp | 144 save_item(NAME(m_reg)); in device_start() 167 uint8_t tmp = (m_reg[ REG_AC ] & m_kbus) + m_reg[ reg ] + m_ci; in update() 168 m_reg[ REG_AC ] = m_reg[ reg ] = tmp & WORD_MASK; in update() 189 m_reg[ reg ] = 0; in update() 207 m_reg[ REG_MAR ] = m_kbus | m_reg[ reg ]; in update() 266 uint8_t tmp = (m_reg[ REG_AC ] & m_kbus) + m_reg[ reg ] + m_ci; in update() 299 uint8_t tmp = m_reg[ reg ] & m_reg[ REG_AC ] & m_kbus; in update() 300 m_reg[ reg ] = tmp; in update() 310 m_reg[ reg ] = tmp; in update() 391 m_reg[ reg ] = m_reg[ reg ] ^ tmp ^ WORD_MASK; in update() [all …]
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/dports/emulators/mame/mame-mame0226/src/devices/machine/ |
H A D | hd63450.cpp | 27 memset(&m_reg[i], 0, sizeof(m_reg[i])); in hd63450_device() 87 m_reg[x].cpr = 0; in device_reset() 114 return (m_reg[channel].csr << 8) | m_reg[channel].cer; in read() 116 return (m_reg[channel].dcr << 8) | m_reg[channel].ocr; in read() 118 return (m_reg[channel].scr << 8) | m_reg[channel].ccr; in read() 284 m_reg[channel].mar |= space.read_word(m_reg[channel].bar+2); in dma_transfer_start() 285 m_reg[channel].mtc = space.read_word(m_reg[channel].bar+4); in dma_transfer_start() 455 if ((m_reg[x].ocr & 0x0c) != 0 && m_reg[x].btc > 0) in single_transfer() 459 m_reg[x].mar = space.read_word(m_reg[x].bar) << 16; in single_transfer() 460 m_reg[x].mar |= space.read_word(m_reg[x].bar+2); in single_transfer() [all …]
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H A D | upd71071.cpp | 193 m_reg.address_current[channel] = m_reg.address_base[channel]; in TIMER_CALLBACK_MEMBER() 194 m_reg.count_current[channel] = m_reg.count_base[channel]; in TIMER_CALLBACK_MEMBER() 237 m_reg.address_current[channel] = m_reg.address_base[channel]; in TIMER_CALLBACK_MEMBER() 238 m_reg.count_current[channel] = m_reg.count_base[channel]; in TIMER_CALLBACK_MEMBER() 263 m_reg.temp_h = 0; in soft_reset() 264 m_reg.temp_l = 0; in soft_reset() 267 m_reg.request = 0; in soft_reset() 382 ret = m_reg.mask; in read() 453 m_reg.device_control = (m_reg.device_control & 0xff00) | data; in write() 457 m_reg.device_control = (m_reg.device_control & 0x00ff) | (data << 8); in write() [all …]
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H A D | dp83932c.cpp | 152 m_reg[CRDA] = m_bus->read_word(EA(m_reg[URDA], m_reg[LLFA])); in recv_start_cb() 161 m_reg[TRBA0] = m_reg[CRBA0]; in recv_start_cb() 162 m_reg[TRBA1] = m_reg[CRBA1]; in recv_start_cb() 163 m_reg[TBWC0] = m_reg[RBWC0]; in recv_start_cb() 164 m_reg[TBWC1] = m_reg[RBWC1]; in recv_start_cb() 203 m_reg[RSC] = (m_reg[RSC] & 0xff00) | u8(m_reg[RSC] + 1); in recv_start_cb() 346 m_reg[TTDA] = m_reg[CTDA]; in transmit() 449 EA(m_reg[CRBA1], m_reg[CRBA0]), EA(m_reg[RBWC1], m_reg[RBWC0])); in read_rra() 455 if (m_reg[RRP] == m_reg[REA]) in read_rra() 456 m_reg[RRP] = m_reg[RSA]; in read_rra() [all …]
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H A D | lh5810.cpp | 80 save_item(NAME(m_reg)); in device_start() 90 memset(m_reg, 0, sizeof(m_reg)); in device_reset() 110 return m_reg[offset]; in data_r() 114 m_reg[offset] |= 2; in data_r() 118 return m_reg[offset]; in data_r() 121 return (m_reg[offset]&0x0f) | (m_irq<<4) | (BIT(m_reg[LH5810_OPB],7)<<5); in data_r() 124 m_reg[offset] = (m_reg[offset] & m_reg[LH5810_DDA]) | (m_porta_r_cb(0) & ~m_reg[LH5810_DDA]); in data_r() 128 m_reg[offset] = (m_reg[offset] & m_reg[LH5810_DDB]) | (m_portb_r_cb(0) & ~m_reg[LH5810_DDB]); in data_r() 174 m_reg[offset] = (m_reg[offset] & 0xfc) | (data & 0x03); in data_w() 178 m_reg[offset] = (data & m_reg[LH5810_DDA]) | (m_reg[offset] & ~m_reg[LH5810_DDA]); in data_w() [all …]
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H A D | smc91c9x.cpp | 101 m_reg[B3_REVISION] = 0x3345; in device_start() 103 m_reg[B3_REVISION] = 0x3346; in device_start() 108 save_item(NAME(m_reg)); in device_start() 316 if (m_reg[B0_RCR] & PRMS) in address_filter() 340 if (m_reg[B0_RCR] & ALMUL) in address_filter() 426 if (!(m_reg[B0_RCR] & RXEN)) in receive() 643 m_reg[B0_TCR] &= ~TXENA; in send_complete_cb() 651 m_reg[B0_TCR] &= ~TXENA; in send_complete_cb() 803 result = m_reg[offset]; in read() 848 m_reg[B2_POINTER] = (m_reg[B2_POINTER] & ~0x7ff) | (addr & 0x7ff); in read() [all …]
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H A D | mos8722.cpp | 104 for (auto & elem : m_reg) in device_reset() 109 m_reg[P1L] = 0x01; in device_reset() 132 data = m_reg[CR] | 0x80; in read() 157 data = m_reg[CR] | 0x80; in read() 185 m_reg[CR] = data & 0x7f; in write() 200 m_reg[MCR] = data; in write() 212 m_reg[P0L] = data; in write() 221 m_reg[P1L] = data; in write() 244 m_reg[CR] = m_reg[offset & 0x0f]; in write() 303 ta = m_reg[P0L] << 8; in ta_r() [all …]
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/dports/emulators/mess/mame-mame0226/src/devices/bus/nes/ |
H A D | mmc3_clones.cpp | 351 memset(m_reg, 0, sizeof(m_reg)); in pcb_reset() 456 m_reg[2] = m_reg[3] = 0; in pcb_reset() 457 m_reg[4] = m_reg[5] = m_reg[6] = m_reg[7] = 0xff; in pcb_reset() 469 m_reg[0] = m_reg[1] = m_reg[2] = m_reg[3] = 0; in pcb_reset() 470 m_reg[4] = m_reg[5] = m_reg[6] = m_reg[7] = 0xff; in pcb_reset() 1218 m_reg[1] = m_reg[6]; in update_regs() 1222 m_reg[1] = m_reg[6]; in update_regs() 1227 m_reg[1] = m_reg[6]; in update_regs() 1232 m_reg[2] = m_reg[6]; in update_regs() 1237 m_reg[3] = m_reg[6]; in update_regs() [all …]
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/dports/emulators/mame/mame-mame0226/src/devices/bus/nes/ |
H A D | mmc3_clones.cpp | 351 memset(m_reg, 0, sizeof(m_reg)); in pcb_reset() 456 m_reg[2] = m_reg[3] = 0; in pcb_reset() 457 m_reg[4] = m_reg[5] = m_reg[6] = m_reg[7] = 0xff; in pcb_reset() 469 m_reg[0] = m_reg[1] = m_reg[2] = m_reg[3] = 0; in pcb_reset() 470 m_reg[4] = m_reg[5] = m_reg[6] = m_reg[7] = 0xff; in pcb_reset() 1218 m_reg[1] = m_reg[6]; in update_regs() 1222 m_reg[1] = m_reg[6]; in update_regs() 1227 m_reg[1] = m_reg[6]; in update_regs() 1232 m_reg[2] = m_reg[6]; in update_regs() 1237 m_reg[3] = m_reg[6]; in update_regs() [all …]
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/dports/emulators/mess/mame-mame0226/src/devices/cpu/hcd62121/ |
H A D | hcd62121.cpp | 417 str = string_format("%02X%02X%02X%02X", m_reg[0x00], m_reg[0x01], m_reg[0x02], m_reg[0x03]); in state_string_export() 420 str = string_format("%02X%02X%02X%02X", m_reg[0x04], m_reg[0x05], m_reg[0x06], m_reg[0x07]); in state_string_export() 423 str = string_format("%02X%02X%02X%02X", m_reg[0x08], m_reg[0x09], m_reg[0x0A], m_reg[0x0B]); in state_string_export() 426 str = string_format("%02X%02X%02X%02X", m_reg[0x0C], m_reg[0x0D], m_reg[0x0E], m_reg[0x0F]); in state_string_export() 429 str = string_format("%02X%02X%02X%02X", m_reg[0x10], m_reg[0x11], m_reg[0x12], m_reg[0x13]); in state_string_export() 432 str = string_format("%02X%02X%02X%02X", m_reg[0x14], m_reg[0x15], m_reg[0x16], m_reg[0x17]); in state_string_export() 435 str = string_format("%02X%02X%02X%02X", m_reg[0x18], m_reg[0x19], m_reg[0x1A], m_reg[0x1B]); in state_string_export() 438 str = string_format("%02X%02X%02X%02X", m_reg[0x1C], m_reg[0x1D], m_reg[0x1E], m_reg[0x1F]); in state_string_export() 441 str = string_format("%02X%02X%02X%02X", m_reg[0x20], m_reg[0x21], m_reg[0x22], m_reg[0x23]); in state_string_export() 444 str = string_format("%02X%02X%02X%02X", m_reg[0x24], m_reg[0x25], m_reg[0x26], m_reg[0x27]); in state_string_export() [all …]
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/dports/emulators/mame/mame-mame0226/src/devices/cpu/hcd62121/ |
H A D | hcd62121.cpp | 417 str = string_format("%02X%02X%02X%02X", m_reg[0x00], m_reg[0x01], m_reg[0x02], m_reg[0x03]); in state_string_export() 420 str = string_format("%02X%02X%02X%02X", m_reg[0x04], m_reg[0x05], m_reg[0x06], m_reg[0x07]); in state_string_export() 423 str = string_format("%02X%02X%02X%02X", m_reg[0x08], m_reg[0x09], m_reg[0x0A], m_reg[0x0B]); in state_string_export() 426 str = string_format("%02X%02X%02X%02X", m_reg[0x0C], m_reg[0x0D], m_reg[0x0E], m_reg[0x0F]); in state_string_export() 429 str = string_format("%02X%02X%02X%02X", m_reg[0x10], m_reg[0x11], m_reg[0x12], m_reg[0x13]); in state_string_export() 432 str = string_format("%02X%02X%02X%02X", m_reg[0x14], m_reg[0x15], m_reg[0x16], m_reg[0x17]); in state_string_export() 435 str = string_format("%02X%02X%02X%02X", m_reg[0x18], m_reg[0x19], m_reg[0x1A], m_reg[0x1B]); in state_string_export() 438 str = string_format("%02X%02X%02X%02X", m_reg[0x1C], m_reg[0x1D], m_reg[0x1E], m_reg[0x1F]); in state_string_export() 441 str = string_format("%02X%02X%02X%02X", m_reg[0x20], m_reg[0x21], m_reg[0x22], m_reg[0x23]); in state_string_export() 444 str = string_format("%02X%02X%02X%02X", m_reg[0x24], m_reg[0x25], m_reg[0x26], m_reg[0x27]); in state_string_export() [all …]
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/dports/emulators/mess/mame-mame0226/src/mame/video/ |
H A D | sgi_re2.cpp | 100 m_reg[REG_DZF] = 0; in device_reset() 183 (m_reg[REG_XMIN] >> 3) * 5 + (m_reg[REG_XMIN] & 0x7), in reg_w() 184 (m_reg[REG_XMAX] >> 3) * 5 + (m_reg[REG_XMAX] & 0x7), in reg_w() 185 m_reg[REG_YMIN], in reg_w() 232 m_pat = (m_reg[REG_PATH] << 16) | m_reg[REG_PATL]; in execute() 233 m_dz = (s64(u64(m_reg[REG_DZI]) << 40) >> 26) | m_reg[REG_DZF]; in execute() 246 m_x = ((m_reg[REG_X] >> 3) * 5 + (m_reg[REG_X] & 0x7)) << 14; in execute() 301 u32 const mask = (m_reg[REG_AUXMASK] << 24) | m_reg[REG_PIXMASK]; in draw_shaded_span() 303 (m_reg[REG_WIDDATA] << 28) | (m_reg[REG_UAUXDATA] << 24) : in draw_shaded_span() 332 u32 const mask = (m_reg[REG_AUXMASK] << 24) | m_reg[REG_PIXMASK]; in draw_flat_span() [all …]
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/dports/emulators/mame/mame-mame0226/src/mame/video/ |
H A D | sgi_re2.cpp | 100 m_reg[REG_DZF] = 0; in device_reset() 183 (m_reg[REG_XMIN] >> 3) * 5 + (m_reg[REG_XMIN] & 0x7), in reg_w() 184 (m_reg[REG_XMAX] >> 3) * 5 + (m_reg[REG_XMAX] & 0x7), in reg_w() 185 m_reg[REG_YMIN], in reg_w() 232 m_pat = (m_reg[REG_PATH] << 16) | m_reg[REG_PATL]; in execute() 233 m_dz = (s64(u64(m_reg[REG_DZI]) << 40) >> 26) | m_reg[REG_DZF]; in execute() 246 m_x = ((m_reg[REG_X] >> 3) * 5 + (m_reg[REG_X] & 0x7)) << 14; in execute() 301 u32 const mask = (m_reg[REG_AUXMASK] << 24) | m_reg[REG_PIXMASK]; in draw_shaded_span() 303 (m_reg[REG_WIDDATA] << 28) | (m_reg[REG_UAUXDATA] << 24) : in draw_shaded_span() 332 u32 const mask = (m_reg[REG_AUXMASK] << 24) | m_reg[REG_PIXMASK]; in draw_flat_span() [all …]
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/dports/emulators/mess/mame-mame0226/src/devices/cpu/tms32082/ |
H A D | mp_ops.cpp | 464 m_reg[rd] = m_reg[rs] & imm; in execute_short_imm() 475 m_reg[rd] = ~m_reg[rs] & imm; in execute_short_imm() 486 m_reg[rd] = m_reg[rs] & ~imm; in execute_short_imm() 497 m_reg[rd] = m_reg[rs] | imm; in execute_short_imm() 508 m_reg[rd] = m_reg[rs] | ~imm; in execute_short_imm() 819 m_reg[rd] = m_reg[rs] + imm; in execute_short_imm() 832 m_reg[rd] = m_reg[rs] + imm; in execute_short_imm() 843 m_reg[rd] = imm - m_reg[rs]; in execute_short_imm() 856 m_reg[rd] = imm - m_reg[rs]; in execute_short_imm() 986 m_reg[rd] = src1 & m_reg[rs]; in execute_reg_long_imm() [all …]
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/dports/emulators/mame/mame-mame0226/src/devices/cpu/tms32082/ |
H A D | mp_ops.cpp | 464 m_reg[rd] = m_reg[rs] & imm; in execute_short_imm() 475 m_reg[rd] = ~m_reg[rs] & imm; in execute_short_imm() 486 m_reg[rd] = m_reg[rs] & ~imm; in execute_short_imm() 497 m_reg[rd] = m_reg[rs] | imm; in execute_short_imm() 508 m_reg[rd] = m_reg[rs] | ~imm; in execute_short_imm() 819 m_reg[rd] = m_reg[rs] + imm; in execute_short_imm() 832 m_reg[rd] = m_reg[rs] + imm; in execute_short_imm() 843 m_reg[rd] = imm - m_reg[rs]; in execute_short_imm() 856 m_reg[rd] = imm - m_reg[rs]; in execute_short_imm() 986 m_reg[rd] = src1 & m_reg[rs]; in execute_reg_long_imm() [all …]
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/dports/emulators/mess/mame-mame0226/src/devices/cpu/v60/ |
H A D | am2.hxx | 16 m_amout = m_reg[m_modval & 0x1F]; in am2RegisterIndirect() 35 m_amout = m_reg[m_modval2 & 0x1F] + m_reg[m_modval & 0x1F]; in am2RegisterIndirectIndexed() 38 m_amout = m_reg[m_modval2 & 0x1F] + m_reg[m_modval & 0x1F] * 2; in am2RegisterIndirectIndexed() 41 m_amout = m_reg[m_modval2 & 0x1F] + m_reg[m_modval & 0x1F] * 4; in am2RegisterIndirectIndexed() 44 m_amout = m_reg[m_modval2 & 0x1F] + m_reg[m_modval & 0x1F] * 8; in am2RegisterIndirectIndexed() 67 m_reg[m_modval & 0x1F] += 1; in am2Autoincrement() 70 m_reg[m_modval & 0x1F] += 2; in am2Autoincrement() 92 m_reg[m_modval & 0x1F] +=1; in bam2Autoincrement() 95 m_reg[m_modval & 0x1F] +=4; in bam2Autoincrement() 137 m_reg[m_modval & 0x1F]-=1; in bam2Autodecrement() [all …]
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H A D | am3.hxx | 11 SETREG8(m_reg[m_modval & 0x1F], m_modwritevalb); in am3Register() 17 m_reg[m_modval & 0x1F] = m_modwritevalw; in am3Register() 47 m_program->write_byte(m_reg[m_modval2 & 0x1F] + m_reg[m_modval & 0x1F], m_modwritevalb); in am3RegisterIndirectIndexed() 50 …m_program->write_word_unaligned(m_reg[m_modval2 & 0x1F] + m_reg[m_modval & 0x1F] * 2, m_modwriteva… in am3RegisterIndirectIndexed() 53 …m_program->write_dword_unaligned(m_reg[m_modval2 & 0x1F] + m_reg[m_modval & 0x1F] * 4, m_modwritev… in am3RegisterIndirectIndexed() 66 m_reg[m_modval & 0x1F] += 1; in am3Autoincrement() 70 m_reg[m_modval & 0x1F] += 2; in am3Autoincrement() 74 m_reg[m_modval & 0x1F] += 4; in am3Autoincrement() 86 m_reg[m_modval & 0x1F] -= 1; in am3Autodecrement() 90 m_reg[m_modval & 0x1F] -= 2; in am3Autodecrement() [all …]
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/dports/emulators/mame/mame-mame0226/src/devices/cpu/v60/ |
H A D | am2.hxx | 16 m_amout = m_reg[m_modval & 0x1F]; in am2RegisterIndirect() 35 m_amout = m_reg[m_modval2 & 0x1F] + m_reg[m_modval & 0x1F]; in am2RegisterIndirectIndexed() 38 m_amout = m_reg[m_modval2 & 0x1F] + m_reg[m_modval & 0x1F] * 2; in am2RegisterIndirectIndexed() 41 m_amout = m_reg[m_modval2 & 0x1F] + m_reg[m_modval & 0x1F] * 4; in am2RegisterIndirectIndexed() 44 m_amout = m_reg[m_modval2 & 0x1F] + m_reg[m_modval & 0x1F] * 8; in am2RegisterIndirectIndexed() 67 m_reg[m_modval & 0x1F] += 1; in am2Autoincrement() 70 m_reg[m_modval & 0x1F] += 2; in am2Autoincrement() 92 m_reg[m_modval & 0x1F] +=1; in bam2Autoincrement() 95 m_reg[m_modval & 0x1F] +=4; in bam2Autoincrement() 137 m_reg[m_modval & 0x1F]-=1; in bam2Autodecrement() [all …]
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H A D | am3.hxx | 11 SETREG8(m_reg[m_modval & 0x1F], m_modwritevalb); in am3Register() 17 m_reg[m_modval & 0x1F] = m_modwritevalw; in am3Register() 47 m_program->write_byte(m_reg[m_modval2 & 0x1F] + m_reg[m_modval & 0x1F], m_modwritevalb); in am3RegisterIndirectIndexed() 50 …m_program->write_word_unaligned(m_reg[m_modval2 & 0x1F] + m_reg[m_modval & 0x1F] * 2, m_modwriteva… in am3RegisterIndirectIndexed() 53 …m_program->write_dword_unaligned(m_reg[m_modval2 & 0x1F] + m_reg[m_modval & 0x1F] * 4, m_modwritev… in am3RegisterIndirectIndexed() 66 m_reg[m_modval & 0x1F] += 1; in am3Autoincrement() 70 m_reg[m_modval & 0x1F] += 2; in am3Autoincrement() 74 m_reg[m_modval & 0x1F] += 4; in am3Autoincrement() 86 m_reg[m_modval & 0x1F] -= 1; in am3Autodecrement() 90 m_reg[m_modval & 0x1F] -= 2; in am3Autodecrement() [all …]
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