| /dports/net/pathneck/pathneck-1.3/ |
| H A D | get-line.c | 90 int mask_num;
110 mask_num = atoi(tmp_str);
111 p->mask = (0xffffffff >> (32-mask_num));
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| /dports/emulators/dps8m/dps8m-572f79bb4f0f84a8b16c3892c894c2b9ed64b458/src/dps8/ |
| H A D | dps8_scu.c | 1736 int mask_num = -1; in scu_sscr() local
1747 mask_num = p; in scu_sscr()
1774 scu [scu_unit_idx].exec_intr_mask [mask_num] = 0; in scu_sscr()
1775 scu [scu_unit_idx].exec_intr_mask [mask_num] |= in scu_sscr()
1777 scu [scu_unit_idx].exec_intr_mask [mask_num] |= in scu_sscr()
1782 __func__, mask_num + 'A', in scu_sscr()
1791 scu_unit_idx, port_num, mask_num, in scu_sscr()
1792 scu [scu_unit_idx].exec_intr_mask [mask_num]); in scu_sscr()
1794 scu [scu_unit_idx].mask_enable [mask_num] = 1; in scu_sscr()
1798 scu_unit_idx, 'a' + mask_num, in scu_sscr()
[all …]
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| /dports/www/chromium-legacy/chromium-88.0.4324.182/chrome/common/qr_code_generator/ |
| H A D | qr_code_generator.cc | 483 for (uint8_t mask_num = 0; !mask && mask_num <= kMaxMask; mask_num++) { in Generate() local
492 PutFormatBits(kFormatInformation[mask_num]); in Generate()
495 kMaskFunctions[mask_num]); in Generate()
500 best_mask = mask_num; in Generate()
|
| /dports/misc/darknet/darknet-darknet_yolo_v4_pre/src/ |
| H A D | blas.h | 74 void mask_gpu_new_api(int N, float * X, float mask_num, float * mask, float val);
75 void mask_ongpu(int N, float * X, float mask_num, float * mask);
|
| H A D | blas_kernels.cu | 513 __global__ void mask_kernel_new_api(int n, float *x, float mask_num, float *mask, float val) in mask_kernel_new_api() argument
516 if (i < n && mask[i] == mask_num) x[i] = val; in mask_kernel_new_api()
519 __global__ void mask_kernel(int n, float *x, float mask_num, float *mask) in mask_kernel() argument
522 if(i < n && mask[i] == mask_num) x[i] = mask_num; in mask_kernel()
805 extern "C" void mask_gpu_new_api(int N, float * X, float mask_num, float * mask, float val) in mask_gpu_new_api() argument
807 …mask_kernel_new_api <<<cuda_gridsize(N), BLOCK, 0, get_cuda_stream() >>>(N, X, mask_num, mask, val… in mask_gpu_new_api()
811 extern "C" void mask_ongpu(int N, float * X, float mask_num, float * mask) in mask_ongpu() argument
813 mask_kernel<<<cuda_gridsize(N), BLOCK, 0, get_cuda_stream() >>>(N, X, mask_num, mask); in mask_ongpu()
|
| /dports/games/xhime/xhime1.51/ |
| H A D | xhime.c | 175 int *mask_num; member
482 CALLOC(clp->mask_num, NCELLS, sizeof(clp->mask_num));
484 mp = clp->mask_num;
743 int *mp = clp->mask_num, k; in MakePixmap()
|
| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/mips/ |
| H A D | cpu.h | 665 extern void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env);
666 extern uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env);
|
| H A D | dsp_helper.c | 3605 void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env) in cpu_wrdsp() argument
3617 mask[i] = (mask_num >> i) & 0x01; in cpu_wrdsp()
3671 void helper_wrdsp(target_ulong rs, target_ulong mask_num, CPUMIPSState *env) in helper_wrdsp() argument
3673 cpu_wrdsp(rs, mask_num, env); in helper_wrdsp()
3676 uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env) in cpu_rddsp() argument
3685 mask[i] = (mask_num & ruler) >> i ; in cpu_rddsp()
3727 target_ulong helper_rddsp(target_ulong mask_num, CPUMIPSState *env) in helper_rddsp() argument
3729 return cpu_rddsp(mask_num, env); in helper_rddsp()
|
| /dports/emulators/unicorn/unicorn-1.0.2/qemu/target-mips/ |
| H A D | cpu.h | 618 extern void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env);
619 extern uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env);
|
| H A D | dsp_helper.c | 3613 void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env) in cpu_wrdsp() argument
3625 mask[i] = (mask_num >> i) & 0x01; in cpu_wrdsp()
3679 void helper_wrdsp(target_ulong rs, target_ulong mask_num, CPUMIPSState *env) in helper_wrdsp() argument
3681 cpu_wrdsp(rs, mask_num, env); in helper_wrdsp()
3684 uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env) in cpu_rddsp() argument
3693 mask[i] = (mask_num & ruler) >> i ; in cpu_rddsp()
3735 target_ulong helper_rddsp(target_ulong mask_num, CPUMIPSState *env) in helper_rddsp() argument
3737 return cpu_rddsp(mask_num, env); in helper_rddsp()
|
| /dports/emulators/qemu-utils/qemu-4.2.1/target/mips/ |
| H A D | cpu.h | 1143 extern void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env);
1144 extern uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env);
|
| H A D | dsp_helper.c | 3623 void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env) in cpu_wrdsp() argument
3635 mask[i] = (mask_num >> i) & 0x01; in cpu_wrdsp()
3689 void helper_wrdsp(target_ulong rs, target_ulong mask_num, CPUMIPSState *env) in helper_wrdsp() argument
3691 cpu_wrdsp(rs, mask_num, env); in helper_wrdsp()
3694 uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env) in cpu_rddsp() argument
3703 mask[i] = (mask_num & ruler) >> i ; in cpu_rddsp()
3745 target_ulong helper_rddsp(target_ulong mask_num, CPUMIPSState *env) in helper_rddsp() argument
3747 return cpu_rddsp(mask_num, env); in helper_rddsp()
|
| /dports/emulators/py-unicorn/unicorn-1.0.2/qemu/target-mips/ |
| H A D | cpu.h | 618 extern void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env);
619 extern uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env);
|
| H A D | dsp_helper.c | 3613 void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env) in cpu_wrdsp() argument
3625 mask[i] = (mask_num >> i) & 0x01; in cpu_wrdsp()
3679 void helper_wrdsp(target_ulong rs, target_ulong mask_num, CPUMIPSState *env) in helper_wrdsp() argument
3681 cpu_wrdsp(rs, mask_num, env); in helper_wrdsp()
3684 uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env) in cpu_rddsp() argument
3693 mask[i] = (mask_num & ruler) >> i ; in cpu_rddsp()
3735 target_ulong helper_rddsp(target_ulong mask_num, CPUMIPSState *env) in helper_rddsp() argument
3737 return cpu_rddsp(mask_num, env); in helper_rddsp()
|
| /dports/emulators/qemu5/qemu-5.2.0/target/mips/ |
| H A D | cpu.h | 1186 extern void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env);
1187 extern uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env);
|
| H A D | dsp_helper.c | 3623 void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env) in cpu_wrdsp() argument
3635 mask[i] = (mask_num >> i) & 0x01; in cpu_wrdsp()
3689 void helper_wrdsp(target_ulong rs, target_ulong mask_num, CPUMIPSState *env) in helper_wrdsp() argument
3691 cpu_wrdsp(rs, mask_num, env); in helper_wrdsp()
3694 uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env) in cpu_rddsp() argument
3703 mask[i] = (mask_num & ruler) >> i ; in cpu_rddsp()
3745 target_ulong helper_rddsp(target_ulong mask_num, CPUMIPSState *env) in helper_rddsp() argument
3747 return cpu_rddsp(mask_num, env); in helper_rddsp()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/target/mips/ |
| H A D | cpu.h | 1143 extern void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env);
1144 extern uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env);
|
| H A D | dsp_helper.c | 3623 void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env) in cpu_wrdsp() argument
3635 mask[i] = (mask_num >> i) & 0x01; in cpu_wrdsp()
3689 void helper_wrdsp(target_ulong rs, target_ulong mask_num, CPUMIPSState *env) in helper_wrdsp() argument
3691 cpu_wrdsp(rs, mask_num, env); in helper_wrdsp()
3694 uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env) in cpu_rddsp() argument
3703 mask[i] = (mask_num & ruler) >> i ; in cpu_rddsp()
3745 target_ulong helper_rddsp(target_ulong mask_num, CPUMIPSState *env) in helper_rddsp() argument
3747 return cpu_rddsp(mask_num, env); in helper_rddsp()
|
| /dports/emulators/qemu42/qemu-4.2.1/target/mips/ |
| H A D | cpu.h | 1143 extern void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env);
1144 extern uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env);
|
| H A D | dsp_helper.c | 3623 void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env) in cpu_wrdsp() argument
3635 mask[i] = (mask_num >> i) & 0x01; in cpu_wrdsp()
3689 void helper_wrdsp(target_ulong rs, target_ulong mask_num, CPUMIPSState *env) in helper_wrdsp() argument
3691 cpu_wrdsp(rs, mask_num, env); in helper_wrdsp()
3694 uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env) in cpu_rddsp() argument
3703 mask[i] = (mask_num & ruler) >> i ; in cpu_rddsp()
3745 target_ulong helper_rddsp(target_ulong mask_num, CPUMIPSState *env) in helper_rddsp() argument
3747 return cpu_rddsp(mask_num, env); in helper_rddsp()
|
| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/mips/ |
| H A D | cpu.h | 1198 extern void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env);
1199 extern uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env);
|
| /dports/emulators/qemu/qemu-6.2.0/target/mips/ |
| H A D | cpu.h | 1198 extern void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env);
1199 extern uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env);
|
| /dports/emulators/qemu60/qemu-6.0.0/target/mips/ |
| H A D | cpu.h | 1199 extern void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env);
1200 extern uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env);
|
| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/mips/ |
| H A D | cpu.h | 1313 extern void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env);
1314 extern uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env);
|
| H A D | dsp_helper.c | 3623 void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env) in cpu_wrdsp() argument
3635 mask[i] = (mask_num >> i) & 0x01; in cpu_wrdsp()
3689 void helper_wrdsp(target_ulong rs, target_ulong mask_num, CPUMIPSState *env) in helper_wrdsp() argument
3691 cpu_wrdsp(rs, mask_num, env); in helper_wrdsp()
3694 uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env) in cpu_rddsp() argument
3703 mask[i] = (mask_num & ruler) >> i ; in cpu_rddsp()
3745 target_ulong helper_rddsp(target_ulong mask_num, CPUMIPSState *env) in helper_rddsp() argument
3747 return cpu_rddsp(mask_num, env); in helper_rddsp()
|