| /dports/graphics/libosmesa-gallium/mesa-21.3.6/src/panfrost/midgard/ |
| H A D | midgard_print.c | 116 unsigned base_size = max_bitsize_for_alu(ins); in mir_print_embedded_constant()
121 midgard_reg_mode reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins)); in mir_print_embedded_constant()
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| H A D | midgard_emit.c | 92 unsigned base_size = max_bitsize_for_alu(ins); in mir_pack_mod()
217 unsigned inst_size = max_bitsize_for_alu(ins); in mir_pack_mask_alu()
335 unsigned base_size = max_bitsize_for_alu(ins); in mir_pack_vector_srcs()
686 .reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins)) in vector_alu_from_instr()
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| H A D | compiler.h | 507 unsigned max_bitsize_for_alu(midgard_instruction *ins);
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| /dports/graphics/libosmesa/mesa-21.3.6/src/panfrost/midgard/ |
| H A D | midgard_print.c | 116 unsigned base_size = max_bitsize_for_alu(ins); in mir_print_embedded_constant()
121 midgard_reg_mode reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins)); in mir_print_embedded_constant()
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| H A D | midgard_emit.c | 92 unsigned base_size = max_bitsize_for_alu(ins); in mir_pack_mod()
217 unsigned inst_size = max_bitsize_for_alu(ins); in mir_pack_mask_alu()
335 unsigned base_size = max_bitsize_for_alu(ins); in mir_pack_vector_srcs()
686 .reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins)) in vector_alu_from_instr()
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| H A D | compiler.h | 507 unsigned max_bitsize_for_alu(midgard_instruction *ins);
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| /dports/graphics/mesa-libs/mesa-21.3.6/src/panfrost/midgard/ |
| H A D | midgard_print.c | 116 unsigned base_size = max_bitsize_for_alu(ins); in mir_print_embedded_constant()
121 midgard_reg_mode reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins)); in mir_print_embedded_constant()
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| H A D | midgard_emit.c | 92 unsigned base_size = max_bitsize_for_alu(ins); in mir_pack_mod()
217 unsigned inst_size = max_bitsize_for_alu(ins); in mir_pack_mask_alu()
335 unsigned base_size = max_bitsize_for_alu(ins); in mir_pack_vector_srcs()
686 .reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins)) in vector_alu_from_instr()
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| /dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/panfrost/midgard/ |
| H A D | midgard_print.c | 116 unsigned base_size = max_bitsize_for_alu(ins); in mir_print_embedded_constant()
121 midgard_reg_mode reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins)); in mir_print_embedded_constant()
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| H A D | midgard_emit.c | 92 unsigned base_size = max_bitsize_for_alu(ins); in mir_pack_mod()
217 unsigned inst_size = max_bitsize_for_alu(ins); in mir_pack_mask_alu()
335 unsigned base_size = max_bitsize_for_alu(ins); in mir_pack_vector_srcs()
686 .reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins)) in vector_alu_from_instr()
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| /dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/panfrost/midgard/ |
| H A D | midgard_print.c | 116 unsigned base_size = max_bitsize_for_alu(ins); in mir_print_embedded_constant()
121 midgard_reg_mode reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins)); in mir_print_embedded_constant()
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| H A D | midgard_emit.c | 92 unsigned base_size = max_bitsize_for_alu(ins); in mir_pack_mod()
217 unsigned inst_size = max_bitsize_for_alu(ins); in mir_pack_mask_alu()
335 unsigned base_size = max_bitsize_for_alu(ins); in mir_pack_vector_srcs()
686 .reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins)) in vector_alu_from_instr()
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| /dports/graphics/mesa-gallium-va/mesa-21.3.6/src/panfrost/midgard/ |
| H A D | midgard_print.c | 116 unsigned base_size = max_bitsize_for_alu(ins); in mir_print_embedded_constant()
121 midgard_reg_mode reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins)); in mir_print_embedded_constant()
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| H A D | midgard_emit.c | 92 unsigned base_size = max_bitsize_for_alu(ins); in mir_pack_mod()
217 unsigned inst_size = max_bitsize_for_alu(ins); in mir_pack_mask_alu()
335 unsigned base_size = max_bitsize_for_alu(ins); in mir_pack_vector_srcs()
686 .reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins)) in vector_alu_from_instr()
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| /dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/panfrost/midgard/ |
| H A D | midgard_print.c | 116 unsigned base_size = max_bitsize_for_alu(ins); in mir_print_embedded_constant()
121 midgard_reg_mode reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins)); in mir_print_embedded_constant()
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| H A D | midgard_emit.c | 92 unsigned base_size = max_bitsize_for_alu(ins); in mir_pack_mod()
217 unsigned inst_size = max_bitsize_for_alu(ins); in mir_pack_mask_alu()
335 unsigned base_size = max_bitsize_for_alu(ins); in mir_pack_vector_srcs()
686 .reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins)) in vector_alu_from_instr()
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| /dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/panfrost/midgard/ |
| H A D | midgard_print.c | 116 unsigned base_size = max_bitsize_for_alu(ins); in mir_print_embedded_constant()
121 midgard_reg_mode reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins)); in mir_print_embedded_constant()
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| H A D | midgard_emit.c | 81 unsigned base_size = max_bitsize_for_alu(ins); in mir_pack_mod()
205 unsigned inst_size = max_bitsize_for_alu(ins); in mir_pack_mask_alu()
329 unsigned base_size = max_bitsize_for_alu(ins); in mir_pack_vector_srcs()
675 .reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins)) in vector_alu_from_instr()
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| /dports/graphics/mesa-dri/mesa-21.3.6/src/panfrost/midgard/ |
| H A D | midgard_print.c | 116 unsigned base_size = max_bitsize_for_alu(ins); in mir_print_embedded_constant()
121 midgard_reg_mode reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins)); in mir_print_embedded_constant()
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| H A D | midgard_emit.c | 92 unsigned base_size = max_bitsize_for_alu(ins); in mir_pack_mod()
217 unsigned inst_size = max_bitsize_for_alu(ins); in mir_pack_mask_alu()
335 unsigned base_size = max_bitsize_for_alu(ins); in mir_pack_vector_srcs()
686 .reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins)) in vector_alu_from_instr()
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| /dports/lang/clover/mesa-21.3.6/src/panfrost/midgard/ |
| H A D | midgard_print.c | 116 unsigned base_size = max_bitsize_for_alu(ins); in mir_print_embedded_constant()
121 midgard_reg_mode reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins)); in mir_print_embedded_constant()
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| H A D | midgard_emit.c | 92 unsigned base_size = max_bitsize_for_alu(ins); in mir_pack_mod()
217 unsigned inst_size = max_bitsize_for_alu(ins); in mir_pack_mask_alu()
335 unsigned base_size = max_bitsize_for_alu(ins); in mir_pack_vector_srcs()
686 .reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins)) in vector_alu_from_instr()
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| /dports/graphics/mesa-dri-classic/mesa-20.2.3/src/panfrost/midgard/ |
| H A D | midgard_emit.c | 50 unsigned base_size = max_bitsize_for_alu(ins); in mir_pack_mod()
175 unsigned inst_size = max_bitsize_for_alu(ins); in mir_pack_mask_alu()
283 unsigned base_size = max_bitsize_for_alu(ins); in mir_pack_vector_srcs()
565 .reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins)) in vector_alu_from_instr()
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| H A D | midgard_print.c | 240 unsigned base_size = max_bitsize_for_alu(ins); in mir_print_embedded_constant()
245 midgard_reg_mode reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins)); in mir_print_embedded_constant()
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| H A D | compiler.h | 522 unsigned max_bitsize_for_alu(midgard_instruction *ins);
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