| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | smu7_hwmgr.c | 749 &data->dpm_table.mclk_table, in smu7_reset_dpm_tables()
821 data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].value = in smu7_setup_dpm_tables_v0()
917 data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].value = in smu7_setup_dpm_tables_v1()
919 data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].enabled = in smu7_setup_dpm_tables_v1()
3114 golden_dpm_table->mclk_table.dpm_levels[golden_dpm_table->mclk_table.count - 1].value; in smu7_get_profiling_clk()
4018 struct smu7_single_dpm_table *mclk_table = &(data->dpm_table.mclk_table); in smu7_find_dpm_states_clocks_in_dpm_table() local
4894 struct smu7_single_dpm_table *mclk_table = &(data->dpm_table.mclk_table); in smu7_print_clock_levels() local
5057 struct smu7_single_dpm_table *mclk_table = &(data->dpm_table.mclk_table); in smu7_get_mclk_od() local
5060 int value = mclk_table->dpm_levels[mclk_table->count - 1].value; in smu7_get_mclk_od()
5343 struct smu7_single_dpm_table *mclk_table = &(data->dpm_table.mclk_table); in smu7_get_max_high_clocks() local
[all …]
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| H A D | vega10_processpptables.c | 602 phm_ppt_v1_clock_voltage_dependency_table *mclk_table; in get_mclk_voltage_dependency_table() local
607 mclk_table = kzalloc(struct_size(mclk_table, entries, mclk_dep_table->ucNumEntries), in get_mclk_voltage_dependency_table()
609 if (!mclk_table) in get_mclk_voltage_dependency_table()
612 mclk_table->count = (uint32_t)mclk_dep_table->ucNumEntries; in get_mclk_voltage_dependency_table()
615 mclk_table->entries[i].vddInd = in get_mclk_voltage_dependency_table()
617 mclk_table->entries[i].vddciInd = in get_mclk_voltage_dependency_table()
619 mclk_table->entries[i].mvddInd = in get_mclk_voltage_dependency_table()
621 mclk_table->entries[i].clk = in get_mclk_voltage_dependency_table()
625 *pp_vega10_mclk_dep_table = mclk_table; in get_mclk_voltage_dependency_table()
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| H A D | smu10_hwmgr.c | 944 struct smu10_voltage_dependency_table *mclk_table = in smu10_force_clock_level() local
974 if (low > mclk_table->count - 1 || high > mclk_table->count - 1) in smu10_force_clock_level()
979 mclk_table->entries[low].clk/100, in smu10_force_clock_level()
984 mclk_table->entries[high].clk/100, in smu10_force_clock_level()
999 struct smu10_voltage_dependency_table *mclk_table = in smu10_print_clock_levels() local
1030 for (i = 0; i < mclk_table->count; i++) in smu10_print_clock_levels()
1033 mclk_table->entries[i].clk / 100, in smu10_print_clock_levels()
1034 ((mclk_table->entries[i].clk / 100) in smu10_print_clock_levels()
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| H A D | vega10_hwmgr.c | 697 mclk_table->entries[entry_id].vddc = in vega10_patch_voltage_dependency_tables_with_lookup_table()
700 mclk_table->entries[entry_id].vddci = in vega10_patch_voltage_dependency_tables_with_lookup_table()
703 mclk_table->entries[entry_id].mvdd = in vega10_patch_voltage_dependency_tables_with_lookup_table()
3411 for (i = 0; i < mclk_table->count; i++) { in vega10_find_dpm_states_clocks_in_dpm_table()
3416 if (i >= mclk_table->count) { in vega10_find_dpm_states_clocks_in_dpm_table()
3419 mclk_table->dpm_levels[i-1].value = mclk; in vega10_find_dpm_states_clocks_in_dpm_table()
4020 if (mclk_table == NULL || mclk_table->count == 0) in vega10_get_uclk_index()
4023 count = (uint8_t)(mclk_table->count); in vega10_get_uclk_index()
4026 if(mclk_table->entries[i].clk >= frequency) in vega10_get_uclk_index()
4659 for (i = 0; i < mclk_table->count; i++) in vega10_print_clock_levels()
[all …]
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| H A D | process_pptables_v1_0.c | 367 phm_ppt_v1_clock_voltage_dependency_table *mclk_table; in get_mclk_voltage_dependency_table() local
374 mclk_table = kzalloc(struct_size(mclk_table, entries, mclk_dep_table->ucNumEntries), in get_mclk_voltage_dependency_table()
376 if (!mclk_table) in get_mclk_voltage_dependency_table()
379 mclk_table->count = (uint32_t)mclk_dep_table->ucNumEntries; in get_mclk_voltage_dependency_table()
384 entries, mclk_table, i); in get_mclk_voltage_dependency_table()
395 *pp_tonga_mclk_dep_table = mclk_table; in get_mclk_voltage_dependency_table()
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | smu7_hwmgr.c | 749 &data->dpm_table.mclk_table, in smu7_reset_dpm_tables()
821 data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].value = in smu7_setup_dpm_tables_v0()
917 data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].value = in smu7_setup_dpm_tables_v1()
919 data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].enabled = in smu7_setup_dpm_tables_v1()
3114 golden_dpm_table->mclk_table.dpm_levels[golden_dpm_table->mclk_table.count - 1].value; in smu7_get_profiling_clk()
4018 struct smu7_single_dpm_table *mclk_table = &(data->dpm_table.mclk_table); in smu7_find_dpm_states_clocks_in_dpm_table() local
4894 struct smu7_single_dpm_table *mclk_table = &(data->dpm_table.mclk_table); in smu7_print_clock_levels() local
5057 struct smu7_single_dpm_table *mclk_table = &(data->dpm_table.mclk_table); in smu7_get_mclk_od() local
5060 int value = mclk_table->dpm_levels[mclk_table->count - 1].value; in smu7_get_mclk_od()
5343 struct smu7_single_dpm_table *mclk_table = &(data->dpm_table.mclk_table); in smu7_get_max_high_clocks() local
[all …]
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| H A D | vega10_processpptables.c | 602 phm_ppt_v1_clock_voltage_dependency_table *mclk_table; in get_mclk_voltage_dependency_table() local
607 mclk_table = kzalloc(struct_size(mclk_table, entries, mclk_dep_table->ucNumEntries), in get_mclk_voltage_dependency_table()
609 if (!mclk_table) in get_mclk_voltage_dependency_table()
612 mclk_table->count = (uint32_t)mclk_dep_table->ucNumEntries; in get_mclk_voltage_dependency_table()
615 mclk_table->entries[i].vddInd = in get_mclk_voltage_dependency_table()
617 mclk_table->entries[i].vddciInd = in get_mclk_voltage_dependency_table()
619 mclk_table->entries[i].mvddInd = in get_mclk_voltage_dependency_table()
621 mclk_table->entries[i].clk = in get_mclk_voltage_dependency_table()
625 *pp_vega10_mclk_dep_table = mclk_table; in get_mclk_voltage_dependency_table()
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| H A D | smu10_hwmgr.c | 944 struct smu10_voltage_dependency_table *mclk_table = in smu10_force_clock_level() local
974 if (low > mclk_table->count - 1 || high > mclk_table->count - 1) in smu10_force_clock_level()
979 mclk_table->entries[low].clk/100, in smu10_force_clock_level()
984 mclk_table->entries[high].clk/100, in smu10_force_clock_level()
999 struct smu10_voltage_dependency_table *mclk_table = in smu10_print_clock_levels() local
1030 for (i = 0; i < mclk_table->count; i++) in smu10_print_clock_levels()
1033 mclk_table->entries[i].clk / 100, in smu10_print_clock_levels()
1034 ((mclk_table->entries[i].clk / 100) in smu10_print_clock_levels()
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| H A D | vega10_hwmgr.c | 697 mclk_table->entries[entry_id].vddc = in vega10_patch_voltage_dependency_tables_with_lookup_table()
700 mclk_table->entries[entry_id].vddci = in vega10_patch_voltage_dependency_tables_with_lookup_table()
703 mclk_table->entries[entry_id].mvdd = in vega10_patch_voltage_dependency_tables_with_lookup_table()
3411 for (i = 0; i < mclk_table->count; i++) { in vega10_find_dpm_states_clocks_in_dpm_table()
3416 if (i >= mclk_table->count) { in vega10_find_dpm_states_clocks_in_dpm_table()
3419 mclk_table->dpm_levels[i-1].value = mclk; in vega10_find_dpm_states_clocks_in_dpm_table()
4020 if (mclk_table == NULL || mclk_table->count == 0) in vega10_get_uclk_index()
4023 count = (uint8_t)(mclk_table->count); in vega10_get_uclk_index()
4026 if(mclk_table->entries[i].clk >= frequency) in vega10_get_uclk_index()
4659 for (i = 0; i < mclk_table->count; i++) in vega10_print_clock_levels()
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| H A D | process_pptables_v1_0.c | 367 phm_ppt_v1_clock_voltage_dependency_table *mclk_table; in get_mclk_voltage_dependency_table() local
374 mclk_table = kzalloc(struct_size(mclk_table, entries, mclk_dep_table->ucNumEntries), in get_mclk_voltage_dependency_table()
376 if (!mclk_table) in get_mclk_voltage_dependency_table()
379 mclk_table->count = (uint32_t)mclk_dep_table->ucNumEntries; in get_mclk_voltage_dependency_table()
384 entries, mclk_table, i); in get_mclk_voltage_dependency_table()
395 *pp_tonga_mclk_dep_table = mclk_table; in get_mclk_voltage_dependency_table()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | smu7_hwmgr.c | 749 &data->dpm_table.mclk_table, in smu7_reset_dpm_tables()
821 data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].value = in smu7_setup_dpm_tables_v0()
917 data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].value = in smu7_setup_dpm_tables_v1()
919 data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].enabled = in smu7_setup_dpm_tables_v1()
3114 golden_dpm_table->mclk_table.dpm_levels[golden_dpm_table->mclk_table.count - 1].value; in smu7_get_profiling_clk()
4018 struct smu7_single_dpm_table *mclk_table = &(data->dpm_table.mclk_table); in smu7_find_dpm_states_clocks_in_dpm_table() local
4894 struct smu7_single_dpm_table *mclk_table = &(data->dpm_table.mclk_table); in smu7_print_clock_levels() local
5057 struct smu7_single_dpm_table *mclk_table = &(data->dpm_table.mclk_table); in smu7_get_mclk_od() local
5060 int value = mclk_table->dpm_levels[mclk_table->count - 1].value; in smu7_get_mclk_od()
5343 struct smu7_single_dpm_table *mclk_table = &(data->dpm_table.mclk_table); in smu7_get_max_high_clocks() local
[all …]
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| H A D | vega10_processpptables.c | 602 phm_ppt_v1_clock_voltage_dependency_table *mclk_table; in get_mclk_voltage_dependency_table() local
607 mclk_table = kzalloc(struct_size(mclk_table, entries, mclk_dep_table->ucNumEntries), in get_mclk_voltage_dependency_table()
609 if (!mclk_table) in get_mclk_voltage_dependency_table()
612 mclk_table->count = (uint32_t)mclk_dep_table->ucNumEntries; in get_mclk_voltage_dependency_table()
615 mclk_table->entries[i].vddInd = in get_mclk_voltage_dependency_table()
617 mclk_table->entries[i].vddciInd = in get_mclk_voltage_dependency_table()
619 mclk_table->entries[i].mvddInd = in get_mclk_voltage_dependency_table()
621 mclk_table->entries[i].clk = in get_mclk_voltage_dependency_table()
625 *pp_vega10_mclk_dep_table = mclk_table; in get_mclk_voltage_dependency_table()
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| H A D | smu10_hwmgr.c | 944 struct smu10_voltage_dependency_table *mclk_table = in smu10_force_clock_level() local
974 if (low > mclk_table->count - 1 || high > mclk_table->count - 1) in smu10_force_clock_level()
979 mclk_table->entries[low].clk/100, in smu10_force_clock_level()
984 mclk_table->entries[high].clk/100, in smu10_force_clock_level()
999 struct smu10_voltage_dependency_table *mclk_table = in smu10_print_clock_levels() local
1030 for (i = 0; i < mclk_table->count; i++) in smu10_print_clock_levels()
1033 mclk_table->entries[i].clk / 100, in smu10_print_clock_levels()
1034 ((mclk_table->entries[i].clk / 100) in smu10_print_clock_levels()
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| H A D | vega10_hwmgr.c | 697 mclk_table->entries[entry_id].vddc = in vega10_patch_voltage_dependency_tables_with_lookup_table()
700 mclk_table->entries[entry_id].vddci = in vega10_patch_voltage_dependency_tables_with_lookup_table()
703 mclk_table->entries[entry_id].mvdd = in vega10_patch_voltage_dependency_tables_with_lookup_table()
3411 for (i = 0; i < mclk_table->count; i++) { in vega10_find_dpm_states_clocks_in_dpm_table()
3416 if (i >= mclk_table->count) { in vega10_find_dpm_states_clocks_in_dpm_table()
3419 mclk_table->dpm_levels[i-1].value = mclk; in vega10_find_dpm_states_clocks_in_dpm_table()
4020 if (mclk_table == NULL || mclk_table->count == 0) in vega10_get_uclk_index()
4023 count = (uint8_t)(mclk_table->count); in vega10_get_uclk_index()
4026 if(mclk_table->entries[i].clk >= frequency) in vega10_get_uclk_index()
4659 for (i = 0; i < mclk_table->count; i++) in vega10_print_clock_levels()
[all …]
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| H A D | process_pptables_v1_0.c | 367 phm_ppt_v1_clock_voltage_dependency_table *mclk_table; in get_mclk_voltage_dependency_table() local
374 mclk_table = kzalloc(struct_size(mclk_table, entries, mclk_dep_table->ucNumEntries), in get_mclk_voltage_dependency_table()
376 if (!mclk_table) in get_mclk_voltage_dependency_table()
379 mclk_table->count = (uint32_t)mclk_dep_table->ucNumEntries; in get_mclk_voltage_dependency_table()
384 entries, mclk_table, i); in get_mclk_voltage_dependency_table()
395 *pp_tonga_mclk_dep_table = mclk_table; in get_mclk_voltage_dependency_table()
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| /dports/misc/rump/buildrump.sh-b914579/src/sys/external/bsd/drm2/dist/drm/radeon/ |
| H A D | ci_dpm.c | 2996 &pi->dpm_table.mclk_table, in ci_setup_default_dpm_tables()
3020 pi->dpm_table.mclk_table.count = 0; in ci_setup_default_dpm_tables()
3023 (pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count-1].value != in ci_setup_default_dpm_tables()
3025 pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].value = in ci_setup_default_dpm_tables()
3027 pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].enabled = true; in ci_setup_default_dpm_tables()
3028 pi->dpm_table.mclk_table.count++; in ci_setup_default_dpm_tables()
3297 &pi->dpm_table.mclk_table, in ci_trim_dpm_states()
3389 struct ci_single_dpm_table *mclk_table = &pi->dpm_table.mclk_table; in ci_find_dpm_states_clocks_in_dpm_table() local
3413 if (i >= mclk_table->count) in ci_find_dpm_states_clocks_in_dpm_table()
3438 dpm_table->mclk_table.dpm_levels[dpm_table->mclk_table.count-1].value = mclk; in ci_populate_and_upload_sclk_mclk_dpm_levels()
[all …]
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/radeon/ |
| H A D | ci_dpm.c | 3431 &pi->dpm_table.mclk_table, in ci_setup_default_dpm_tables()
3456 pi->dpm_table.mclk_table.count = 0; in ci_setup_default_dpm_tables()
3459 (pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count-1].value != in ci_setup_default_dpm_tables()
3461 pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].value = in ci_setup_default_dpm_tables()
3463 pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].enabled = in ci_setup_default_dpm_tables()
3465 pi->dpm_table.mclk_table.count++; in ci_setup_default_dpm_tables()
3734 &pi->dpm_table.mclk_table, in ci_trim_dpm_states()
3826 struct ci_single_dpm_table *mclk_table = &pi->dpm_table.mclk_table; in ci_find_dpm_states_clocks_in_dpm_table() local
3853 if (i >= mclk_table->count) in ci_find_dpm_states_clocks_in_dpm_table()
3878 dpm_table->mclk_table.dpm_levels[dpm_table->mclk_table.count-1].value = mclk; in ci_populate_and_upload_sclk_mclk_dpm_levels()
[all …]
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/radeon/ |
| H A D | ci_dpm.c | 3431 &pi->dpm_table.mclk_table, in ci_setup_default_dpm_tables()
3456 pi->dpm_table.mclk_table.count = 0; in ci_setup_default_dpm_tables()
3459 (pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count-1].value != in ci_setup_default_dpm_tables()
3461 pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].value = in ci_setup_default_dpm_tables()
3463 pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].enabled = in ci_setup_default_dpm_tables()
3465 pi->dpm_table.mclk_table.count++; in ci_setup_default_dpm_tables()
3734 &pi->dpm_table.mclk_table, in ci_trim_dpm_states()
3826 struct ci_single_dpm_table *mclk_table = &pi->dpm_table.mclk_table; in ci_find_dpm_states_clocks_in_dpm_table() local
3853 if (i >= mclk_table->count) in ci_find_dpm_states_clocks_in_dpm_table()
3878 dpm_table->mclk_table.dpm_levels[dpm_table->mclk_table.count-1].value = mclk; in ci_populate_and_upload_sclk_mclk_dpm_levels()
[all …]
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/radeon/ |
| H A D | ci_dpm.c | 3431 &pi->dpm_table.mclk_table, in ci_setup_default_dpm_tables()
3456 pi->dpm_table.mclk_table.count = 0; in ci_setup_default_dpm_tables()
3459 (pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count-1].value != in ci_setup_default_dpm_tables()
3461 pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].value = in ci_setup_default_dpm_tables()
3463 pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].enabled = in ci_setup_default_dpm_tables()
3465 pi->dpm_table.mclk_table.count++; in ci_setup_default_dpm_tables()
3734 &pi->dpm_table.mclk_table, in ci_trim_dpm_states()
3826 struct ci_single_dpm_table *mclk_table = &pi->dpm_table.mclk_table; in ci_find_dpm_states_clocks_in_dpm_table() local
3853 if (i >= mclk_table->count) in ci_find_dpm_states_clocks_in_dpm_table()
3878 dpm_table->mclk_table.dpm_levels[dpm_table->mclk_table.count-1].value = mclk; in ci_populate_and_upload_sclk_mclk_dpm_levels()
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| H A D | iceland_smumgr.c | 1361 for (i = 0; i < dpm_table->mclk_table.count; i++) { in iceland_populate_all_memory_levels()
1362 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in iceland_populate_all_memory_levels()
1364 result = iceland_populate_single_memory_level(hwmgr, dpm_table->mclk_table.dpm_levels[i].value, in iceland_populate_all_memory_levels()
1382 smu_data->smc_state_table.MemoryDpmLevelCount = (uint8_t)dpm_table->mclk_table.count; in iceland_populate_all_memory_levels()
1383 …vel_enable_mask.mclk_dpm_enable_mask = phm_get_dpm_level_enable_mask_value(&dpm_table->mclk_table); in iceland_populate_all_memory_levels()
1622 for (j = 0; j < data->dpm_table.mclk_table.count; j++) { in iceland_program_memory_timing_parameters()
1625 data->dpm_table.mclk_table.dpm_levels[j].value, in iceland_program_memory_timing_parameters()
1667 result = phm_find_boot_level(&(data->dpm_table.mclk_table), in iceland_populate_smc_boot_level()
1761 for (i = 0; i < data->dpm_table.mclk_table.count; i++) { in iceland_convert_mc_reg_table_to_smc()
1764 data->dpm_table.mclk_table.dpm_levels[i].value, in iceland_convert_mc_reg_table_to_smc()
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| H A D | vegam_smumgr.c | 1050 for (i = 0; i < dpm_table->mclk_table.count; i++) { in vegam_populate_all_memory_levels()
1051 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in vegam_populate_all_memory_levels()
1055 dpm_table->mclk_table.dpm_levels[i].value, in vegam_populate_all_memory_levels()
1068 (uint8_t)dpm_table->mclk_table.count; in vegam_populate_all_memory_levels()
1070 phm_get_dpm_level_enable_mask_value(&dpm_table->mclk_table); in vegam_populate_all_memory_levels()
1072 for (i = 0; i < dpm_table->mclk_table.count; i++) in vegam_populate_all_memory_levels()
1076 levels[dpm_table->mclk_table.count - 1].DisplayWatermark = in vegam_populate_all_memory_levels()
1289 for (j = 0; j < hw_data->dpm_table.mclk_table.count; j++) { in vegam_program_memory_timing_parameters()
1292 hw_data->dpm_table.mclk_table.dpm_levels[j].value, in vegam_program_memory_timing_parameters()
1381 result = phm_find_boot_level(&(data->dpm_table.mclk_table), in vegam_populate_smc_boot_level()
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| H A D | iceland_smumgr.c | 1361 for (i = 0; i < dpm_table->mclk_table.count; i++) { in iceland_populate_all_memory_levels()
1362 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in iceland_populate_all_memory_levels()
1364 result = iceland_populate_single_memory_level(hwmgr, dpm_table->mclk_table.dpm_levels[i].value, in iceland_populate_all_memory_levels()
1382 smu_data->smc_state_table.MemoryDpmLevelCount = (uint8_t)dpm_table->mclk_table.count; in iceland_populate_all_memory_levels()
1383 …vel_enable_mask.mclk_dpm_enable_mask = phm_get_dpm_level_enable_mask_value(&dpm_table->mclk_table); in iceland_populate_all_memory_levels()
1622 for (j = 0; j < data->dpm_table.mclk_table.count; j++) { in iceland_program_memory_timing_parameters()
1625 data->dpm_table.mclk_table.dpm_levels[j].value, in iceland_program_memory_timing_parameters()
1667 result = phm_find_boot_level(&(data->dpm_table.mclk_table), in iceland_populate_smc_boot_level()
1761 for (i = 0; i < data->dpm_table.mclk_table.count; i++) { in iceland_convert_mc_reg_table_to_smc()
1764 data->dpm_table.mclk_table.dpm_levels[i].value, in iceland_convert_mc_reg_table_to_smc()
[all …]
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| H A D | vegam_smumgr.c | 1050 for (i = 0; i < dpm_table->mclk_table.count; i++) { in vegam_populate_all_memory_levels()
1051 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in vegam_populate_all_memory_levels()
1055 dpm_table->mclk_table.dpm_levels[i].value, in vegam_populate_all_memory_levels()
1068 (uint8_t)dpm_table->mclk_table.count; in vegam_populate_all_memory_levels()
1070 phm_get_dpm_level_enable_mask_value(&dpm_table->mclk_table); in vegam_populate_all_memory_levels()
1072 for (i = 0; i < dpm_table->mclk_table.count; i++) in vegam_populate_all_memory_levels()
1076 levels[dpm_table->mclk_table.count - 1].DisplayWatermark = in vegam_populate_all_memory_levels()
1289 for (j = 0; j < hw_data->dpm_table.mclk_table.count; j++) { in vegam_program_memory_timing_parameters()
1292 hw_data->dpm_table.mclk_table.dpm_levels[j].value, in vegam_program_memory_timing_parameters()
1381 result = phm_find_boot_level(&(data->dpm_table.mclk_table), in vegam_populate_smc_boot_level()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| H A D | iceland_smumgr.c | 1361 for (i = 0; i < dpm_table->mclk_table.count; i++) { in iceland_populate_all_memory_levels()
1362 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in iceland_populate_all_memory_levels()
1364 result = iceland_populate_single_memory_level(hwmgr, dpm_table->mclk_table.dpm_levels[i].value, in iceland_populate_all_memory_levels()
1382 smu_data->smc_state_table.MemoryDpmLevelCount = (uint8_t)dpm_table->mclk_table.count; in iceland_populate_all_memory_levels()
1383 …vel_enable_mask.mclk_dpm_enable_mask = phm_get_dpm_level_enable_mask_value(&dpm_table->mclk_table); in iceland_populate_all_memory_levels()
1622 for (j = 0; j < data->dpm_table.mclk_table.count; j++) { in iceland_program_memory_timing_parameters()
1625 data->dpm_table.mclk_table.dpm_levels[j].value, in iceland_program_memory_timing_parameters()
1667 result = phm_find_boot_level(&(data->dpm_table.mclk_table), in iceland_populate_smc_boot_level()
1761 for (i = 0; i < data->dpm_table.mclk_table.count; i++) { in iceland_convert_mc_reg_table_to_smc()
1764 data->dpm_table.mclk_table.dpm_levels[i].value, in iceland_convert_mc_reg_table_to_smc()
[all …]
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| H A D | vegam_smumgr.c | 1050 for (i = 0; i < dpm_table->mclk_table.count; i++) { in vegam_populate_all_memory_levels()
1051 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in vegam_populate_all_memory_levels()
1055 dpm_table->mclk_table.dpm_levels[i].value, in vegam_populate_all_memory_levels()
1068 (uint8_t)dpm_table->mclk_table.count; in vegam_populate_all_memory_levels()
1070 phm_get_dpm_level_enable_mask_value(&dpm_table->mclk_table); in vegam_populate_all_memory_levels()
1072 for (i = 0; i < dpm_table->mclk_table.count; i++) in vegam_populate_all_memory_levels()
1076 levels[dpm_table->mclk_table.count - 1].DisplayWatermark = in vegam_populate_all_memory_levels()
1289 for (j = 0; j < hw_data->dpm_table.mclk_table.count; j++) { in vegam_program_memory_timing_parameters()
1292 hw_data->dpm_table.mclk_table.dpm_levels[j].value, in vegam_program_memory_timing_parameters()
1381 result = phm_find_boot_level(&(data->dpm_table.mclk_table), in vegam_populate_smc_boot_level()
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