Searched refs:mg_pll_div0 (Results 1 – 12 of 12) sorted by relevance
221 u32 mg_pll_div0; member
3326 pll_state->mg_pll_div0 = DKL_PLL_DIV0_INTEG_COEFF(int_coeff) | in icl_calc_mg_pll_state()3347 pll_state->mg_pll_div0 = in icl_calc_mg_pll_state()3426 m1 = pll_state->mg_pll_div0 & DKL_PLL_DIV0_FBPREDIV_MASK; in icl_ddi_mg_pll_get_freq()3428 m2_int = pll_state->mg_pll_div0 & DKL_PLL_DIV0_FBDIV_INT_MASK; in icl_ddi_mg_pll_get_freq()3439 m2_int = pll_state->mg_pll_div0 & MG_PLL_DIV0_FBDIV_INT_MASK; in icl_ddi_mg_pll_get_freq()3441 if (pll_state->mg_pll_div0 & MG_PLL_DIV0_FRACNEN_H) { in icl_ddi_mg_pll_get_freq()3442 m2_frac = pll_state->mg_pll_div0 & in icl_ddi_mg_pll_get_freq()3755 hw_state->mg_pll_div0 = intel_de_read(dev_priv, MG_PLL_DIV0(tc_port)); in mg_pll_get_hw_state()3827 hw_state->mg_pll_div0 &= (DKL_PLL_DIV0_INTEG_COEFF_MASK | in dkl_pll_get_hw_state()4051 val |= hw_state->mg_pll_div0; in dkl_pll_write()[all …]
1115 pll->state.hw_state.mg_pll_div0); in i915_shared_dplls_info()
8295 PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_div0); in intel_pipe_config_compare()