Searched refs:minimum_clocks (Results 1 – 6 of 6) sorted by relevance
3240 struct PP_Clocks minimum_clocks = {0}; in vega10_apply_state_adjust_rules() local3280 minimum_clocks.engineClock = hwmgr->display_config->min_core_set_clock; in vega10_apply_state_adjust_rules()3281 minimum_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock; in vega10_apply_state_adjust_rules()3311 minimum_clocks.engineClock = stable_pstate_sclk; in vega10_apply_state_adjust_rules()3312 minimum_clocks.memoryClock = stable_pstate_mclk; in vega10_apply_state_adjust_rules()3333 if (sclk < minimum_clocks.engineClock) in vega10_apply_state_adjust_rules()3334 sclk = (minimum_clocks.engineClock > max_limits->sclk) ? in vega10_apply_state_adjust_rules()3335 max_limits->sclk : minimum_clocks.engineClock; in vega10_apply_state_adjust_rules()3337 if (mclk < minimum_clocks.memoryClock) in vega10_apply_state_adjust_rules()3338 mclk = (minimum_clocks.memoryClock > max_limits->mclk) ? in vega10_apply_state_adjust_rules()[all …]
3265 struct PP_Clocks minimum_clocks = {0}; in smu7_apply_state_adjust_rules() local3301 minimum_clocks.engineClock = hwmgr->display_config->min_core_set_clock; in smu7_apply_state_adjust_rules()3302 minimum_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock; in smu7_apply_state_adjust_rules()3324 minimum_clocks.engineClock = stable_pstate_sclk; in smu7_apply_state_adjust_rules()3325 minimum_clocks.memoryClock = stable_pstate_mclk; in smu7_apply_state_adjust_rules()3356 if (sclk < minimum_clocks.engineClock) in smu7_apply_state_adjust_rules()3357 sclk = (minimum_clocks.engineClock > max_limits->sclk) ? in smu7_apply_state_adjust_rules()3358 max_limits->sclk : minimum_clocks.engineClock; in smu7_apply_state_adjust_rules()3360 if (mclk < minimum_clocks.memoryClock) in smu7_apply_state_adjust_rules()3361 mclk = (minimum_clocks.memoryClock > max_limits->mclk) ? in smu7_apply_state_adjust_rules()[all …]