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Searched refs:mmDCP1_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL (Results 1 – 15 of 15) sorted by relevance

/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h2594 #define mmDCP1_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL 0x1d9f macro
H A Ddce_11_0_d.h3134 #define mmDCP1_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL 0x1c9f macro
H A Ddce_10_0_d.h3373 #define mmDCP1_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL 0x1c9f macro
H A Ddce_11_2_d.h4365 #define mmDCP1_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL 0x1c9f macro
H A Ddce_12_0_offset.h4540 #define mmDCP1_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h2594 #define mmDCP1_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL 0x1d9f macro
H A Ddce_11_0_d.h3134 #define mmDCP1_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL 0x1c9f macro
H A Ddce_10_0_d.h3373 #define mmDCP1_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL 0x1c9f macro
H A Ddce_11_2_d.h4365 #define mmDCP1_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL 0x1c9f macro
H A Ddce_12_0_offset.h4540 #define mmDCP1_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h2594 #define mmDCP1_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL 0x1d9f macro
H A Ddce_10_0_d.h3373 #define mmDCP1_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL 0x1c9f macro
H A Ddce_11_0_d.h3134 #define mmDCP1_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL 0x1c9f macro
H A Ddce_11_2_d.h4365 #define mmDCP1_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL 0x1c9f macro
H A Ddce_12_0_offset.h4540 #define mmDCP1_GRPH_XDMA_CACHE_UNDERFLOW_DET_CNTL macro