| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| H A D | gfx_6_0_d.h | 656 #define mmGB_EDC_MODE 0x307E macro
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| H A D | gfx_7_2_d.h | 753 #define mmGB_EDC_MODE 0x307e macro
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| H A D | gfx_7_0_d.h | 740 #define mmGB_EDC_MODE 0x307e macro
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| H A D | gfx_8_1_d.h | 825 #define mmGB_EDC_MODE 0x307e macro
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| H A D | gfx_8_0_d.h | 825 #define mmGB_EDC_MODE 0x307e macro
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| H A D | gfx_6_0_d.h | 656 #define mmGB_EDC_MODE 0x307E macro
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| H A D | gfx_7_2_d.h | 753 #define mmGB_EDC_MODE 0x307e macro
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| H A D | gfx_7_0_d.h | 740 #define mmGB_EDC_MODE 0x307e macro
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| H A D | gfx_8_0_d.h | 825 #define mmGB_EDC_MODE 0x307e macro
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| H A D | gfx_8_1_d.h | 825 #define mmGB_EDC_MODE 0x307e macro
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| H A D | gfx_6_0_d.h | 656 #define mmGB_EDC_MODE 0x307E macro
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| H A D | gfx_7_0_d.h | 740 #define mmGB_EDC_MODE 0x307e macro
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| H A D | gfx_7_2_d.h | 753 #define mmGB_EDC_MODE 0x307e macro
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| H A D | gfx_8_0_d.h | 825 #define mmGB_EDC_MODE 0x307e macro
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| H A D | gfx_8_1_d.h | 825 #define mmGB_EDC_MODE 0x307e macro
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| /dports/sysutils/roct/ROCT-Thunk-Interface-9d1fb76/tests/kfdtest/include/asic_reg/ |
| H A D | gfx_7_2_d.h | 753 #define mmGB_EDC_MODE 0x307e macro
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v8_0.c | 1547 tmp = RREG32(mmGB_EDC_MODE); in gfx_v8_0_do_edc_gpr_workarounds()
1548 WREG32(mmGB_EDC_MODE, 0); in gfx_v8_0_do_edc_gpr_workarounds()
1675 WREG32(mmGB_EDC_MODE, tmp); in gfx_v8_0_do_edc_gpr_workarounds()
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v8_0.c | 1547 tmp = RREG32(mmGB_EDC_MODE); in gfx_v8_0_do_edc_gpr_workarounds()
1548 WREG32(mmGB_EDC_MODE, 0); in gfx_v8_0_do_edc_gpr_workarounds()
1675 WREG32(mmGB_EDC_MODE, tmp); in gfx_v8_0_do_edc_gpr_workarounds()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v8_0.c | 1547 tmp = RREG32(mmGB_EDC_MODE); in gfx_v8_0_do_edc_gpr_workarounds()
1548 WREG32(mmGB_EDC_MODE, 0); in gfx_v8_0_do_edc_gpr_workarounds()
1675 WREG32(mmGB_EDC_MODE, tmp); in gfx_v8_0_do_edc_gpr_workarounds()
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_0_offset.h | 2492 #define mmGB_EDC_MODE … macro
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| H A D | gc_9_1_offset.h | 2769 #define mmGB_EDC_MODE … macro
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_0_offset.h | 2492 #define mmGB_EDC_MODE … macro
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| H A D | gc_9_1_offset.h | 2769 #define mmGB_EDC_MODE … macro
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_0_offset.h | 2492 #define mmGB_EDC_MODE … macro
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| H A D | gc_9_1_offset.h | 2769 #define mmGB_EDC_MODE … macro
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