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Searched refs:mmHDMI_ACR_PACKET_CONTROL (Results 1 – 25 of 27) sorted by relevance

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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v6_0.c1417 tmp = RREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset); in dce_v6_0_audio_set_acr()
1421 WREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset, tmp); in dce_v6_0_audio_set_acr()
H A Ddce_v8_0.c1612 WREG32(mmHDMI_ACR_PACKET_CONTROL + offset, in dce_v8_0_afmt_setmode()
1615 WREG32(mmHDMI_ACR_PACKET_CONTROL + offset, in dce_v8_0_afmt_setmode()
H A Ddce_v10_0.c1672 tmp = RREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset); in dce_v10_0_afmt_setmode()
1681 WREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset, tmp); in dce_v10_0_afmt_setmode()
H A Ddce_v11_0.c1714 tmp = RREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset); in dce_v11_0_afmt_setmode()
1723 WREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset, tmp); in dce_v11_0_afmt_setmode()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v6_0.c1417 tmp = RREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset); in dce_v6_0_audio_set_acr()
1421 WREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset, tmp); in dce_v6_0_audio_set_acr()
H A Ddce_v8_0.c1612 WREG32(mmHDMI_ACR_PACKET_CONTROL + offset, in dce_v8_0_afmt_setmode()
1615 WREG32(mmHDMI_ACR_PACKET_CONTROL + offset, in dce_v8_0_afmt_setmode()
H A Ddce_v10_0.c1672 tmp = RREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset); in dce_v10_0_afmt_setmode()
1681 WREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset, tmp); in dce_v10_0_afmt_setmode()
H A Ddce_v11_0.c1714 tmp = RREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset); in dce_v11_0_afmt_setmode()
1723 WREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset, tmp); in dce_v11_0_afmt_setmode()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v6_0.c1417 tmp = RREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset); in dce_v6_0_audio_set_acr()
1421 WREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset, tmp); in dce_v6_0_audio_set_acr()
H A Ddce_v8_0.c1612 WREG32(mmHDMI_ACR_PACKET_CONTROL + offset, in dce_v8_0_afmt_setmode()
1615 WREG32(mmHDMI_ACR_PACKET_CONTROL + offset, in dce_v8_0_afmt_setmode()
H A Ddce_v10_0.c1672 tmp = RREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset); in dce_v10_0_afmt_setmode()
1681 WREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset, tmp); in dce_v10_0_afmt_setmode()
H A Ddce_v11_0.c1714 tmp = RREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset); in dce_v11_0_afmt_setmode()
1723 WREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset, tmp); in dce_v11_0_afmt_setmode()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3856 #define mmHDMI_ACR_PACKET_CONTROL 0x1C0F macro
H A Ddce_8_0_d.h2919 #define mmHDMI_ACR_PACKET_CONTROL 0x1c0f macro
H A Ddce_11_0_d.h3497 #define mmHDMI_ACR_PACKET_CONTROL 0x4a0c macro
H A Ddce_10_0_d.h3698 #define mmHDMI_ACR_PACKET_CONTROL 0x4a0c macro
H A Ddce_11_2_d.h4728 #define mmHDMI_ACR_PACKET_CONTROL 0x4a0c macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3856 #define mmHDMI_ACR_PACKET_CONTROL 0x1C0F macro
H A Ddce_8_0_d.h2919 #define mmHDMI_ACR_PACKET_CONTROL 0x1c0f macro
H A Ddce_10_0_d.h3698 #define mmHDMI_ACR_PACKET_CONTROL 0x4a0c macro
H A Ddce_11_0_d.h3497 #define mmHDMI_ACR_PACKET_CONTROL 0x4a0c macro
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3856 #define mmHDMI_ACR_PACKET_CONTROL 0x1C0F macro
H A Ddce_8_0_d.h2919 #define mmHDMI_ACR_PACKET_CONTROL 0x1c0f macro
H A Ddce_11_0_d.h3497 #define mmHDMI_ACR_PACKET_CONTROL 0x4a0c macro
H A Ddce_10_0_d.h3698 #define mmHDMI_ACR_PACKET_CONTROL 0x4a0c macro

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