| /dports/net-im/dendrite/dendrite-0.5.1/vendor/github.com/libp2p/go-mplex/ |
| H A D | multiplex.go | 342 for _, msch := range channels {
343 msch.cancelRead(ErrStreamReset)
392 msch, ok := mp.channels[ch]
406 msch = mp.newStream(ch, name)
408 mp.channels[ch] = msch
411 case mp.nstreams <- msch:
437 close(msch.dataIn)
455 case msch.dataIn <- b:
456 case <-msch.readCancel:
465 msch.Reset()
[all …]
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| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | sdram_rk3328.c | 30 struct msch_regs *msch; member
282 writel(ddrconfig, &dram->msch->ddrconf); in set_ddrconfig()
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
535 priv->msch = regmap_get_range(plat->map, 4); in rk3328_dmc_init()
[all …]
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| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | sdram_rk3328.c | 30 struct msch_regs *msch; member
282 writel(ddrconfig, &dram->msch->ddrconf); in set_ddrconfig()
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
535 priv->msch = regmap_get_range(plat->map, 4); in rk3328_dmc_init()
[all …]
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| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | sdram_rk3328.c | 30 struct msch_regs *msch; member
282 writel(ddrconfig, &dram->msch->ddrconf); in set_ddrconfig()
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
535 priv->msch = regmap_get_range(plat->map, 4); in rk3328_dmc_init()
[all …]
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| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | sdram_rk3328.c | 30 struct msch_regs *msch; member
282 writel(ddrconfig, &dram->msch->ddrconf); in set_ddrconfig()
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
535 priv->msch = regmap_get_range(plat->map, 4); in rk3328_dmc_init()
[all …]
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| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | sdram_rk3328.c | 30 struct msch_regs *msch; member
282 writel(ddrconfig, &dram->msch->ddrconf); in set_ddrconfig()
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
535 priv->msch = regmap_get_range(plat->map, 4); in rk3328_dmc_init()
[all …]
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| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | sdram_rk3328.c | 30 struct msch_regs *msch; member
282 writel(ddrconfig, &dram->msch->ddrconf); in set_ddrconfig()
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
535 priv->msch = regmap_get_range(plat->map, 4); in rk3328_dmc_init()
[all …]
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| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | sdram_rk3328.c | 30 struct msch_regs *msch; member
282 writel(ddrconfig, &dram->msch->ddrconf); in set_ddrconfig()
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
535 priv->msch = regmap_get_range(plat->map, 4); in rk3328_dmc_init()
[all …]
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| /dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | sdram_rk3328.c | 30 struct msch_regs *msch; member
282 writel(ddrconfig, &dram->msch->ddrconf); in set_ddrconfig()
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
535 priv->msch = regmap_get_range(plat->map, 4); in rk3328_dmc_init()
[all …]
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| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | sdram_rk3328.c | 30 struct msch_regs *msch; member
282 writel(ddrconfig, &dram->msch->ddrconf); in set_ddrconfig()
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
535 priv->msch = regmap_get_range(plat->map, 4); in rk3328_dmc_init()
[all …]
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| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | sdram_rk3328.c | 30 struct msch_regs *msch; member
282 writel(ddrconfig, &dram->msch->ddrconf); in set_ddrconfig()
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
535 priv->msch = regmap_get_range(plat->map, 4); in rk3328_dmc_init()
[all …]
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| /dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | sdram_rk3328.c | 30 struct msch_regs *msch; member
282 writel(ddrconfig, &dram->msch->ddrconf); in set_ddrconfig()
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
535 priv->msch = regmap_get_range(plat->map, 4); in rk3328_dmc_init()
[all …]
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| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | sdram_rk3328.c | 30 struct msch_regs *msch; member
282 writel(ddrconfig, &dram->msch->ddrconf); in set_ddrconfig()
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
535 priv->msch = regmap_get_range(plat->map, 4); in rk3328_dmc_init()
[all …]
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| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | sdram_rk3328.c | 30 struct msch_regs *msch; member
282 writel(ddrconfig, &dram->msch->ddrconf); in set_ddrconfig()
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
535 priv->msch = regmap_get_range(plat->map, 4); in rk3328_dmc_init()
[all …]
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| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | sdram_rk3328.c | 30 struct msch_regs *msch; member
282 writel(ddrconfig, &dram->msch->ddrconf); in set_ddrconfig()
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
535 priv->msch = regmap_get_range(plat->map, 4); in rk3328_dmc_init()
[all …]
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| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | sdram_rk3328.c | 30 struct msch_regs *msch; member
282 writel(ddrconfig, &dram->msch->ddrconf); in set_ddrconfig()
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
535 priv->msch = regmap_get_range(plat->map, 4); in rk3328_dmc_init()
[all …]
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| /dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | sdram_rk3328.c | 30 struct msch_regs *msch; member
282 writel(ddrconfig, &dram->msch->ddrconf); in set_ddrconfig()
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
535 priv->msch = regmap_get_range(plat->map, 4); in rk3328_dmc_init()
[all …]
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| /dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | sdram_rk3328.c | 30 struct msch_regs *msch; member
282 writel(ddrconfig, &dram->msch->ddrconf); in set_ddrconfig()
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
535 priv->msch = regmap_get_range(plat->map, 4); in rk3328_dmc_init()
[all …]
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| /dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | sdram_rk3328.c | 30 struct msch_regs *msch; member
282 writel(ddrconfig, &dram->msch->ddrconf); in set_ddrconfig()
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
535 priv->msch = regmap_get_range(plat->map, 4); in rk3328_dmc_init()
[all …]
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| /dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | sdram_rk3328.c | 30 struct msch_regs *msch; member
282 writel(ddrconfig, &dram->msch->ddrconf); in set_ddrconfig()
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
535 priv->msch = regmap_get_range(plat->map, 4); in rk3328_dmc_init()
[all …]
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| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | sdram_rk3328.c | 30 struct msch_regs *msch; member
282 writel(ddrconfig, &dram->msch->ddrconf); in set_ddrconfig()
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
535 priv->msch = regmap_get_range(plat->map, 4); in rk3328_dmc_init()
[all …]
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| /dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | sdram_rk3328.c | 30 struct msch_regs *msch; member
282 writel(ddrconfig, &dram->msch->ddrconf); in set_ddrconfig()
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
535 priv->msch = regmap_get_range(plat->map, 4); in rk3328_dmc_init()
[all …]
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| /dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | sdram_rk3328.c | 30 struct msch_regs *msch; member
282 writel(ddrconfig, &dram->msch->ddrconf); in set_ddrconfig()
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
535 priv->msch = regmap_get_range(plat->map, 4); in rk3328_dmc_init()
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| /dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | sdram_rk3328.c | 30 struct msch_regs *msch; member
282 writel(ddrconfig, &dram->msch->ddrconf); in set_ddrconfig()
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
535 priv->msch = regmap_get_range(plat->map, 4); in rk3328_dmc_init()
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| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | sdram_rk3328.c | 30 struct msch_regs *msch; member
282 writel(ddrconfig, &dram->msch->ddrconf); in set_ddrconfig()
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
535 priv->msch = regmap_get_range(plat->map, 4); in rk3328_dmc_init()
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