Home
last modified time | relevance | path

Searched refs:mt7620_clk_divider (Results 1 – 3 of 3) sorted by relevance

/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/mips/ralink/
H A Dmt7620.c405 static const u32 mt7620_clk_divider[] __initconst = { 2, 3, 4, 8 }; variable
430 WARN_ON(div >= ARRAY_SIZE(mt7620_clk_divider)); in mt7620_get_cpu_pll_rate()
432 return mt7620_calc_rate(xtal_rate, mul, mt7620_clk_divider[div]); in mt7620_get_cpu_pll_rate()
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/mips/ralink/
H A Dmt7620.c405 static const u32 mt7620_clk_divider[] __initconst = { 2, 3, 4, 8 }; variable
430 WARN_ON(div >= ARRAY_SIZE(mt7620_clk_divider)); in mt7620_get_cpu_pll_rate()
432 return mt7620_calc_rate(xtal_rate, mul, mt7620_clk_divider[div]); in mt7620_get_cpu_pll_rate()
/dports/multimedia/libv4l/linux-5.13-rc2/arch/mips/ralink/
H A Dmt7620.c405 static const u32 mt7620_clk_divider[] __initconst = { 2, 3, 4, 8 }; variable
430 WARN_ON(div >= ARRAY_SIZE(mt7620_clk_divider)); in mt7620_get_cpu_pll_rate()
432 return mt7620_calc_rate(xtal_rate, mul, mt7620_clk_divider[div]); in mt7620_get_cpu_pll_rate()