| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/rtc/ |
| H A D | rtc-mt7622.c | 118 static void mtk_rmw(struct mtk_rtc *rtc, u32 reg, u32 mask, u32 set) in mtk_rmw() function
130 mtk_rmw(rtc, reg, 0, val); in mtk_set()
135 mtk_rmw(rtc, reg, val, 0); in mtk_clr()
148 mtk_rmw(hw, MTK_RTC_DEBNCE, RTC_DEBNCE_MASK, 0); in mtk_rtc_hw_init()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/rtc/ |
| H A D | rtc-mt7622.c | 118 static void mtk_rmw(struct mtk_rtc *rtc, u32 reg, u32 mask, u32 set) in mtk_rmw() function
130 mtk_rmw(rtc, reg, 0, val); in mtk_set()
135 mtk_rmw(rtc, reg, val, 0); in mtk_clr()
148 mtk_rmw(hw, MTK_RTC_DEBNCE, RTC_DEBNCE_MASK, 0); in mtk_rtc_hw_init()
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/rtc/ |
| H A D | rtc-mt7622.c | 118 static void mtk_rmw(struct mtk_rtc *rtc, u32 reg, u32 mask, u32 set) in mtk_rmw() function
130 mtk_rmw(rtc, reg, 0, val); in mtk_set()
135 mtk_rmw(rtc, reg, val, 0); in mtk_clr()
148 mtk_rmw(hw, MTK_RTC_DEBNCE, RTC_DEBNCE_MASK, 0); in mtk_rtc_hw_init()
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| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mtk-common.c | 69 void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set) in mtk_rmw() function
150 mtk_rmw(dev, pf->offset, pf->mask << pf->bitpos, in mtk_hw_write_cross_field()
153 mtk_rmw(dev, pf->offset + pf->next, BIT(nbits_h) - 1, in mtk_hw_write_cross_field()
181 mtk_rmw(dev, pf.offset, pf.mask << pf.bitpos, in mtk_hw_set_value()
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| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mtk-common.c | 69 void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set) in mtk_rmw() function
150 mtk_rmw(dev, pf->offset, pf->mask << pf->bitpos, in mtk_hw_write_cross_field()
153 mtk_rmw(dev, pf->offset + pf->next, BIT(nbits_h) - 1, in mtk_hw_write_cross_field()
181 mtk_rmw(dev, pf.offset, pf.mask << pf.bitpos, in mtk_hw_set_value()
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mtk-common.c | 69 void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set) in mtk_rmw() function
150 mtk_rmw(dev, pf->offset, pf->mask << pf->bitpos, in mtk_hw_write_cross_field()
153 mtk_rmw(dev, pf->offset + pf->next, BIT(nbits_h) - 1, in mtk_hw_write_cross_field()
181 mtk_rmw(dev, pf.offset, pf.mask << pf.bitpos, in mtk_hw_set_value()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mtk-common.c | 69 void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set) in mtk_rmw() function
150 mtk_rmw(dev, pf->offset, pf->mask << pf->bitpos, in mtk_hw_write_cross_field()
153 mtk_rmw(dev, pf->offset + pf->next, BIT(nbits_h) - 1, in mtk_hw_write_cross_field()
181 mtk_rmw(dev, pf.offset, pf.mask << pf.bitpos, in mtk_hw_set_value()
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mtk-common.c | 69 void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set) in mtk_rmw() function
150 mtk_rmw(dev, pf->offset, pf->mask << pf->bitpos, in mtk_hw_write_cross_field()
153 mtk_rmw(dev, pf->offset + pf->next, BIT(nbits_h) - 1, in mtk_hw_write_cross_field()
181 mtk_rmw(dev, pf.offset, pf.mask << pf.bitpos, in mtk_hw_set_value()
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| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mtk-common.c | 72 void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set) in mtk_rmw() function
153 mtk_rmw(dev, pf->offset, pf->mask << pf->bitpos, in mtk_hw_write_cross_field()
156 mtk_rmw(dev, pf->offset + pf->next, BIT(nbits_h) - 1, in mtk_hw_write_cross_field()
184 mtk_rmw(dev, pf.offset, pf.mask << pf.bitpos, in mtk_hw_set_value()
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| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mtk-common.c | 72 void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set) in mtk_rmw() function
153 mtk_rmw(dev, pf->offset, pf->mask << pf->bitpos, in mtk_hw_write_cross_field()
156 mtk_rmw(dev, pf->offset + pf->next, BIT(nbits_h) - 1, in mtk_hw_write_cross_field()
184 mtk_rmw(dev, pf.offset, pf.mask << pf.bitpos, in mtk_hw_set_value()
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| /dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mtk-common.c | 72 void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set) in mtk_rmw() function
153 mtk_rmw(dev, pf->offset, pf->mask << pf->bitpos, in mtk_hw_write_cross_field()
156 mtk_rmw(dev, pf->offset + pf->next, BIT(nbits_h) - 1, in mtk_hw_write_cross_field()
184 mtk_rmw(dev, pf.offset, pf.mask << pf.bitpos, in mtk_hw_set_value()
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| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mtk-common.c | 72 void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set) in mtk_rmw() function
153 mtk_rmw(dev, pf->offset, pf->mask << pf->bitpos, in mtk_hw_write_cross_field()
156 mtk_rmw(dev, pf->offset + pf->next, BIT(nbits_h) - 1, in mtk_hw_write_cross_field()
184 mtk_rmw(dev, pf.offset, pf.mask << pf.bitpos, in mtk_hw_set_value()
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| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mtk-common.c | 72 void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set) in mtk_rmw() function
153 mtk_rmw(dev, pf->offset, pf->mask << pf->bitpos, in mtk_hw_write_cross_field()
156 mtk_rmw(dev, pf->offset + pf->next, BIT(nbits_h) - 1, in mtk_hw_write_cross_field()
184 mtk_rmw(dev, pf.offset, pf.mask << pf.bitpos, in mtk_hw_set_value()
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mtk-common.c | 72 void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set) in mtk_rmw() function
153 mtk_rmw(dev, pf->offset, pf->mask << pf->bitpos, in mtk_hw_write_cross_field()
156 mtk_rmw(dev, pf->offset + pf->next, BIT(nbits_h) - 1, in mtk_hw_write_cross_field()
184 mtk_rmw(dev, pf.offset, pf.mask << pf.bitpos, in mtk_hw_set_value()
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mtk-common.c | 72 void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set) in mtk_rmw() function
153 mtk_rmw(dev, pf->offset, pf->mask << pf->bitpos, in mtk_hw_write_cross_field()
156 mtk_rmw(dev, pf->offset + pf->next, BIT(nbits_h) - 1, in mtk_hw_write_cross_field()
184 mtk_rmw(dev, pf.offset, pf.mask << pf.bitpos, in mtk_hw_set_value()
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mtk-common.c | 72 void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set) in mtk_rmw() function
153 mtk_rmw(dev, pf->offset, pf->mask << pf->bitpos, in mtk_hw_write_cross_field()
156 mtk_rmw(dev, pf->offset + pf->next, BIT(nbits_h) - 1, in mtk_hw_write_cross_field()
184 mtk_rmw(dev, pf.offset, pf.mask << pf.bitpos, in mtk_hw_set_value()
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| /dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mtk-common.c | 72 void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set) in mtk_rmw() function
153 mtk_rmw(dev, pf->offset, pf->mask << pf->bitpos, in mtk_hw_write_cross_field()
156 mtk_rmw(dev, pf->offset + pf->next, BIT(nbits_h) - 1, in mtk_hw_write_cross_field()
184 mtk_rmw(dev, pf.offset, pf.mask << pf.bitpos, in mtk_hw_set_value()
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| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mtk-common.c | 72 void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set) in mtk_rmw() function
153 mtk_rmw(dev, pf->offset, pf->mask << pf->bitpos, in mtk_hw_write_cross_field()
156 mtk_rmw(dev, pf->offset + pf->next, BIT(nbits_h) - 1, in mtk_hw_write_cross_field()
184 mtk_rmw(dev, pf.offset, pf.mask << pf.bitpos, in mtk_hw_set_value()
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| /dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mtk-common.c | 72 void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set) in mtk_rmw() function
153 mtk_rmw(dev, pf->offset, pf->mask << pf->bitpos, in mtk_hw_write_cross_field()
156 mtk_rmw(dev, pf->offset + pf->next, BIT(nbits_h) - 1, in mtk_hw_write_cross_field()
184 mtk_rmw(dev, pf.offset, pf.mask << pf.bitpos, in mtk_hw_set_value()
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| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mtk-common.c | 72 void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set) in mtk_rmw() function
153 mtk_rmw(dev, pf->offset, pf->mask << pf->bitpos, in mtk_hw_write_cross_field()
156 mtk_rmw(dev, pf->offset + pf->next, BIT(nbits_h) - 1, in mtk_hw_write_cross_field()
184 mtk_rmw(dev, pf.offset, pf.mask << pf.bitpos, in mtk_hw_set_value()
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| /dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mtk-common.c | 72 void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set) in mtk_rmw() function
153 mtk_rmw(dev, pf->offset, pf->mask << pf->bitpos, in mtk_hw_write_cross_field()
156 mtk_rmw(dev, pf->offset + pf->next, BIT(nbits_h) - 1, in mtk_hw_write_cross_field()
184 mtk_rmw(dev, pf.offset, pf.mask << pf.bitpos, in mtk_hw_set_value()
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| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mtk-common.c | 72 void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set) in mtk_rmw() function
153 mtk_rmw(dev, pf->offset, pf->mask << pf->bitpos, in mtk_hw_write_cross_field()
156 mtk_rmw(dev, pf->offset + pf->next, BIT(nbits_h) - 1, in mtk_hw_write_cross_field()
184 mtk_rmw(dev, pf.offset, pf.mask << pf.bitpos, in mtk_hw_set_value()
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| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mtk-common.c | 72 void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set) in mtk_rmw() function
153 mtk_rmw(dev, pf->offset, pf->mask << pf->bitpos, in mtk_hw_write_cross_field()
156 mtk_rmw(dev, pf->offset + pf->next, BIT(nbits_h) - 1, in mtk_hw_write_cross_field()
184 mtk_rmw(dev, pf.offset, pf.mask << pf.bitpos, in mtk_hw_set_value()
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| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mtk-common.c | 72 void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set) in mtk_rmw() function
153 mtk_rmw(dev, pf->offset, pf->mask << pf->bitpos, in mtk_hw_write_cross_field()
156 mtk_rmw(dev, pf->offset + pf->next, BIT(nbits_h) - 1, in mtk_hw_write_cross_field()
184 mtk_rmw(dev, pf.offset, pf.mask << pf.bitpos, in mtk_hw_set_value()
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| /dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mtk-common.c | 72 void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set) in mtk_rmw() function
153 mtk_rmw(dev, pf->offset, pf->mask << pf->bitpos, in mtk_hw_write_cross_field()
156 mtk_rmw(dev, pf->offset + pf->next, BIT(nbits_h) - 1, in mtk_hw_write_cross_field()
184 mtk_rmw(dev, pf.offset, pf.mask << pf.bitpos, in mtk_hw_set_value()
|