| /dports/misc/rump/buildrump.sh-b914579/src/sys/external/bsd/drm2/linux/ |
| H A D | linux_writecomb.c | 81 struct mtrr *mtrr; in arch_phys_wc_add() local
86 mtrr = kmem_alloc(sizeof(*mtrr), KM_SLEEP); in arch_phys_wc_add()
87 mtrr->base = base; in arch_phys_wc_add()
88 mtrr->len = size; in arch_phys_wc_add()
111 mtrr->type = 0; in arch_phys_wc_add()
112 mtrr->flags = 0; in arch_phys_wc_add()
119 kmem_free(mtrr, sizeof(*mtrr)); in arch_phys_wc_add()
130 struct mtrr *mtrr; in arch_phys_wc_del() local
142 mtrr->type = 0; in arch_phys_wc_del()
143 mtrr->flags = 0; in arch_phys_wc_del()
[all …]
|
| /dports/misc/rump/buildrump.sh-b914579/src/sys/arch/i386/i386/ |
| H A D | mtrr_k6.c | 72 static struct mtrr *mtrr_var;
151 mtrr_var = (struct mtrr *) in k6_mtrr_init_first()
163 struct mtrr *mtrrp; in k6_raw2soft()
191 struct mtrr *mtrrp; in k6_soft2raw()
263 struct mtrr *freep; in k6_mtrr_setone()
321 struct mtrr mtrr; in k6_mtrr_set() local
332 error = copyin(&mtrrp[i], &mtrr, sizeof(mtrr)); in k6_mtrr_set()
336 mtrr = mtrrp[i]; in k6_mtrr_set()
337 error = k6_mtrr_validate(&mtrr, p); in k6_mtrr_set()
340 error = k6_mtrr_setone(&mtrr, p); in k6_mtrr_set()
[all …]
|
| /dports/misc/rump/buildrump.sh-b914579/src/sys/arch/x86/x86/ |
| H A D | genfb_machdep.c | 105 struct mtrr mtrr; in x86_genfb_mtrr_init() local
113 mtrr.base = physaddr; in x86_genfb_mtrr_init()
114 mtrr.len = size; in x86_genfb_mtrr_init()
115 mtrr.type = MTRR_TYPE_WC; in x86_genfb_mtrr_init()
116 mtrr.flags = MTRR_VALID; in x86_genfb_mtrr_init()
117 mtrr.owner = 0; in x86_genfb_mtrr_init()
120 mtrr.base, mtrr.base + mtrr.len - 1); in x86_genfb_mtrr_init()
124 error = mtrr_set(&mtrr, &n, curlwp->l_proc, MTRR_GETSET_KERNEL); in x86_genfb_mtrr_init()
|
| H A D | mtrr_i686.c | 124 static struct mtrr *mtrr_fixed;
125 static struct mtrr *mtrr_var;
356 struct mtrr *mtrrp; in i686_raw2soft()
422 struct mtrr *mtrrp; in i686_soft2raw()
551 struct mtrr *lowp, *highp, *mp, *freep; in i686_mtrr_setone()
696 struct mtrr mtrr; in i686_mtrr_set() local
706 error = copyin(&mtrrp[i], &mtrr, sizeof mtrr); in i686_mtrr_set()
710 mtrr = mtrrp[i]; in i686_mtrr_set()
711 error = i686_mtrr_validate(&mtrr, p); in i686_mtrr_set()
714 error = i686_mtrr_setone(&mtrr, p); in i686_mtrr_set()
[all …]
|
| /dports/multimedia/libv4l/linux-5.13-rc2/Documentation/x86/ |
| H A D | mtrr.rst | 72 % cat /proc/mtrr
86 % cat /proc/mtrr
123 % cat /proc/mtrr
140 % echo "disable=2" >! /proc/mtrr
144 % echo "disable=2" >| /proc/mtrr
151 /* mtrr-show.c
195 #include <asm/mtrr.h>
217 if ( ( fd = open ("/proc/mtrr", O_RDONLY, 0) ) == -1 )
250 /* mtrr-add.c
277 available mtrr is used. This is an alternative to writing /proc/mtrr.
[all …]
|
| /dports/multimedia/v4l-utils/linux-5.13-rc2/Documentation/x86/ |
| H A D | mtrr.rst | 72 % cat /proc/mtrr
86 % cat /proc/mtrr
123 % cat /proc/mtrr
140 % echo "disable=2" >! /proc/mtrr
144 % echo "disable=2" >| /proc/mtrr
151 /* mtrr-show.c
195 #include <asm/mtrr.h>
217 if ( ( fd = open ("/proc/mtrr", O_RDONLY, 0) ) == -1 )
250 /* mtrr-add.c
277 available mtrr is used. This is an alternative to writing /proc/mtrr.
[all …]
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/Documentation/x86/ |
| H A D | mtrr.rst | 72 % cat /proc/mtrr
86 % cat /proc/mtrr
123 % cat /proc/mtrr
140 % echo "disable=2" >! /proc/mtrr
144 % echo "disable=2" >| /proc/mtrr
151 /* mtrr-show.c
195 #include <asm/mtrr.h>
217 if ( ( fd = open ("/proc/mtrr", O_RDONLY, 0) ) == -1 )
250 /* mtrr-add.c
277 available mtrr is used. This is an alternative to writing /proc/mtrr.
[all …]
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/x86/cpu/ |
| H A D | mtrr.c | 75 info->mtrr[i].base = native_read_msr(MTRR_PHYS_BASE_MSR(i)); in mtrr_read_all()
76 info->mtrr[i].mask = native_read_msr(MTRR_PHYS_MASK_MSR(i)); in mtrr_read_all()
88 wrmsrl(MTRR_PHYS_BASE_MSR(i), info->mtrr[i].base); in mtrr_write_all()
89 wrmsrl(MTRR_PHYS_MASK_MSR(i), info->mtrr[i].mask); in mtrr_write_all()
228 int mtrr; in mtrr_set_next_var() local
230 mtrr = get_free_var_mtrr(); in mtrr_set_next_var()
231 if (mtrr < 0) in mtrr_set_next_var()
232 return mtrr; in mtrr_set_next_var()
234 set_var_mtrr(mtrr, type, start, size); in mtrr_set_next_var()
235 debug("MTRR %x: start=%x, size=%x\n", mtrr, (uint)start, (uint)size); in mtrr_set_next_var()
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/x86/cpu/ |
| H A D | mtrr.c | 75 info->mtrr[i].base = native_read_msr(MTRR_PHYS_BASE_MSR(i)); in mtrr_read_all()
76 info->mtrr[i].mask = native_read_msr(MTRR_PHYS_MASK_MSR(i)); in mtrr_read_all()
88 wrmsrl(MTRR_PHYS_BASE_MSR(i), info->mtrr[i].base); in mtrr_write_all()
89 wrmsrl(MTRR_PHYS_MASK_MSR(i), info->mtrr[i].mask); in mtrr_write_all()
228 int mtrr; in mtrr_set_next_var() local
230 mtrr = get_free_var_mtrr(); in mtrr_set_next_var()
231 if (mtrr < 0) in mtrr_set_next_var()
232 return mtrr; in mtrr_set_next_var()
234 set_var_mtrr(mtrr, type, start, size); in mtrr_set_next_var()
235 debug("MTRR %x: start=%x, size=%x\n", mtrr, (uint)start, (uint)size); in mtrr_set_next_var()
|
| /dports/sysutils/u-boot-beaglebone/u-boot-2021.07/arch/x86/cpu/ |
| H A D | mtrr.c | 75 info->mtrr[i].base = native_read_msr(MTRR_PHYS_BASE_MSR(i)); in mtrr_read_all()
76 info->mtrr[i].mask = native_read_msr(MTRR_PHYS_MASK_MSR(i)); in mtrr_read_all()
88 wrmsrl(MTRR_PHYS_BASE_MSR(i), info->mtrr[i].base); in mtrr_write_all()
89 wrmsrl(MTRR_PHYS_MASK_MSR(i), info->mtrr[i].mask); in mtrr_write_all()
228 int mtrr; in mtrr_set_next_var() local
230 mtrr = get_free_var_mtrr(); in mtrr_set_next_var()
231 if (mtrr < 0) in mtrr_set_next_var()
232 return mtrr; in mtrr_set_next_var()
234 set_var_mtrr(mtrr, type, start, size); in mtrr_set_next_var()
235 debug("MTRR %x: start=%x, size=%x\n", mtrr, (uint)start, (uint)size); in mtrr_set_next_var()
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/x86/cpu/ |
| H A D | mtrr.c | 75 info->mtrr[i].base = native_read_msr(MTRR_PHYS_BASE_MSR(i)); in mtrr_read_all()
76 info->mtrr[i].mask = native_read_msr(MTRR_PHYS_MASK_MSR(i)); in mtrr_read_all()
88 wrmsrl(MTRR_PHYS_BASE_MSR(i), info->mtrr[i].base); in mtrr_write_all()
89 wrmsrl(MTRR_PHYS_MASK_MSR(i), info->mtrr[i].mask); in mtrr_write_all()
228 int mtrr; in mtrr_set_next_var() local
230 mtrr = get_free_var_mtrr(); in mtrr_set_next_var()
231 if (mtrr < 0) in mtrr_set_next_var()
232 return mtrr; in mtrr_set_next_var()
234 set_var_mtrr(mtrr, type, start, size); in mtrr_set_next_var()
235 debug("MTRR %x: start=%x, size=%x\n", mtrr, (uint)start, (uint)size); in mtrr_set_next_var()
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/x86/cpu/ |
| H A D | mtrr.c | 75 info->mtrr[i].base = native_read_msr(MTRR_PHYS_BASE_MSR(i)); in mtrr_read_all()
76 info->mtrr[i].mask = native_read_msr(MTRR_PHYS_MASK_MSR(i)); in mtrr_read_all()
88 wrmsrl(MTRR_PHYS_BASE_MSR(i), info->mtrr[i].base); in mtrr_write_all()
89 wrmsrl(MTRR_PHYS_MASK_MSR(i), info->mtrr[i].mask); in mtrr_write_all()
228 int mtrr; in mtrr_set_next_var() local
230 mtrr = get_free_var_mtrr(); in mtrr_set_next_var()
231 if (mtrr < 0) in mtrr_set_next_var()
232 return mtrr; in mtrr_set_next_var()
234 set_var_mtrr(mtrr, type, start, size); in mtrr_set_next_var()
235 debug("MTRR %x: start=%x, size=%x\n", mtrr, (uint)start, (uint)size); in mtrr_set_next_var()
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/x86/cpu/ |
| H A D | mtrr.c | 75 info->mtrr[i].base = native_read_msr(MTRR_PHYS_BASE_MSR(i)); in mtrr_read_all()
76 info->mtrr[i].mask = native_read_msr(MTRR_PHYS_MASK_MSR(i)); in mtrr_read_all()
88 wrmsrl(MTRR_PHYS_BASE_MSR(i), info->mtrr[i].base); in mtrr_write_all()
89 wrmsrl(MTRR_PHYS_MASK_MSR(i), info->mtrr[i].mask); in mtrr_write_all()
228 int mtrr; in mtrr_set_next_var() local
230 mtrr = get_free_var_mtrr(); in mtrr_set_next_var()
231 if (mtrr < 0) in mtrr_set_next_var()
232 return mtrr; in mtrr_set_next_var()
234 set_var_mtrr(mtrr, type, start, size); in mtrr_set_next_var()
235 debug("MTRR %x: start=%x, size=%x\n", mtrr, (uint)start, (uint)size); in mtrr_set_next_var()
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/x86/cpu/ |
| H A D | mtrr.c | 75 info->mtrr[i].base = native_read_msr(MTRR_PHYS_BASE_MSR(i)); in mtrr_read_all()
76 info->mtrr[i].mask = native_read_msr(MTRR_PHYS_MASK_MSR(i)); in mtrr_read_all()
88 wrmsrl(MTRR_PHYS_BASE_MSR(i), info->mtrr[i].base); in mtrr_write_all()
89 wrmsrl(MTRR_PHYS_MASK_MSR(i), info->mtrr[i].mask); in mtrr_write_all()
228 int mtrr; in mtrr_set_next_var() local
230 mtrr = get_free_var_mtrr(); in mtrr_set_next_var()
231 if (mtrr < 0) in mtrr_set_next_var()
232 return mtrr; in mtrr_set_next_var()
234 set_var_mtrr(mtrr, type, start, size); in mtrr_set_next_var()
235 debug("MTRR %x: start=%x, size=%x\n", mtrr, (uint)start, (uint)size); in mtrr_set_next_var()
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/x86/cpu/ |
| H A D | mtrr.c | 75 info->mtrr[i].base = native_read_msr(MTRR_PHYS_BASE_MSR(i)); in mtrr_read_all()
76 info->mtrr[i].mask = native_read_msr(MTRR_PHYS_MASK_MSR(i)); in mtrr_read_all()
88 wrmsrl(MTRR_PHYS_BASE_MSR(i), info->mtrr[i].base); in mtrr_write_all()
89 wrmsrl(MTRR_PHYS_MASK_MSR(i), info->mtrr[i].mask); in mtrr_write_all()
228 int mtrr; in mtrr_set_next_var() local
230 mtrr = get_free_var_mtrr(); in mtrr_set_next_var()
231 if (mtrr < 0) in mtrr_set_next_var()
232 return mtrr; in mtrr_set_next_var()
234 set_var_mtrr(mtrr, type, start, size); in mtrr_set_next_var()
235 debug("MTRR %x: start=%x, size=%x\n", mtrr, (uint)start, (uint)size); in mtrr_set_next_var()
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/x86/cpu/ |
| H A D | mtrr.c | 75 info->mtrr[i].base = native_read_msr(MTRR_PHYS_BASE_MSR(i)); in mtrr_read_all()
76 info->mtrr[i].mask = native_read_msr(MTRR_PHYS_MASK_MSR(i)); in mtrr_read_all()
88 wrmsrl(MTRR_PHYS_BASE_MSR(i), info->mtrr[i].base); in mtrr_write_all()
89 wrmsrl(MTRR_PHYS_MASK_MSR(i), info->mtrr[i].mask); in mtrr_write_all()
228 int mtrr; in mtrr_set_next_var() local
230 mtrr = get_free_var_mtrr(); in mtrr_set_next_var()
231 if (mtrr < 0) in mtrr_set_next_var()
232 return mtrr; in mtrr_set_next_var()
234 set_var_mtrr(mtrr, type, start, size); in mtrr_set_next_var()
235 debug("MTRR %x: start=%x, size=%x\n", mtrr, (uint)start, (uint)size); in mtrr_set_next_var()
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/x86/cpu/ |
| H A D | mtrr.c | 75 info->mtrr[i].base = native_read_msr(MTRR_PHYS_BASE_MSR(i)); in mtrr_read_all()
76 info->mtrr[i].mask = native_read_msr(MTRR_PHYS_MASK_MSR(i)); in mtrr_read_all()
88 wrmsrl(MTRR_PHYS_BASE_MSR(i), info->mtrr[i].base); in mtrr_write_all()
89 wrmsrl(MTRR_PHYS_MASK_MSR(i), info->mtrr[i].mask); in mtrr_write_all()
228 int mtrr; in mtrr_set_next_var() local
230 mtrr = get_free_var_mtrr(); in mtrr_set_next_var()
231 if (mtrr < 0) in mtrr_set_next_var()
232 return mtrr; in mtrr_set_next_var()
234 set_var_mtrr(mtrr, type, start, size); in mtrr_set_next_var()
235 debug("MTRR %x: start=%x, size=%x\n", mtrr, (uint)start, (uint)size); in mtrr_set_next_var()
|
| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/arch/x86/cpu/ |
| H A D | mtrr.c | 75 info->mtrr[i].base = native_read_msr(MTRR_PHYS_BASE_MSR(i)); in mtrr_read_all()
76 info->mtrr[i].mask = native_read_msr(MTRR_PHYS_MASK_MSR(i)); in mtrr_read_all()
88 wrmsrl(MTRR_PHYS_BASE_MSR(i), info->mtrr[i].base); in mtrr_write_all()
89 wrmsrl(MTRR_PHYS_MASK_MSR(i), info->mtrr[i].mask); in mtrr_write_all()
228 int mtrr; in mtrr_set_next_var() local
230 mtrr = get_free_var_mtrr(); in mtrr_set_next_var()
231 if (mtrr < 0) in mtrr_set_next_var()
232 return mtrr; in mtrr_set_next_var()
234 set_var_mtrr(mtrr, type, start, size); in mtrr_set_next_var()
235 debug("MTRR %x: start=%x, size=%x\n", mtrr, (uint)start, (uint)size); in mtrr_set_next_var()
|
| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/x86/cpu/ |
| H A D | mtrr.c | 75 info->mtrr[i].base = native_read_msr(MTRR_PHYS_BASE_MSR(i)); in mtrr_read_all()
76 info->mtrr[i].mask = native_read_msr(MTRR_PHYS_MASK_MSR(i)); in mtrr_read_all()
88 wrmsrl(MTRR_PHYS_BASE_MSR(i), info->mtrr[i].base); in mtrr_write_all()
89 wrmsrl(MTRR_PHYS_MASK_MSR(i), info->mtrr[i].mask); in mtrr_write_all()
228 int mtrr; in mtrr_set_next_var() local
230 mtrr = get_free_var_mtrr(); in mtrr_set_next_var()
231 if (mtrr < 0) in mtrr_set_next_var()
232 return mtrr; in mtrr_set_next_var()
234 set_var_mtrr(mtrr, type, start, size); in mtrr_set_next_var()
235 debug("MTRR %x: start=%x, size=%x\n", mtrr, (uint)start, (uint)size); in mtrr_set_next_var()
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/x86/cpu/ |
| H A D | mtrr.c | 75 info->mtrr[i].base = native_read_msr(MTRR_PHYS_BASE_MSR(i)); in mtrr_read_all()
76 info->mtrr[i].mask = native_read_msr(MTRR_PHYS_MASK_MSR(i)); in mtrr_read_all()
88 wrmsrl(MTRR_PHYS_BASE_MSR(i), info->mtrr[i].base); in mtrr_write_all()
89 wrmsrl(MTRR_PHYS_MASK_MSR(i), info->mtrr[i].mask); in mtrr_write_all()
228 int mtrr; in mtrr_set_next_var() local
230 mtrr = get_free_var_mtrr(); in mtrr_set_next_var()
231 if (mtrr < 0) in mtrr_set_next_var()
232 return mtrr; in mtrr_set_next_var()
234 set_var_mtrr(mtrr, type, start, size); in mtrr_set_next_var()
235 debug("MTRR %x: start=%x, size=%x\n", mtrr, (uint)start, (uint)size); in mtrr_set_next_var()
|
| /dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/x86/cpu/ |
| H A D | mtrr.c | 75 info->mtrr[i].base = native_read_msr(MTRR_PHYS_BASE_MSR(i)); in mtrr_read_all()
76 info->mtrr[i].mask = native_read_msr(MTRR_PHYS_MASK_MSR(i)); in mtrr_read_all()
88 wrmsrl(MTRR_PHYS_BASE_MSR(i), info->mtrr[i].base); in mtrr_write_all()
89 wrmsrl(MTRR_PHYS_MASK_MSR(i), info->mtrr[i].mask); in mtrr_write_all()
228 int mtrr; in mtrr_set_next_var() local
230 mtrr = get_free_var_mtrr(); in mtrr_set_next_var()
231 if (mtrr < 0) in mtrr_set_next_var()
232 return mtrr; in mtrr_set_next_var()
234 set_var_mtrr(mtrr, type, start, size); in mtrr_set_next_var()
235 debug("MTRR %x: start=%x, size=%x\n", mtrr, (uint)start, (uint)size); in mtrr_set_next_var()
|
| /dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/x86/cpu/ |
| H A D | mtrr.c | 75 info->mtrr[i].base = native_read_msr(MTRR_PHYS_BASE_MSR(i)); in mtrr_read_all()
76 info->mtrr[i].mask = native_read_msr(MTRR_PHYS_MASK_MSR(i)); in mtrr_read_all()
88 wrmsrl(MTRR_PHYS_BASE_MSR(i), info->mtrr[i].base); in mtrr_write_all()
89 wrmsrl(MTRR_PHYS_MASK_MSR(i), info->mtrr[i].mask); in mtrr_write_all()
228 int mtrr; in mtrr_set_next_var() local
230 mtrr = get_free_var_mtrr(); in mtrr_set_next_var()
231 if (mtrr < 0) in mtrr_set_next_var()
232 return mtrr; in mtrr_set_next_var()
234 set_var_mtrr(mtrr, type, start, size); in mtrr_set_next_var()
235 debug("MTRR %x: start=%x, size=%x\n", mtrr, (uint)start, (uint)size); in mtrr_set_next_var()
|
| /dports/sysutils/u-boot-chip/u-boot-2021.07/arch/x86/cpu/ |
| H A D | mtrr.c | 75 info->mtrr[i].base = native_read_msr(MTRR_PHYS_BASE_MSR(i)); in mtrr_read_all()
76 info->mtrr[i].mask = native_read_msr(MTRR_PHYS_MASK_MSR(i)); in mtrr_read_all()
88 wrmsrl(MTRR_PHYS_BASE_MSR(i), info->mtrr[i].base); in mtrr_write_all()
89 wrmsrl(MTRR_PHYS_MASK_MSR(i), info->mtrr[i].mask); in mtrr_write_all()
228 int mtrr; in mtrr_set_next_var() local
230 mtrr = get_free_var_mtrr(); in mtrr_set_next_var()
231 if (mtrr < 0) in mtrr_set_next_var()
232 return mtrr; in mtrr_set_next_var()
234 set_var_mtrr(mtrr, type, start, size); in mtrr_set_next_var()
235 debug("MTRR %x: start=%x, size=%x\n", mtrr, (uint)start, (uint)size); in mtrr_set_next_var()
|
| /dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/x86/cpu/ |
| H A D | mtrr.c | 75 info->mtrr[i].base = native_read_msr(MTRR_PHYS_BASE_MSR(i)); in mtrr_read_all()
76 info->mtrr[i].mask = native_read_msr(MTRR_PHYS_MASK_MSR(i)); in mtrr_read_all()
88 wrmsrl(MTRR_PHYS_BASE_MSR(i), info->mtrr[i].base); in mtrr_write_all()
89 wrmsrl(MTRR_PHYS_MASK_MSR(i), info->mtrr[i].mask); in mtrr_write_all()
228 int mtrr; in mtrr_set_next_var() local
230 mtrr = get_free_var_mtrr(); in mtrr_set_next_var()
231 if (mtrr < 0) in mtrr_set_next_var()
232 return mtrr; in mtrr_set_next_var()
234 set_var_mtrr(mtrr, type, start, size); in mtrr_set_next_var()
235 debug("MTRR %x: start=%x, size=%x\n", mtrr, (uint)start, (uint)size); in mtrr_set_next_var()
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| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/x86/cpu/ |
| H A D | mtrr.c | 75 info->mtrr[i].base = native_read_msr(MTRR_PHYS_BASE_MSR(i)); in mtrr_read_all()
76 info->mtrr[i].mask = native_read_msr(MTRR_PHYS_MASK_MSR(i)); in mtrr_read_all()
88 wrmsrl(MTRR_PHYS_BASE_MSR(i), info->mtrr[i].base); in mtrr_write_all()
89 wrmsrl(MTRR_PHYS_MASK_MSR(i), info->mtrr[i].mask); in mtrr_write_all()
228 int mtrr; in mtrr_set_next_var() local
230 mtrr = get_free_var_mtrr(); in mtrr_set_next_var()
231 if (mtrr < 0) in mtrr_set_next_var()
232 return mtrr; in mtrr_set_next_var()
234 set_var_mtrr(mtrr, type, start, size); in mtrr_set_next_var()
235 debug("MTRR %x: start=%x, size=%x\n", mtrr, (uint)start, (uint)size); in mtrr_set_next_var()
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