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/dports/graphics/osg34/OpenSceneGraph-OpenSceneGraph-3.4.1/src/osgPlugins/gles/
H A DTriangleStripVisitor.cpp45 if (ndw->getNumIndices() != 0 && ndw->back() != de->getElement(0)) { in mergeTrianglesStrip()
47 ndw->addElement(ndw->back()); in mergeTrianglesStrip()
49 ndw->addElement(de->getElement(0)); in mergeTrianglesStrip()
52 if (ndw->getNumIndices() % 2 != 0 ) { in mergeTrianglesStrip()
54 ndw->addElement(de->getElement(0)); in mergeTrianglesStrip()
58 ndw->addElement(de->getElement(j)); in mergeTrianglesStrip()
65 if (ndw->getNumIndices() != 0 && ndw->back() != da->getFirst()) { in mergeTrianglesStrip()
67 ndw->addElement(ndw->back()); in mergeTrianglesStrip()
69 ndw->addElement(da->getFirst()); in mergeTrianglesStrip()
72 if (ndw->getNumIndices() % 2 != 0 ) { in mergeTrianglesStrip()
[all …]
/dports/textproc/libxslt/libxslt-1.1.34/tests/docbook/test/
H A DLostLog1 2000-08-08 Norman Walsh <ndw@nwalsh.com>
7 2000-06-29 Norman Walsh <ndw@nwalsh.com>
11 2000-06-26 Norman Walsh <ndw@nwalsh.com>
15 2000-04-19 Norman Walsh <ndw@nwalsh.com>
21 2000-04-06 Norman Walsh <ndw@nwalsh.com>
25 2000-04-03 Norman Walsh <ndw@nwalsh.com>
33 2000-03-23 Norman Walsh <ndw@nwalsh.com>
38 2000-02-16 Norman Walsh <ndw@nwalsh.com>
42 2000-02-07 Norman Walsh <ndw@nwalsh.com>
46 2000-01-27 Norman Walsh <ndw@nwalsh.com>
[all …]
H A DChangeLog1 2001-01-30 Norman Walsh <ndw@nwalsh.com>
5 2001-01-28 Norman Walsh <ndw@nwalsh.com>
11 2001-01-12 Norman Walsh <ndw@nwalsh.com>
21 2001-01-07 Norman Walsh <ndw@nwalsh.com>
25 2000-12-14 Norman Walsh <ndw@nwalsh.com>
30 2000-11-29 Norman Walsh <ndw@nwalsh.com>
38 2000-11-15 Norman Walsh <ndw@nwalsh.com>
46 2000-11-09 Norman Walsh <ndw@nwalsh.com>
54 2000-10-29 Norman Walsh <ndw@nwalsh.com>
58 2000-10-26 Norman Walsh <ndw@nwalsh.com>
[all …]
/dports/textproc/libxslt/libxslt-1.1.34/tests/docbook/common/
H A DLostLog1 2000-08-29 Norman Walsh <ndw@nwalsh.com>
5 2000-08-08 Norman Walsh <ndw@nwalsh.com>
13 2000-07-21 Norman Walsh <ndw@nwalsh.com>
22 2000-06-25 Norman Walsh <ndw@nwalsh.com>
26 2000-04-19 Norman Walsh <ndw@nwalsh.com>
32 2000-04-06 Norman Walsh <ndw@nwalsh.com>
36 2000-04-03 Norman Walsh <ndw@nwalsh.com>
40 2000-03-23 Norman Walsh <ndw@nwalsh.com>
46 2000-02-18 Norman Walsh <ndw@nwalsh.com>
51 2000-02-16 Norman Walsh <ndw@nwalsh.com>
[all …]
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_vm_sdma.c73 p->num_dw_left = ndw; in amdgpu_vm_sdma_prepare()
206 unsigned int i, ndw, nptes; in amdgpu_vm_sdma_update() local
216 ndw = p->num_dw_left; in amdgpu_vm_sdma_update()
219 if (ndw < 32) { in amdgpu_vm_sdma_update()
225 ndw = 32; in amdgpu_vm_sdma_update()
227 ndw += count * 2; in amdgpu_vm_sdma_update()
228 ndw = max(ndw, AMDGPU_VM_SDMA_MIN_NUM_DW); in amdgpu_vm_sdma_update()
229 ndw = min(ndw, AMDGPU_VM_SDMA_MAX_NUM_DW); in amdgpu_vm_sdma_update()
236 p->num_dw_left = ndw; in amdgpu_vm_sdma_update()
254 ndw -= 7; in amdgpu_vm_sdma_update()
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_vm_sdma.c73 p->num_dw_left = ndw; in amdgpu_vm_sdma_prepare()
206 unsigned int i, ndw, nptes; in amdgpu_vm_sdma_update() local
216 ndw = p->num_dw_left; in amdgpu_vm_sdma_update()
219 if (ndw < 32) { in amdgpu_vm_sdma_update()
225 ndw = 32; in amdgpu_vm_sdma_update()
227 ndw += count * 2; in amdgpu_vm_sdma_update()
228 ndw = max(ndw, AMDGPU_VM_SDMA_MIN_NUM_DW); in amdgpu_vm_sdma_update()
229 ndw = min(ndw, AMDGPU_VM_SDMA_MAX_NUM_DW); in amdgpu_vm_sdma_update()
236 p->num_dw_left = ndw; in amdgpu_vm_sdma_update()
254 ndw -= 7; in amdgpu_vm_sdma_update()
[all …]
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_vm_sdma.c73 p->num_dw_left = ndw; in amdgpu_vm_sdma_prepare()
206 unsigned int i, ndw, nptes; in amdgpu_vm_sdma_update() local
216 ndw = p->num_dw_left; in amdgpu_vm_sdma_update()
219 if (ndw < 32) { in amdgpu_vm_sdma_update()
225 ndw = 32; in amdgpu_vm_sdma_update()
227 ndw += count * 2; in amdgpu_vm_sdma_update()
228 ndw = max(ndw, AMDGPU_VM_SDMA_MIN_NUM_DW); in amdgpu_vm_sdma_update()
229 ndw = min(ndw, AMDGPU_VM_SDMA_MAX_NUM_DW); in amdgpu_vm_sdma_update()
236 p->num_dw_left = ndw; in amdgpu_vm_sdma_update()
254 ndw -= 7; in amdgpu_vm_sdma_update()
[all …]
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/radeon/
H A Dni_dma.c319 unsigned ndw; in cayman_dma_vm_copy_pages() local
322 ndw = count * 2; in cayman_dma_vm_copy_pages()
324 ndw = 0xFFFFE; in cayman_dma_vm_copy_pages()
333 pe += ndw * 4; in cayman_dma_vm_copy_pages()
334 src += ndw * 4; in cayman_dma_vm_copy_pages()
359 unsigned ndw; in cayman_dma_vm_write_pages() local
364 ndw = 0xFFFFE; in cayman_dma_vm_write_pages()
371 for (; ndw > 0; ndw -= 2, --count, pe += 8) { in cayman_dma_vm_write_pages()
407 unsigned ndw; in cayman_dma_vm_set_pages() local
412 ndw = 0xFFFFE; in cayman_dma_vm_set_pages()
[all …]
H A Dsi_dma.c111 unsigned ndw; in si_dma_vm_write_pages() local
114 ndw = count * 2; in si_dma_vm_write_pages()
115 if (ndw > 0xFFFFE) in si_dma_vm_write_pages()
116 ndw = 0xFFFFE; in si_dma_vm_write_pages()
122 for (; ndw > 0; ndw -= 2, --count, pe += 8) { in si_dma_vm_write_pages()
158 unsigned ndw; in si_dma_vm_set_pages() local
161 ndw = count * 2; in si_dma_vm_set_pages()
162 if (ndw > 0xFFFFE) in si_dma_vm_set_pages()
163 ndw = 0xFFFFE; in si_dma_vm_set_pages()
180 pe += ndw * 4; in si_dma_vm_set_pages()
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/radeon/
H A Dni_dma.c319 unsigned ndw; in cayman_dma_vm_copy_pages() local
322 ndw = count * 2; in cayman_dma_vm_copy_pages()
324 ndw = 0xFFFFE; in cayman_dma_vm_copy_pages()
333 pe += ndw * 4; in cayman_dma_vm_copy_pages()
334 src += ndw * 4; in cayman_dma_vm_copy_pages()
359 unsigned ndw; in cayman_dma_vm_write_pages() local
364 ndw = 0xFFFFE; in cayman_dma_vm_write_pages()
371 for (; ndw > 0; ndw -= 2, --count, pe += 8) { in cayman_dma_vm_write_pages()
407 unsigned ndw; in cayman_dma_vm_set_pages() local
412 ndw = 0xFFFFE; in cayman_dma_vm_set_pages()
[all …]
H A Dsi_dma.c111 unsigned ndw; in si_dma_vm_write_pages() local
114 ndw = count * 2; in si_dma_vm_write_pages()
115 if (ndw > 0xFFFFE) in si_dma_vm_write_pages()
116 ndw = 0xFFFFE; in si_dma_vm_write_pages()
122 for (; ndw > 0; ndw -= 2, --count, pe += 8) { in si_dma_vm_write_pages()
158 unsigned ndw; in si_dma_vm_set_pages() local
161 ndw = count * 2; in si_dma_vm_set_pages()
162 if (ndw > 0xFFFFE) in si_dma_vm_set_pages()
163 ndw = 0xFFFFE; in si_dma_vm_set_pages()
180 pe += ndw * 4; in si_dma_vm_set_pages()
[all …]
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/radeon/
H A Dni_dma.c319 unsigned ndw; in cayman_dma_vm_copy_pages() local
322 ndw = count * 2; in cayman_dma_vm_copy_pages()
324 ndw = 0xFFFFE; in cayman_dma_vm_copy_pages()
333 pe += ndw * 4; in cayman_dma_vm_copy_pages()
334 src += ndw * 4; in cayman_dma_vm_copy_pages()
359 unsigned ndw; in cayman_dma_vm_write_pages() local
364 ndw = 0xFFFFE; in cayman_dma_vm_write_pages()
371 for (; ndw > 0; ndw -= 2, --count, pe += 8) { in cayman_dma_vm_write_pages()
407 unsigned ndw; in cayman_dma_vm_set_pages() local
412 ndw = 0xFFFFE; in cayman_dma_vm_set_pages()
[all …]
H A Dsi_dma.c111 unsigned ndw; in si_dma_vm_write_pages() local
114 ndw = count * 2; in si_dma_vm_write_pages()
115 if (ndw > 0xFFFFE) in si_dma_vm_write_pages()
116 ndw = 0xFFFFE; in si_dma_vm_write_pages()
122 for (; ndw > 0; ndw -= 2, --count, pe += 8) { in si_dma_vm_write_pages()
158 unsigned ndw; in si_dma_vm_set_pages() local
161 ndw = count * 2; in si_dma_vm_set_pages()
162 if (ndw > 0xFFFFE) in si_dma_vm_set_pages()
163 ndw = 0xFFFFE; in si_dma_vm_set_pages()
180 pe += ndw * 4; in si_dma_vm_set_pages()
[all …]
/dports/misc/rump/buildrump.sh-b914579/src/sys/external/bsd/drm2/dist/drm/radeon/
H A Dsi_dma.c78 unsigned ndw; in si_dma_vm_set_page() local
84 ndw = count * 2; in si_dma_vm_set_page()
85 if (ndw > 0xFFFFE) in si_dma_vm_set_page()
86 ndw = 0xFFFFE; in si_dma_vm_set_page()
92 for (; ndw > 0; ndw -= 2, --count, pe += 8) { in si_dma_vm_set_page()
103 ndw = count * 2; in si_dma_vm_set_page()
104 if (ndw > 0xFFFFE) in si_dma_vm_set_page()
105 ndw = 0xFFFFE; in si_dma_vm_set_page()
121 pe += ndw * 4; in si_dma_vm_set_page()
122 addr += (ndw / 2) * incr; in si_dma_vm_set_page()
[all …]
/dports/games/xmris/xmris.4.04/
H A DDrag.c319 DragWidget ndw; variable
322 GetPixmapSize(ndw);
323 if(!ndw->core.width)
324 ndw->core.width = ndw->drag.width ? ndw->drag.width : 16;
326 ndw->core.height = ndw->drag.height ? ndw->drag.height : 16;
327 GetGC(ndw);
408 DragWidget ndw; variable
419 ndw->core.width = ndw->drag.width;
420 ndw->drag.x = 0;
424 ndw->core.height = ndw->drag.height;
[all …]
/dports/lang/clover/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_pm4.c32 assert(state->ndw < SI_PM4_MAX_DW); in si_pm4_cmd_begin()
34 state->last_pm4 = state->ndw++; in si_pm4_cmd_begin()
39 assert(state->ndw < SI_PM4_MAX_DW); in si_pm4_cmd_add()
40 state->pm4[state->ndw++] = dw; in si_pm4_cmd_add()
47 count = state->ndw - state->last_pm4 - 2; in si_pm4_cmd_end()
80 assert(state->ndw + 2 <= SI_PM4_MAX_DW); in si_pm4_set_reg()
84 state->pm4[state->ndw++] = reg; in si_pm4_set_reg()
88 state->pm4[state->ndw++] = val; in si_pm4_set_reg()
94 state->ndw = 0; in si_pm4_clear_state()
126 radeon_emit_array(state->pm4, state->ndw); in si_pm4_emit()
/dports/graphics/libosmesa/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_pm4.c32 assert(state->ndw < SI_PM4_MAX_DW); in si_pm4_cmd_begin()
34 state->last_pm4 = state->ndw++; in si_pm4_cmd_begin()
39 assert(state->ndw < SI_PM4_MAX_DW); in si_pm4_cmd_add()
40 state->pm4[state->ndw++] = dw; in si_pm4_cmd_add()
47 count = state->ndw - state->last_pm4 - 2; in si_pm4_cmd_end()
80 assert(state->ndw + 2 <= SI_PM4_MAX_DW); in si_pm4_set_reg()
84 state->pm4[state->ndw++] = reg; in si_pm4_set_reg()
88 state->pm4[state->ndw++] = val; in si_pm4_set_reg()
94 state->ndw = 0; in si_pm4_clear_state()
126 radeon_emit_array(state->pm4, state->ndw); in si_pm4_emit()
/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_pm4.c32 assert(state->ndw < SI_PM4_MAX_DW); in si_pm4_cmd_begin()
34 state->last_pm4 = state->ndw++; in si_pm4_cmd_begin()
39 assert(state->ndw < SI_PM4_MAX_DW); in si_pm4_cmd_add()
40 state->pm4[state->ndw++] = dw; in si_pm4_cmd_add()
47 count = state->ndw - state->last_pm4 - 2; in si_pm4_cmd_end()
80 assert(state->ndw + 2 <= SI_PM4_MAX_DW); in si_pm4_set_reg()
84 state->pm4[state->ndw++] = reg; in si_pm4_set_reg()
88 state->pm4[state->ndw++] = val; in si_pm4_set_reg()
94 state->ndw = 0; in si_pm4_clear_state()
126 radeon_emit_array(state->pm4, state->ndw); in si_pm4_emit()
/dports/graphics/mesa-libs/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_pm4.c32 assert(state->ndw < SI_PM4_MAX_DW); in si_pm4_cmd_begin()
34 state->last_pm4 = state->ndw++; in si_pm4_cmd_begin()
39 assert(state->ndw < SI_PM4_MAX_DW); in si_pm4_cmd_add()
40 state->pm4[state->ndw++] = dw; in si_pm4_cmd_add()
47 count = state->ndw - state->last_pm4 - 2; in si_pm4_cmd_end()
80 assert(state->ndw + 2 <= SI_PM4_MAX_DW); in si_pm4_set_reg()
84 state->pm4[state->ndw++] = reg; in si_pm4_set_reg()
88 state->pm4[state->ndw++] = val; in si_pm4_set_reg()
94 state->ndw = 0; in si_pm4_clear_state()
126 radeon_emit_array(state->pm4, state->ndw); in si_pm4_emit()
/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_pm4.c32 assert(state->ndw < SI_PM4_MAX_DW); in si_pm4_cmd_begin()
34 state->last_pm4 = state->ndw++; in si_pm4_cmd_begin()
39 assert(state->ndw < SI_PM4_MAX_DW); in si_pm4_cmd_add()
40 state->pm4[state->ndw++] = dw; in si_pm4_cmd_add()
47 count = state->ndw - state->last_pm4 - 2; in si_pm4_cmd_end()
80 assert(state->ndw + 2 <= SI_PM4_MAX_DW); in si_pm4_set_reg()
84 state->pm4[state->ndw++] = reg; in si_pm4_set_reg()
88 state->pm4[state->ndw++] = val; in si_pm4_set_reg()
94 state->ndw = 0; in si_pm4_clear_state()
126 radeon_emit_array(state->pm4, state->ndw); in si_pm4_emit()
/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_pm4.c32 assert(state->ndw < SI_PM4_MAX_DW); in si_pm4_cmd_begin()
34 state->last_pm4 = state->ndw++; in si_pm4_cmd_begin()
39 assert(state->ndw < SI_PM4_MAX_DW); in si_pm4_cmd_add()
40 state->pm4[state->ndw++] = dw; in si_pm4_cmd_add()
47 count = state->ndw - state->last_pm4 - 2; in si_pm4_cmd_end()
80 assert(state->ndw + 2 <= SI_PM4_MAX_DW); in si_pm4_set_reg()
84 state->pm4[state->ndw++] = reg; in si_pm4_set_reg()
88 state->pm4[state->ndw++] = val; in si_pm4_set_reg()
94 state->ndw = 0; in si_pm4_clear_state()
126 radeon_emit_array(state->pm4, state->ndw); in si_pm4_emit()
/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_pm4.c32 assert(state->ndw < SI_PM4_MAX_DW); in si_pm4_cmd_begin()
34 state->last_pm4 = state->ndw++; in si_pm4_cmd_begin()
39 assert(state->ndw < SI_PM4_MAX_DW); in si_pm4_cmd_add()
40 state->pm4[state->ndw++] = dw; in si_pm4_cmd_add()
47 count = state->ndw - state->last_pm4 - 2; in si_pm4_cmd_end()
80 assert(state->ndw + 2 <= SI_PM4_MAX_DW); in si_pm4_set_reg()
84 state->pm4[state->ndw++] = reg; in si_pm4_set_reg()
88 state->pm4[state->ndw++] = val; in si_pm4_set_reg()
94 state->ndw = 0; in si_pm4_clear_state()
126 radeon_emit_array(state->pm4, state->ndw); in si_pm4_emit()
/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_pm4.c32 assert(state->ndw < SI_PM4_MAX_DW); in si_pm4_cmd_begin()
34 state->last_pm4 = state->ndw++; in si_pm4_cmd_begin()
39 assert(state->ndw < SI_PM4_MAX_DW); in si_pm4_cmd_add()
40 state->pm4[state->ndw++] = dw; in si_pm4_cmd_add()
47 count = state->ndw - state->last_pm4 - 2; in si_pm4_cmd_end()
80 assert(state->ndw + 2 <= SI_PM4_MAX_DW); in si_pm4_set_reg()
84 state->pm4[state->ndw++] = reg; in si_pm4_set_reg()
88 state->pm4[state->ndw++] = val; in si_pm4_set_reg()
94 state->ndw = 0; in si_pm4_clear_state()
126 radeon_emit_array(state->pm4, state->ndw); in si_pm4_emit()
/dports/graphics/mesa-dri/mesa-21.3.6/src/gallium/drivers/radeonsi/
H A Dsi_pm4.c32 assert(state->ndw < SI_PM4_MAX_DW); in si_pm4_cmd_begin()
34 state->last_pm4 = state->ndw++; in si_pm4_cmd_begin()
39 assert(state->ndw < SI_PM4_MAX_DW); in si_pm4_cmd_add()
40 state->pm4[state->ndw++] = dw; in si_pm4_cmd_add()
47 count = state->ndw - state->last_pm4 - 2; in si_pm4_cmd_end()
80 assert(state->ndw + 2 <= SI_PM4_MAX_DW); in si_pm4_set_reg()
84 state->pm4[state->ndw++] = reg; in si_pm4_set_reg()
88 state->pm4[state->ndw++] = val; in si_pm4_set_reg()
94 state->ndw = 0; in si_pm4_clear_state()
126 radeon_emit_array(state->pm4, state->ndw); in si_pm4_emit()
/dports/science/cp2k/cp2k-2e995eec7fd208c8a72d9544807bd8b8ba8cd1cc/src/metadyn_tools/
H A Dgraph.F66 ndw = 1
216 ndw = ndim
239 ndw = 0
244 ndw = ndw + 1
253 DO id = 1, ndw
304 DO id = 1, ndw
327 DO id = 1, ndw
335 DO id = 1, ndw
414 DO id = 1, ndw
417 ix = ndw
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