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Searched refs:neg_op0 (Results 1 – 25 of 81) sorted by relevance

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/dports/lang/gcc6-aux/gcc-6-20180516/gcc/config/microblaze/
H A Dmicroblaze.md1938 rtx neg_op0;
1943 neg_op0 = gen_reg_rtx (Pmode);
1944 emit_insn (gen_negsi2 (neg_op0, operands[1]));
1946 neg_op0 = GEN_INT (- INTVAL (operands[1]));
1948 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
/dports/lang/gnat_util/gcc-6-20180516/gcc/config/microblaze/
H A Dmicroblaze.md1938 rtx neg_op0;
1943 neg_op0 = gen_reg_rtx (Pmode);
1944 emit_insn (gen_negsi2 (neg_op0, operands[1]));
1946 neg_op0 = GEN_INT (- INTVAL (operands[1]));
1948 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
/dports/lang/gcc48/gcc-4.8.5/gcc/config/microblaze/
H A Dmicroblaze.md1876 rtx neg_op0;
1881 neg_op0 = gen_reg_rtx (Pmode);
1882 emit_insn (gen_negsi2 (neg_op0, operands[1]));
1884 neg_op0 = GEN_INT (- INTVAL (operands[1]));
1886 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
/dports/devel/mingw32-gcc/gcc-4.8.1/gcc/config/microblaze/
H A Dmicroblaze.md1856 rtx neg_op0;
1861 neg_op0 = gen_reg_rtx (Pmode);
1862 emit_insn (gen_negsi2 (neg_op0, operands[1]));
1864 neg_op0 = GEN_INT (- INTVAL (operands[1]));
1866 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
/dports/devel/arm-none-eabi-gcc492/gcc-4.9.2/gcc/config/microblaze/
H A Dmicroblaze.md1887 rtx neg_op0;
1892 neg_op0 = gen_reg_rtx (Pmode);
1893 emit_insn (gen_negsi2 (neg_op0, operands[1]));
1895 neg_op0 = GEN_INT (- INTVAL (operands[1]));
1897 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
/dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/config/microblaze/
H A Dmicroblaze.md1938 rtx neg_op0;
1943 neg_op0 = gen_reg_rtx (Pmode);
1944 emit_insn (gen_negsi2 (neg_op0, operands[1]));
1946 neg_op0 = GEN_INT (- INTVAL (operands[1]));
1948 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
/dports/lang/gcc9/gcc-9.4.0/gcc/config/microblaze/
H A Dmicroblaze.md1940 rtx neg_op0;
1945 neg_op0 = gen_reg_rtx (Pmode);
1946 emit_insn (gen_negsi2 (neg_op0, operands[1]));
1948 neg_op0 = GEN_INT (- INTVAL (operands[1]));
1950 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
/dports/devel/avr-gcc/gcc-10.2.0/gcc/config/microblaze/
H A Dmicroblaze.md1940 rtx neg_op0;
1945 neg_op0 = gen_reg_rtx (Pmode);
1946 emit_insn (gen_negsi2 (neg_op0, operands[1]));
1948 neg_op0 = GEN_INT (- INTVAL (operands[1]));
1950 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
/dports/lang/gcc11-devel/gcc-11-20211009/gcc/config/microblaze/
H A Dmicroblaze.md1940 rtx neg_op0;
1945 neg_op0 = gen_reg_rtx (Pmode);
1946 emit_insn (gen_negsi2 (neg_op0, operands[1]));
1948 neg_op0 = GEN_INT (- INTVAL (operands[1]));
1950 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
/dports/lang/gcc10-devel/gcc-10-20211008/gcc/config/microblaze/
H A Dmicroblaze.md1940 rtx neg_op0;
1945 neg_op0 = gen_reg_rtx (Pmode);
1946 emit_insn (gen_negsi2 (neg_op0, operands[1]));
1948 neg_op0 = GEN_INT (- INTVAL (operands[1]));
1950 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
/dports/lang/gcc12-devel/gcc-12-20211205/gcc/config/microblaze/
H A Dmicroblaze.md1940 rtx neg_op0;
1945 neg_op0 = gen_reg_rtx (Pmode);
1946 emit_insn (gen_negsi2 (neg_op0, operands[1]));
1948 neg_op0 = GEN_INT (- INTVAL (operands[1]));
1950 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
/dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/config/microblaze/
H A Dmicroblaze.md1938 rtx neg_op0;
1943 neg_op0 = gen_reg_rtx (Pmode);
1944 emit_insn (gen_negsi2 (neg_op0, operands[1]));
1946 neg_op0 = GEN_INT (- INTVAL (operands[1]));
1948 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
/dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/config/microblaze/
H A Dmicroblaze.md1938 rtx neg_op0;
1943 neg_op0 = gen_reg_rtx (Pmode);
1944 emit_insn (gen_negsi2 (neg_op0, operands[1]));
1946 neg_op0 = GEN_INT (- INTVAL (operands[1]));
1948 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
/dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/gcc/config/microblaze/
H A Dmicroblaze.md1938 rtx neg_op0;
1943 neg_op0 = gen_reg_rtx (Pmode);
1944 emit_insn (gen_negsi2 (neg_op0, operands[1]));
1946 neg_op0 = GEN_INT (- INTVAL (operands[1]));
1948 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
/dports/devel/riscv64-gcc/gcc-8.3.0/gcc/config/microblaze/
H A Dmicroblaze.md1938 rtx neg_op0;
1943 neg_op0 = gen_reg_rtx (Pmode);
1944 emit_insn (gen_negsi2 (neg_op0, operands[1]));
1946 neg_op0 = GEN_INT (- INTVAL (operands[1]));
1948 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
/dports/misc/cxx_atomics_pic/gcc-11.2.0/gcc/config/microblaze/
H A Dmicroblaze.md1940 rtx neg_op0;
1945 neg_op0 = gen_reg_rtx (Pmode);
1946 emit_insn (gen_negsi2 (neg_op0, operands[1]));
1948 neg_op0 = GEN_INT (- INTVAL (operands[1]));
1950 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
/dports/lang/gcc9-aux/gcc-9.1.0/gcc/config/microblaze/
H A Dmicroblaze.md1940 rtx neg_op0;
1945 neg_op0 = gen_reg_rtx (Pmode);
1946 emit_insn (gen_negsi2 (neg_op0, operands[1]));
1948 neg_op0 = GEN_INT (- INTVAL (operands[1]));
1950 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
/dports/lang/gcc10/gcc-10.3.0/gcc/config/microblaze/
H A Dmicroblaze.md1940 rtx neg_op0;
1945 neg_op0 = gen_reg_rtx (Pmode);
1946 emit_insn (gen_negsi2 (neg_op0, operands[1]));
1948 neg_op0 = GEN_INT (- INTVAL (operands[1]));
1950 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
/dports/lang/gcc9-devel/gcc-9-20211007/gcc/config/microblaze/
H A Dmicroblaze.md1940 rtx neg_op0;
1945 neg_op0 = gen_reg_rtx (Pmode);
1946 emit_insn (gen_negsi2 (neg_op0, operands[1]));
1948 neg_op0 = GEN_INT (- INTVAL (operands[1]));
1950 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
/dports/lang/gcc8/gcc-8.5.0/gcc/config/microblaze/
H A Dmicroblaze.md1938 rtx neg_op0;
1943 neg_op0 = gen_reg_rtx (Pmode);
1944 emit_insn (gen_negsi2 (neg_op0, operands[1]));
1946 neg_op0 = GEN_INT (- INTVAL (operands[1]));
1948 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
/dports/lang/gcc11/gcc-11.2.0/gcc/config/microblaze/
H A Dmicroblaze.md1940 rtx neg_op0;
1945 neg_op0 = gen_reg_rtx (Pmode);
1946 emit_insn (gen_negsi2 (neg_op0, operands[1]));
1948 neg_op0 = GEN_INT (- INTVAL (operands[1]));
1950 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
/dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/config/xtensa/
H A Dxtensa.md1693 rtx neg_op0 = GEN_INT (-INTVAL (operands[1]));
1694 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
/dports/lang/gcc9/gcc-9.4.0/gcc/config/xtensa/
H A Dxtensa.md1693 rtx neg_op0 = GEN_INT (-INTVAL (operands[1]));
1694 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
/dports/devel/avr-gcc/gcc-10.2.0/gcc/config/xtensa/
H A Dxtensa.md1693 rtx neg_op0 = GEN_INT (-INTVAL (operands[1]));
1694 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));
/dports/devel/riscv64-gcc/gcc-8.3.0/gcc/config/xtensa/
H A Dxtensa.md1693 rtx neg_op0 = GEN_INT (-INTVAL (operands[1]));
1694 emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0));

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