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Searched refs:noc_timings (Results 1 – 25 of 367) sorted by relevance

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/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/ram/rockchip/
H A Dsdram_rk3328.c286 struct sdram_msch_timings *noc_timings) in sdram_msch_config() argument
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
293 writel(noc_timings->activate.d32, &msch->activate); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
491 sdram_ch.noc_timings.ddrtiming.b.bwratio = 0; in sdram_init_detect()
[all …]
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/ram/rockchip/
H A Dsdram_rk3328.c286 struct sdram_msch_timings *noc_timings) in sdram_msch_config() argument
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
293 writel(noc_timings->activate.d32, &msch->activate); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
491 sdram_ch.noc_timings.ddrtiming.b.bwratio = 0; in sdram_init_detect()
[all …]
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/ram/rockchip/
H A Dsdram_rk3328.c286 struct sdram_msch_timings *noc_timings) in sdram_msch_config() argument
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
293 writel(noc_timings->activate.d32, &msch->activate); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
491 sdram_ch.noc_timings.ddrtiming.b.bwratio = 0; in sdram_init_detect()
[all …]
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/ram/rockchip/
H A Dsdram_rk3328.c286 struct sdram_msch_timings *noc_timings) in sdram_msch_config() argument
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
293 writel(noc_timings->activate.d32, &msch->activate); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
491 sdram_ch.noc_timings.ddrtiming.b.bwratio = 0; in sdram_init_detect()
[all …]
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/ram/rockchip/
H A Dsdram_rk3328.c286 struct sdram_msch_timings *noc_timings) in sdram_msch_config() argument
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
293 writel(noc_timings->activate.d32, &msch->activate); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
491 sdram_ch.noc_timings.ddrtiming.b.bwratio = 0; in sdram_init_detect()
[all …]
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/ram/rockchip/
H A Dsdram_rk3328.c286 struct sdram_msch_timings *noc_timings) in sdram_msch_config() argument
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
293 writel(noc_timings->activate.d32, &msch->activate); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
491 sdram_ch.noc_timings.ddrtiming.b.bwratio = 0; in sdram_init_detect()
[all …]
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/ram/rockchip/
H A Dsdram_rk3328.c286 struct sdram_msch_timings *noc_timings) in sdram_msch_config() argument
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
293 writel(noc_timings->activate.d32, &msch->activate); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
491 sdram_ch.noc_timings.ddrtiming.b.bwratio = 0; in sdram_init_detect()
[all …]
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/ram/rockchip/
H A Dsdram_rk3328.c286 struct sdram_msch_timings *noc_timings) in sdram_msch_config() argument
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
293 writel(noc_timings->activate.d32, &msch->activate); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
491 sdram_ch.noc_timings.ddrtiming.b.bwratio = 0; in sdram_init_detect()
[all …]
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/ram/rockchip/
H A Dsdram_rk3328.c286 struct sdram_msch_timings *noc_timings) in sdram_msch_config() argument
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
293 writel(noc_timings->activate.d32, &msch->activate); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
491 sdram_ch.noc_timings.ddrtiming.b.bwratio = 0; in sdram_init_detect()
[all …]
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/ram/rockchip/
H A Dsdram_rk3328.c286 struct sdram_msch_timings *noc_timings) in sdram_msch_config() argument
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
293 writel(noc_timings->activate.d32, &msch->activate); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
491 sdram_ch.noc_timings.ddrtiming.b.bwratio = 0; in sdram_init_detect()
[all …]
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/ram/rockchip/
H A Dsdram_rk3328.c286 struct sdram_msch_timings *noc_timings) in sdram_msch_config() argument
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
293 writel(noc_timings->activate.d32, &msch->activate); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
491 sdram_ch.noc_timings.ddrtiming.b.bwratio = 0; in sdram_init_detect()
[all …]
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/ram/rockchip/
H A Dsdram_rk3328.c286 struct sdram_msch_timings *noc_timings) in sdram_msch_config() argument
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
293 writel(noc_timings->activate.d32, &msch->activate); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
491 sdram_ch.noc_timings.ddrtiming.b.bwratio = 0; in sdram_init_detect()
[all …]
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/ram/rockchip/
H A Dsdram_rk3328.c286 struct sdram_msch_timings *noc_timings) in sdram_msch_config() argument
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
293 writel(noc_timings->activate.d32, &msch->activate); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
491 sdram_ch.noc_timings.ddrtiming.b.bwratio = 0; in sdram_init_detect()
[all …]
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/ram/rockchip/
H A Dsdram_rk3328.c286 struct sdram_msch_timings *noc_timings) in sdram_msch_config() argument
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
293 writel(noc_timings->activate.d32, &msch->activate); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
491 sdram_ch.noc_timings.ddrtiming.b.bwratio = 0; in sdram_init_detect()
[all …]
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/ram/rockchip/
H A Dsdram_rk3328.c286 struct sdram_msch_timings *noc_timings) in sdram_msch_config() argument
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
293 writel(noc_timings->activate.d32, &msch->activate); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
491 sdram_ch.noc_timings.ddrtiming.b.bwratio = 0; in sdram_init_detect()
[all …]
/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/drivers/ram/rockchip/
H A Dsdram_rk3328.c286 struct sdram_msch_timings *noc_timings) in sdram_msch_config() argument
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
293 writel(noc_timings->activate.d32, &msch->activate); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
491 sdram_ch.noc_timings.ddrtiming.b.bwratio = 0; in sdram_init_detect()
[all …]
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/drivers/ram/rockchip/
H A Dsdram_rk3328.c286 struct sdram_msch_timings *noc_timings) in sdram_msch_config() argument
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
293 writel(noc_timings->activate.d32, &msch->activate); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
491 sdram_ch.noc_timings.ddrtiming.b.bwratio = 0; in sdram_init_detect()
[all …]
/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/ram/rockchip/
H A Dsdram_rk3328.c286 struct sdram_msch_timings *noc_timings) in sdram_msch_config() argument
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
293 writel(noc_timings->activate.d32, &msch->activate); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
491 sdram_ch.noc_timings.ddrtiming.b.bwratio = 0; in sdram_init_detect()
[all …]
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/ram/rockchip/
H A Dsdram_rk3328.c286 struct sdram_msch_timings *noc_timings) in sdram_msch_config() argument
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
293 writel(noc_timings->activate.d32, &msch->activate); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
491 sdram_ch.noc_timings.ddrtiming.b.bwratio = 0; in sdram_init_detect()
[all …]
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/ram/rockchip/
H A Dsdram_rk3328.c286 struct sdram_msch_timings *noc_timings) in sdram_msch_config() argument
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
293 writel(noc_timings->activate.d32, &msch->activate); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
491 sdram_ch.noc_timings.ddrtiming.b.bwratio = 0; in sdram_init_detect()
[all …]
/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/drivers/ram/rockchip/
H A Dsdram_rk3328.c286 struct sdram_msch_timings *noc_timings) in sdram_msch_config() argument
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
293 writel(noc_timings->activate.d32, &msch->activate); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
491 sdram_ch.noc_timings.ddrtiming.b.bwratio = 0; in sdram_init_detect()
[all …]
/dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/drivers/ram/rockchip/
H A Dsdram_rk3328.c286 struct sdram_msch_timings *noc_timings) in sdram_msch_config() argument
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
293 writel(noc_timings->activate.d32, &msch->activate); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
491 sdram_ch.noc_timings.ddrtiming.b.bwratio = 0; in sdram_init_detect()
[all …]
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/drivers/ram/rockchip/
H A Dsdram_rk3328.c286 struct sdram_msch_timings *noc_timings) in sdram_msch_config() argument
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
293 writel(noc_timings->activate.d32, &msch->activate); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
491 sdram_ch.noc_timings.ddrtiming.b.bwratio = 0; in sdram_init_detect()
[all …]
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/drivers/ram/rockchip/
H A Dsdram_rk3328.c286 struct sdram_msch_timings *noc_timings) in sdram_msch_config() argument
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
293 writel(noc_timings->activate.d32, &msch->activate); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
491 sdram_ch.noc_timings.ddrtiming.b.bwratio = 0; in sdram_init_detect()
[all …]
/dports/sysutils/u-boot-pine-h64/u-boot-2021.07/drivers/ram/rockchip/
H A Dsdram_rk3328.c286 struct sdram_msch_timings *noc_timings) in sdram_msch_config() argument
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
293 writel(noc_timings->activate.d32, &msch->activate); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
491 sdram_ch.noc_timings.ddrtiming.b.bwratio = 0; in sdram_init_detect()
[all …]

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