1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
14 * of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Wei Lin<wei.w.lin@intel.com>
26 * Yuting Yang<yuting.yang@intel.com>
27 */
28 #ifndef __CM_HAL_H__
29 #define __CM_HAL_H__
30
31 #include "gen_hw.h"
32 #include "hw_interface.h"
33 #include "cm_common.h"
34 #include "cm_debug.h"
35
36 #define CM_MAX_GSH_KERNEL_ENTRIES 64
37 #define CM_32K (32*1024)
38 #define CM_FIXED_GSH_SPACE (CM_MAX_GSH_KERNEL_ENTRIES * CM_32K)
39
40 #ifndef HAL_CM_UNSETBIT
41 #define HAL_CM_UNSETBIT(value, bitPos) \
42 { \
43 value = (value & ~(1 << bitPos)); \
44 }
45 #endif
46
47 #ifndef HAL_CM_SETBIT
48 #define HAL_CM_SETBIT(value, bitPos) \
49 { \
50 value = (value | (1 << bitPos)); \
51 }
52 #endif
53
54 #ifndef HAL_CM_CHECKBIT_IS_SET
55 #define HAL_CM_CHECKBIT_IS_SET(bitIsSet, value, bitPos) \
56 { \
57 bitIsSet = ((value) & (1 << bitPos)); \
58 }
59 #endif
60
61 typedef struct _CM_HAL_BUFFER_PARAM {
62 UINT iSize;
63 CM_BUFFER_TYPE type;
64 PVOID pData;
65 DWORD dwHandle;
66 UINT iLockFlag;
67 CmOsResource *pCmOsResource;
68 UINT isAllocatedbyCmrtUmd;
69 } CM_HAL_BUFFER_PARAM, *PCM_HAL_BUFFER_PARAM;
70
71 typedef struct _CM_HAL_SURFACE2D_UP_PARAM {
72 UINT iWidth;
73 UINT iHeight;
74 GENOS_FORMAT format;
75 PVOID pData;
76 UINT iPitch;
77 UINT iPhysicalSize;
78 DWORD dwHandle;
79 } CM_HAL_SURFACE2D_UP_PARAM, *PCM_HAL_SURFACE2D_UP_PARAM;
80
81 typedef struct _CM_HAL_SURFACE2D_INFO_PARAM {
82 UINT iWidth;
83 UINT iHeight;
84 GENOS_FORMAT format;
85 UINT iPitch;
86 UINT SurfaceAllocationIndex;
87 } CM_HAL_SURFACE2D_INFO_PARAM, *PCM_HAL_SURFACE2D_INFO_PARAM;
88
89 typedef struct _CM_HAL_SURFACE2D_SURFACE_STATE_DIMENSIONS_PARAM {
90 UINT iWidth;
91 UINT iHeight;
92 DWORD dwHandle;
93 } CM_HAL_SURFACE2D_SURFACE_STATE_DIMENSIONS_PARAM,
94 *PCM_HAL_SURFACE2D_SURFACE_STATE_DIMENSIONS_PARAM;
95
96 typedef struct _CM_HAL_SURFACE2D_LOCK_UNLOCK_PARAM {
97 UINT iWidth;
98 UINT iHeight;
99 GENOS_FORMAT format;
100 PVOID pData;
101 UINT iPitch;
102 UINT iLockFlag;
103 DWORD dwHandle;
104 } CM_HAL_SURFACE2D_LOCK_UNLOCK_PARAM, *PCM_HAL_SURFACE2D_LOCK_UNLOCK_PARAM;
105
106 typedef struct _CM_HAL_SURFACE2D_PARAM {
107 UINT isAllocatedbyCmrtUmd;
108 CmOsResource *pCmOsResource;
109 UINT iWidth;
110 UINT iHeight;
111 GENOS_FORMAT format;
112 PVOID pData;
113 UINT iPitch;
114 DWORD dwHandle;
115 } CM_HAL_SURFACE2D_PARAM, *PCM_HAL_SURFACE2D_PARAM;
116
117 typedef struct _CM_HAL_KERNEL_SETUP {
118 GENHW_KERNEL_PARAM Param;
119 Kdll_CacheEntry CacheEntry;
120 } CM_HAL_KERNEL_SETUP, *PCM_HAL_KERNEL_SETUP;
121
122 typedef struct _CM_HAL_MISC_STATE_MSG {
123 union {
124 struct {
125 DWORD Row0:16;
126 DWORD Reserved:8;
127 DWORD Width:4;
128 DWORD Height:4;
129 };
130 struct {
131 DWORD value;
132 };
133 } DW0;
134
135 union {
136 struct {
137 DWORD Row1:16;
138 DWORD Row2:16;
139 };
140 struct {
141 DWORD value;
142 };
143 } DW1;
144
145 union {
146 struct {
147 DWORD Row3:16;
148 DWORD Row4:16;
149 };
150 struct {
151 DWORD value;
152 };
153 } DW2;
154
155 union {
156 struct {
157 DWORD Row5:16;
158 DWORD Row6:16;
159 };
160 struct {
161 DWORD value;
162 };
163 } DW3;
164
165 union {
166 struct {
167 DWORD Row7:16;
168 DWORD Row8:16;
169 };
170 struct {
171 DWORD value;
172 };
173 } DW4;
174
175 union {
176 struct {
177 DWORD Row9:16;
178 DWORD Row10:16;
179 };
180 struct {
181 DWORD value;
182 };
183 } DW5;
184
185 union {
186 struct {
187 DWORD Row11:16;
188 DWORD Row12:16;
189 };
190 struct {
191 DWORD value;
192 };
193 } DW6;
194
195 union {
196 struct {
197 DWORD Row13:16;
198 DWORD Row14:16;
199 };
200 struct {
201 DWORD value;
202 };
203 } DW7;
204 } CM_HAL_MISC_STATE_MSG;
205
206 typedef struct _CM_HAL_BUFFER_ENTRY {
207 GENOS_RESOURCE OsResource;
208 UINT iSize;
209 PVOID pAddress;
210 PVOID pGmmResourceInfo;
211 BOOL isAllocatedbyCmrtUmd;
212 } CM_HAL_BUFFER_ENTRY, *PCM_HAL_BUFFER_ENTRY;
213
214 typedef struct _CM_HAL_SURFACE2D_UP_ENTRY {
215 GENOS_RESOURCE OsResource;
216 UINT iWidth;
217 UINT iHeight;
218 GENOS_FORMAT format;
219 PVOID pGmmResourceInfo;
220 } CM_HAL_SURFACE2D_UP_ENTRY, *PCM_HAL_SURFACE2D_UP_ENTRY;
221
222 typedef struct _CM_HAL_SURFACE2D_ENTRY {
223 GENOS_RESOURCE OsResource;
224 UINT iWidth;
225 UINT iHeight;
226 GENOS_FORMAT format;
227 PVOID pGmmResourceInfo;
228 UINT isAllocatedbyCmrtUmd;
229 UINT iSurfaceStateWidth;
230 UINT iSurfaceStateHeight;
231 BOOL bReadSync;
232 } CM_HAL_SURFACE2D_ENTRY, *PCM_HAL_SURFACE2D_ENTRY;
233
234 typedef struct _CM_HAL_3DRESOURCE_ENTRY {
235 GENOS_RESOURCE OsResource;
236 UINT iWidth;
237 UINT iHeight;
238 UINT iDepth;
239 GENOS_FORMAT format;
240 } CM_HAL_3DRESOURCE_ENTRY, *PCM_HAL_3DRESOURCE_ENTRY;
241
242 typedef struct _CM_HAL_TS_RESOURCE {
243 GENOS_RESOURCE OsResource;
244 BOOL bLocked;
245 PBYTE pData;
246 } CM_HAL_TS_RESOURCE, *PCM_HAL_TS_RESOURCE;
247
248 typedef union _CM_HAL_MULTI_USE_BTI_ENTRY {
249 struct {
250 DWORD RegularSurfIndex:8;
251 };
252 struct {
253 DWORD Value;
254 };
255 } CM_HAL_MULTI_USE_BTI_ENTRY, *PCM_HAL_MULTI_USE_BTI_ENTRY;
256
257 typedef struct _CM_HAL_STATE {
258 PLATFORM Platform;
259 PGENOS_INTERFACE pOsInterface;
260 PGENHW_HW_INTERFACE pHwInterface;
261 PGENHW_BATCH_BUFFER pBatchBuffers;
262 PCM_HAL_TASK_PARAM pTaskParam;
263 PCM_HAL_TASK_TIMESTAMP pTaskTimeStamp;
264 CM_HAL_TS_RESOURCE TsResource;
265 CM_HAL_TS_RESOURCE SipResource;
266 PVOID pTableMem;
267 CM_HAL_HINT_TASK_INDEXES HintIndexes;
268 BOOL bRequestSingleSlice;
269 BOOL bSLMMode;
270
271 PCMLOOKUP_ENTRY pSurf2DTable;
272 PCM_HAL_SURFACE2D_ENTRY pUmdSurf2DTable;
273 PCM_HAL_BUFFER_ENTRY pBufferTable;
274 PCM_HAL_SURFACE2D_UP_ENTRY pSurf2DUPTable;
275 PCM_HAL_3DRESOURCE_ENTRY pSurf3DTable;
276 PCHAR pTaskStatusTable;
277 PCM_HAL_MULTI_USE_BTI_ENTRY pBT2DIndexTable;
278 PCM_HAL_MULTI_USE_BTI_ENTRY pBT2DUPIndexTable;
279 PCM_HAL_MULTI_USE_BTI_ENTRY pBT3DIndexTable;
280 PCM_HAL_MULTI_USE_BTI_ENTRY pBTBufferIndexTable;
281
282 CMSURFACE_REG_TABLE SurfaceRegTable;
283 CM_HAL_DEVICE_PARAM CmDeviceParam;
284 CM_HAL_KERNEL_SETUP KernelSetup;
285 INT iNumBatchBuffers;
286 DWORD dwDummyArg;
287 CM_HAL_MAX_HW_THREAD_VALUES MaxHWThreadValues;
288 GENHW_SCOREBOARD_PARAMS ScoreboardParams;
289 GENHW_WALKER_PARAMS WalkerParams;
290 PVOID pResourceList;
291 CM_HAL_L3_CONFIG L3Config;
292
293 BOOL bNullHwRenderCm;
294 DWORD cmDebugSurfaceBTI;
295
296 CM_HAL_POWER_OPTION_PARAM PowerOption;
297 BOOL bEUSaturationEnabled;
298 BOOL bEUSaturationNoSSD;
299 INT nNumKernelsInGSH;
300 INT pTotalKernelSize[CM_MAX_GSH_KERNEL_ENTRIES];
301
302 GENOS_GPU_CONTEXT GpuContext;
303 #ifndef CM_CHK_GENOSSTATUS
304 #define CM_CHK_GENOSSTATUS(_stmt) \
305 { \
306 hr = (GENOS_STATUS)(_stmt); \
307 if (hr != GENOS_STATUS_SUCCESS) \
308 { \
309 CM_NORMALMESSAGE("hr check failed."); \
310 goto finish; \
311 } \
312 }
313 #endif
314
315 #ifndef CM_CHK_NULL_RETURN_GENOSSTATUS
316 #define CM_CHK_NULL_RETURN_GENOSSTATUS(_ptr) \
317 { \
318 if ((_ptr) == NULL) \
319 { \
320 CM_ASSERTMESSAGE("Invalid (NULL) Pointer"); \
321 hr = GENOS_STATUS_NULL_POINTER; \
322 goto finish; \
323 } \
324 }
325 #endif
326
327 #ifndef CM_HRESULT2GENOSSTATUS_AND_CHECK
328 #define CM_HRESULT2GENOSSTATUS_AND_CHECK(_stmt) \
329 { \
330 hr = (GENOS_STATUS)OsResultToGENOS_Status(_stmt); \
331 if (hr != GENOS_STATUS_SUCCESS) \
332 { \
333 CM_NORMALMESSAGE("hr check failed."); \
334 goto finish; \
335 } \
336 }
337 #endif
338
339 GENOS_STATUS(*pfnCmAllocate)
340 (PCM_HAL_STATE pState);
341
342 GENOS_STATUS(*pfnGetMaxValues)
343 (PCM_HAL_STATE pState, PCM_HAL_MAX_VALUES pMaxValues);
344
345 GENOS_STATUS(*pfnGetMaxValuesEx)
346 (PCM_HAL_STATE pState, PCM_HAL_MAX_VALUES_EX pMaxValuesEx);
347
348 GENOS_STATUS(*pfnExecuteTask)
349 (PCM_HAL_STATE pState, PCM_HAL_EXEC_TASK_PARAM pParam);
350
351 GENOS_STATUS(*pfnExecuteGroupTask)
352 (PCM_HAL_STATE pState, PCM_HAL_EXEC_GROUP_TASK_PARAM pParam);
353
354 GENOS_STATUS(*pfnExecuteHintsTask)
355 (PCM_HAL_STATE pState, PCM_HAL_EXEC_HINTS_TASK_PARAM pParam);
356
357 GENOS_STATUS(*pfnQueryTask)
358 (PCM_HAL_STATE pState, PCM_HAL_QUERY_TASK_PARAM pParam);
359
360 GENOS_STATUS(*pfnAllocateBuffer)
361 (PCM_HAL_STATE pState, PCM_HAL_BUFFER_PARAM pParam);
362
363 GENOS_STATUS(*pfnFreeBuffer)
364 (PCM_HAL_STATE pState, DWORD dwHandle);
365
366 GENOS_STATUS(*pfnUpdateBuffer)
367 (PCM_HAL_STATE pState, DWORD dwHandle, DWORD dwSize);
368
369 GENOS_STATUS(*pfnUpdateSurface2D)
370 (PCM_HAL_STATE pState, DWORD dwHandle, DWORD dwWidth, DWORD dwHeight);
371
372 GENOS_STATUS(*pfnLockBuffer)
373 (PCM_HAL_STATE pState, PCM_HAL_BUFFER_PARAM pParam);
374
375 GENOS_STATUS(*pfnUnlockBuffer)
376 (PCM_HAL_STATE pState, PCM_HAL_BUFFER_PARAM pParam);
377
378 GENOS_STATUS(*pfnAllocateSurface2DUP)
379 (PCM_HAL_STATE pState, PCM_HAL_SURFACE2D_UP_PARAM pParam);
380
381 GENOS_STATUS(*pfnFreeSurface2DUP)
382 (PCM_HAL_STATE pState, DWORD dwHandle);
383
384 GENOS_STATUS(*pfnGetSurface2DPitchAndSize)
385 (PCM_HAL_STATE pState, PCM_HAL_SURFACE2D_UP_PARAM pParam);
386
387 GENOS_STATUS(*pfnAllocateSurface2D)
388 (PCM_HAL_STATE pState, PCM_HAL_SURFACE2D_PARAM pParam);
389
390 GENOS_STATUS(*pfnFreeSurface2D)
391 (PCM_HAL_STATE pState, DWORD dwHandle);
392
393 GENOS_STATUS(*pfnLock2DResource)
394 (PCM_HAL_STATE pState, PCM_HAL_SURFACE2D_LOCK_UNLOCK_PARAM pParam);
395
396 GENOS_STATUS(*pfnUnlock2DResource)
397 (PCM_HAL_STATE pState, PCM_HAL_SURFACE2D_LOCK_UNLOCK_PARAM pParam);
398
399 GENOS_STATUS(*pfnGetSurface2DTileYPitch)
400 (PCM_HAL_STATE pState, PCM_HAL_SURFACE2D_PARAM pParam);
401
402 GENOS_STATUS(*pfnSetCaps)
403 (PCM_HAL_STATE pState, PCM_HAL_MAX_SET_CAPS_PARAM pParam);
404
405 GENOS_STATUS(*pfnGetGPUCurrentFrequency)
406 (PCM_HAL_STATE pState, UINT * pGPUCurrentFreq);
407
408 GENOS_STATUS(*pfnSet2DSurfaceStateDimensions)
409 (PCM_HAL_STATE pState,
410 PCM_HAL_SURFACE2D_SURFACE_STATE_DIMENSIONS_PARAM pParam);
411
412 GENOS_STATUS(*pfnSetPowerOption)
413 (PCM_HAL_STATE pState, PCM_HAL_POWER_OPTION_PARAM pPowerOption);
414
415 GENOS_STATUS(*pfnEscapeCallKMD)
416 (PCM_HAL_STATE pState, CM_KMD_ESCAPE_CALL nEscapeCall, PVOID pData);
417
418 GENOS_STATUS(*pfnSubmitCommands)
419 (PCM_HAL_STATE pState,
420 PGENHW_BATCH_BUFFER pBatchBuffer,
421 INT iTaskId, PCM_HAL_KERNEL_PARAM * pKernels, PVOID * ppCmdBuffer);
422
423 INT(*pfnGetTaskSyncLocation)
424 (INT iTaskId);
425
426 GENOS_STATUS(*pfnSetSurfaceMemoryObjectControl)
427 (PCM_HAL_STATE pState,
428 WORD wMemObjCtl, PGENHW_SURFACE_STATE_PARAMS pParams);
429
430 INT(*pfnGetCurbeBlockAlignSize) ();
431
432 GENOS_STATUS(*pfnGetUserDefinedThreadCountPerThreadGroup)
433 (PCM_HAL_STATE pState, UINT * pThreadsPerThreadGroup);
434
435 GENOS_STATUS(*pfnGetGpuTime)
436 (PCM_HAL_STATE pState, PUINT64 piGpuTime);
437
438 GENOS_STATUS(*pfnConvertToQPCTime)
439 (UINT64 nanoseconds, LARGE_INTEGER * QPCTime);
440
441 GENOS_STATUS(*pfnGetGlobalTime)
442 (LARGE_INTEGER * pGlobalTime);
443
444 GENOS_STATUS(*pfnSendMediaWalkerState)
445 (PCM_HAL_STATE pState,
446 PCM_HAL_KERNEL_PARAM pKernelParam, PGENOS_COMMAND_BUFFER pCmdBuffer);
447
448 GENOS_STATUS(*pfnSendGpGpuWalkerState)
449 (PCM_HAL_STATE pState,
450 PCM_HAL_KERNEL_PARAM pKernelParam, PGENOS_COMMAND_BUFFER pCmdBuffer);
451
452 GENOS_STATUS(*pfnSendCommandBufferHeaderEUSaturation)
453 (PCM_HAL_STATE pState, PGENOS_COMMAND_BUFFER pCmdBuffer);
454
455 GENOS_STATUS(*pfnSetSurfaceReadFlag)
456 (PCM_HAL_STATE pState, DWORD dwHandle);
457
458 GENOS_STATUS(*pfnGetPlatformInfo)
459 (PCM_HAL_STATE pState, PCM_HAL_PLATFORM_SUBSLICE_INFO platformInfo,
460 PBOOL pbIsSingleSubSlice);
461
462 } CM_HAL_STATE;
463
HalCm_GetNewTaskId(PCM_HAL_STATE pState,PINT piIndex)464 __inline GENOS_STATUS HalCm_GetNewTaskId(PCM_HAL_STATE pState, PINT piIndex)
465 {
466 UINT i;
467 UINT maxTasks;
468
469 maxTasks = pState->CmDeviceParam.iMaxTasks;
470
471 for (i = 0; i < maxTasks; i++) {
472 if (pState->pTaskStatusTable[i] == CM_INVALID_INDEX) {
473 *piIndex = i;
474 return GENOS_STATUS_SUCCESS;
475 }
476 }
477
478 CM_ASSERTMESSAGE("Unable to find a free slot for Task.");
479 return GENOS_STATUS_UNKNOWN;
480 }
481
482 GENOS_STATUS HalCm_Create(PGENOS_CONTEXT pOsDriverContext,
483 PCM_HAL_CREATE_PARAM pCmCreateParam,
484 PCM_HAL_STATE * pCmState);
485
486 VOID HalCm_Destroy(PCM_HAL_STATE pState);
487
488 VOID HalCm_GetRegistrySettings(PCM_HAL_STATE);
489
490 GENOS_STATUS HalCm_GetSurfaceDetails(PCM_HAL_STATE pState,
491 PCM_HAL_INDEX_PARAM pIndexParam,
492 UINT iBTIndex,
493 GENHW_SURFACE & Surface,
494 SHORT globalSurface,
495 PGENHW_SURFACE_STATE_ENTRY pSurfaceEntry,
496 UINT dwTempPlaneIndex,
497 GENHW_SURFACE_STATE_PARAMS SurfaceParam,
498 CM_HAL_KERNEL_ARG_KIND argKind);
499
500 GENOS_STATUS HalCm_AllocateTsResource(PCM_HAL_STATE pState);
501
502 GENOS_STATUS HalCm_AllocateTables(PCM_HAL_STATE pState);
503
504 GENOS_STATUS HalCm_Allocate(PCM_HAL_STATE pState);
505
506 VOID HalCm_OsInitInterface(PCM_HAL_STATE pCmState);
507
508 GENOS_STATUS HalCm_GetSurfaceAndRegister(PCM_HAL_STATE pState,
509 PGENHW_SURFACE pSurface,
510 CM_HAL_KERNEL_ARG_KIND surfKind,
511 UINT iIndex);
512
513 GENOS_STATUS HalCm_SendMediaWalkerState(PCM_HAL_STATE pState,
514 PCM_HAL_KERNEL_PARAM pKernelParam,
515 PGENOS_COMMAND_BUFFER pCmdBuffer);
516
517 GENOS_STATUS HalCm_SendGpGpuWalkerState(PCM_HAL_STATE pState,
518 PCM_HAL_KERNEL_PARAM pKernelParam,
519 PGENOS_COMMAND_BUFFER pCmdBuffer);
520
521 DWORD HalCm_GetFreeBindingIndex(PCM_HAL_STATE pState,
522 PCM_HAL_INDEX_PARAM pIndexParam, DWORD count);
523
524 void Halcm_PreSetBindingIndex(PCM_HAL_INDEX_PARAM pIndexParam,
525 DWORD start, DWORD end);
526
527 GENOS_STATUS HalCm_Setup2DSurfaceStateWithBTIndex(PCM_HAL_STATE pState,
528 INT iBindingTable,
529 UINT surfIndex, UINT btIndex);
530
531 GENOS_STATUS HalCm_SetupBufferSurfaceStateWithBTIndex(PCM_HAL_STATE pState,
532 INT iBindingTable,
533 UINT surfIndex,
534 UINT btIndex);
535
536 GENOS_STATUS HalCm_Setup2DSurfaceUPStateWithBTIndex(PCM_HAL_STATE pState,
537 INT iBindingTable,
538 UINT surfIndex,
539 UINT btIndex);
540
541 VOID HalCm_OsResource_Unreference(PGENOS_RESOURCE pOsResource);
542
543 VOID HalCm_OsResource_Reference(PGENOS_RESOURCE pOsResource);
544
545 GENOS_STATUS HalCm_SetSurfaceReadFlag(PCM_HAL_STATE pState, DWORD dwHandle);
546
547 #endif
548