/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/ddr/marvell/axp/ |
H A D | ddr3_pbs.c | 60 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc); 62 u32 pbs_pattern_idx, u32 ecc); 64 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc); 406 u32 pbs_pattern_idx, u32 ecc) in ddr3_tx_shift_dqs_adll_step_before_fail() argument 419 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_tx_shift_dqs_adll_step_before_fail() 917 u32 pbs_pattern_idx, u32 ecc) in ddr3_rx_shift_dqs_to_first_fail() argument 930 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_rx_shift_dqs_to_first_fail() 969 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1027 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1137 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc) in ddr3_pbs_per_bit() argument [all …]
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/ddr/marvell/axp/ |
H A D | ddr3_pbs.c | 60 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc); 62 u32 pbs_pattern_idx, u32 ecc); 64 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc); 406 u32 pbs_pattern_idx, u32 ecc) in ddr3_tx_shift_dqs_adll_step_before_fail() argument 419 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_tx_shift_dqs_adll_step_before_fail() 917 u32 pbs_pattern_idx, u32 ecc) in ddr3_rx_shift_dqs_to_first_fail() argument 930 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_rx_shift_dqs_to_first_fail() 969 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1027 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1137 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc) in ddr3_pbs_per_bit() argument [all …]
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/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/ddr/marvell/axp/ |
H A D | ddr3_pbs.c | 61 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc); 63 u32 pbs_pattern_idx, u32 ecc); 65 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc); 407 u32 pbs_pattern_idx, u32 ecc) in ddr3_tx_shift_dqs_adll_step_before_fail() argument 420 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_tx_shift_dqs_adll_step_before_fail() 918 u32 pbs_pattern_idx, u32 ecc) in ddr3_rx_shift_dqs_to_first_fail() argument 931 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_rx_shift_dqs_to_first_fail() 970 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1028 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1138 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc) in ddr3_pbs_per_bit() argument [all …]
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/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/ddr/marvell/axp/ |
H A D | ddr3_pbs.c | 61 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc); 63 u32 pbs_pattern_idx, u32 ecc); 65 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc); 407 u32 pbs_pattern_idx, u32 ecc) in ddr3_tx_shift_dqs_adll_step_before_fail() argument 420 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_tx_shift_dqs_adll_step_before_fail() 918 u32 pbs_pattern_idx, u32 ecc) in ddr3_rx_shift_dqs_to_first_fail() argument 931 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_rx_shift_dqs_to_first_fail() 970 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1028 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1138 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc) in ddr3_pbs_per_bit() argument [all …]
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/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/ddr/marvell/axp/ |
H A D | ddr3_pbs.c | 61 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc); 63 u32 pbs_pattern_idx, u32 ecc); 65 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc); 407 u32 pbs_pattern_idx, u32 ecc) in ddr3_tx_shift_dqs_adll_step_before_fail() argument 420 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_tx_shift_dqs_adll_step_before_fail() 918 u32 pbs_pattern_idx, u32 ecc) in ddr3_rx_shift_dqs_to_first_fail() argument 931 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_rx_shift_dqs_to_first_fail() 970 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1028 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1138 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc) in ddr3_pbs_per_bit() argument [all …]
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/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/ddr/marvell/axp/ |
H A D | ddr3_pbs.c | 61 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc); 63 u32 pbs_pattern_idx, u32 ecc); 65 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc); 407 u32 pbs_pattern_idx, u32 ecc) in ddr3_tx_shift_dqs_adll_step_before_fail() argument 420 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_tx_shift_dqs_adll_step_before_fail() 918 u32 pbs_pattern_idx, u32 ecc) in ddr3_rx_shift_dqs_to_first_fail() argument 931 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_rx_shift_dqs_to_first_fail() 970 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1028 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1138 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc) in ddr3_pbs_per_bit() argument [all …]
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/ddr/marvell/axp/ |
H A D | ddr3_pbs.c | 60 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc); 62 u32 pbs_pattern_idx, u32 ecc); 64 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc); 406 u32 pbs_pattern_idx, u32 ecc) in ddr3_tx_shift_dqs_adll_step_before_fail() argument 419 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_tx_shift_dqs_adll_step_before_fail() 917 u32 pbs_pattern_idx, u32 ecc) in ddr3_rx_shift_dqs_to_first_fail() argument 930 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_rx_shift_dqs_to_first_fail() 969 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1027 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1137 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc) in ddr3_pbs_per_bit() argument [all …]
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/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/ddr/marvell/axp/ |
H A D | ddr3_pbs.c | 61 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc); 63 u32 pbs_pattern_idx, u32 ecc); 65 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc); 407 u32 pbs_pattern_idx, u32 ecc) in ddr3_tx_shift_dqs_adll_step_before_fail() argument 420 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_tx_shift_dqs_adll_step_before_fail() 918 u32 pbs_pattern_idx, u32 ecc) in ddr3_rx_shift_dqs_to_first_fail() argument 931 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_rx_shift_dqs_to_first_fail() 970 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1028 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1138 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc) in ddr3_pbs_per_bit() argument [all …]
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/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/ddr/marvell/axp/ |
H A D | ddr3_pbs.c | 61 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc); 63 u32 pbs_pattern_idx, u32 ecc); 65 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc); 407 u32 pbs_pattern_idx, u32 ecc) in ddr3_tx_shift_dqs_adll_step_before_fail() argument 420 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_tx_shift_dqs_adll_step_before_fail() 918 u32 pbs_pattern_idx, u32 ecc) in ddr3_rx_shift_dqs_to_first_fail() argument 931 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_rx_shift_dqs_to_first_fail() 970 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1028 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1138 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc) in ddr3_pbs_per_bit() argument [all …]
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/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/ddr/marvell/axp/ |
H A D | ddr3_pbs.c | 61 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc); 63 u32 pbs_pattern_idx, u32 ecc); 65 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc); 407 u32 pbs_pattern_idx, u32 ecc) in ddr3_tx_shift_dqs_adll_step_before_fail() argument 420 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_tx_shift_dqs_adll_step_before_fail() 918 u32 pbs_pattern_idx, u32 ecc) in ddr3_rx_shift_dqs_to_first_fail() argument 931 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_rx_shift_dqs_to_first_fail() 970 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1028 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1138 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc) in ddr3_pbs_per_bit() argument [all …]
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/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/ddr/marvell/axp/ |
H A D | ddr3_pbs.c | 61 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc); 63 u32 pbs_pattern_idx, u32 ecc); 65 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc); 407 u32 pbs_pattern_idx, u32 ecc) in ddr3_tx_shift_dqs_adll_step_before_fail() argument 420 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_tx_shift_dqs_adll_step_before_fail() 918 u32 pbs_pattern_idx, u32 ecc) in ddr3_rx_shift_dqs_to_first_fail() argument 931 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_rx_shift_dqs_to_first_fail() 970 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1028 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1138 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc) in ddr3_pbs_per_bit() argument [all …]
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/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/ddr/marvell/axp/ |
H A D | ddr3_pbs.c | 61 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc); 63 u32 pbs_pattern_idx, u32 ecc); 65 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc); 407 u32 pbs_pattern_idx, u32 ecc) in ddr3_tx_shift_dqs_adll_step_before_fail() argument 420 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_tx_shift_dqs_adll_step_before_fail() 918 u32 pbs_pattern_idx, u32 ecc) in ddr3_rx_shift_dqs_to_first_fail() argument 931 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_rx_shift_dqs_to_first_fail() 970 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1028 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1138 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc) in ddr3_pbs_per_bit() argument [all …]
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/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/ddr/marvell/axp/ |
H A D | ddr3_pbs.c | 61 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc); 63 u32 pbs_pattern_idx, u32 ecc); 65 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc); 407 u32 pbs_pattern_idx, u32 ecc) in ddr3_tx_shift_dqs_adll_step_before_fail() argument 420 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_tx_shift_dqs_adll_step_before_fail() 918 u32 pbs_pattern_idx, u32 ecc) in ddr3_rx_shift_dqs_to_first_fail() argument 931 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_rx_shift_dqs_to_first_fail() 970 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1028 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1138 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc) in ddr3_pbs_per_bit() argument [all …]
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/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/ddr/marvell/axp/ |
H A D | ddr3_pbs.c | 61 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc); 63 u32 pbs_pattern_idx, u32 ecc); 65 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc); 407 u32 pbs_pattern_idx, u32 ecc) in ddr3_tx_shift_dqs_adll_step_before_fail() argument 420 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_tx_shift_dqs_adll_step_before_fail() 918 u32 pbs_pattern_idx, u32 ecc) in ddr3_rx_shift_dqs_to_first_fail() argument 931 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_rx_shift_dqs_to_first_fail() 970 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1028 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1138 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc) in ddr3_pbs_per_bit() argument [all …]
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/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/ddr/marvell/axp/ |
H A D | ddr3_pbs.c | 61 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc); 63 u32 pbs_pattern_idx, u32 ecc); 65 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc); 407 u32 pbs_pattern_idx, u32 ecc) in ddr3_tx_shift_dqs_adll_step_before_fail() argument 420 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_tx_shift_dqs_adll_step_before_fail() 918 u32 pbs_pattern_idx, u32 ecc) in ddr3_rx_shift_dqs_to_first_fail() argument 931 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_rx_shift_dqs_to_first_fail() 970 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1028 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1138 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc) in ddr3_pbs_per_bit() argument [all …]
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/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/ddr/marvell/axp/ |
H A D | ddr3_pbs.c | 61 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc); 63 u32 pbs_pattern_idx, u32 ecc); 65 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc); 407 u32 pbs_pattern_idx, u32 ecc) in ddr3_tx_shift_dqs_adll_step_before_fail() argument 420 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_tx_shift_dqs_adll_step_before_fail() 918 u32 pbs_pattern_idx, u32 ecc) in ddr3_rx_shift_dqs_to_first_fail() argument 931 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_rx_shift_dqs_to_first_fail() 970 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1028 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1138 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc) in ddr3_pbs_per_bit() argument [all …]
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/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/ddr/marvell/axp/ |
H A D | ddr3_pbs.c | 61 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc); 63 u32 pbs_pattern_idx, u32 ecc); 65 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc); 407 u32 pbs_pattern_idx, u32 ecc) in ddr3_tx_shift_dqs_adll_step_before_fail() argument 420 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_tx_shift_dqs_adll_step_before_fail() 918 u32 pbs_pattern_idx, u32 ecc) in ddr3_rx_shift_dqs_to_first_fail() argument 931 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_rx_shift_dqs_to_first_fail() 970 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1028 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1138 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc) in ddr3_pbs_per_bit() argument [all …]
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/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/drivers/ddr/marvell/axp/ |
H A D | ddr3_pbs.c | 61 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc); 63 u32 pbs_pattern_idx, u32 ecc); 65 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc); 407 u32 pbs_pattern_idx, u32 ecc) in ddr3_tx_shift_dqs_adll_step_before_fail() argument 420 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_tx_shift_dqs_adll_step_before_fail() 918 u32 pbs_pattern_idx, u32 ecc) in ddr3_rx_shift_dqs_to_first_fail() argument 931 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_rx_shift_dqs_to_first_fail() 970 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1028 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1138 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc) in ddr3_pbs_per_bit() argument [all …]
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/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/ddr/marvell/axp/ |
H A D | ddr3_pbs.c | 61 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc); 63 u32 pbs_pattern_idx, u32 ecc); 65 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc); 407 u32 pbs_pattern_idx, u32 ecc) in ddr3_tx_shift_dqs_adll_step_before_fail() argument 420 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_tx_shift_dqs_adll_step_before_fail() 918 u32 pbs_pattern_idx, u32 ecc) in ddr3_rx_shift_dqs_to_first_fail() argument 931 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_rx_shift_dqs_to_first_fail() 970 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1028 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1138 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc) in ddr3_pbs_per_bit() argument [all …]
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/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/drivers/ddr/marvell/axp/ |
H A D | ddr3_pbs.c | 61 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc); 63 u32 pbs_pattern_idx, u32 ecc); 65 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc); 407 u32 pbs_pattern_idx, u32 ecc) in ddr3_tx_shift_dqs_adll_step_before_fail() argument 420 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_tx_shift_dqs_adll_step_before_fail() 918 u32 pbs_pattern_idx, u32 ecc) in ddr3_rx_shift_dqs_to_first_fail() argument 931 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_rx_shift_dqs_to_first_fail() 970 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1028 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1138 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc) in ddr3_pbs_per_bit() argument [all …]
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/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/ddr/marvell/axp/ |
H A D | ddr3_pbs.c | 61 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc); 63 u32 pbs_pattern_idx, u32 ecc); 65 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc); 407 u32 pbs_pattern_idx, u32 ecc) in ddr3_tx_shift_dqs_adll_step_before_fail() argument 420 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_tx_shift_dqs_adll_step_before_fail() 918 u32 pbs_pattern_idx, u32 ecc) in ddr3_rx_shift_dqs_to_first_fail() argument 931 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_rx_shift_dqs_to_first_fail() 970 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1028 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1138 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc) in ddr3_pbs_per_bit() argument [all …]
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/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/ddr/marvell/axp/ |
H A D | ddr3_pbs.c | 61 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc); 63 u32 pbs_pattern_idx, u32 ecc); 65 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc); 407 u32 pbs_pattern_idx, u32 ecc) in ddr3_tx_shift_dqs_adll_step_before_fail() argument 420 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_tx_shift_dqs_adll_step_before_fail() 918 u32 pbs_pattern_idx, u32 ecc) in ddr3_rx_shift_dqs_to_first_fail() argument 931 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_rx_shift_dqs_to_first_fail() 970 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1028 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1138 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc) in ddr3_pbs_per_bit() argument [all …]
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/ddr/marvell/axp/ |
H A D | ddr3_pbs.c | 60 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc); 62 u32 pbs_pattern_idx, u32 ecc); 64 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc); 406 u32 pbs_pattern_idx, u32 ecc) in ddr3_tx_shift_dqs_adll_step_before_fail() argument 419 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_tx_shift_dqs_adll_step_before_fail() 917 u32 pbs_pattern_idx, u32 ecc) in ddr3_rx_shift_dqs_to_first_fail() argument 930 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_rx_shift_dqs_to_first_fail() 969 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1027 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1137 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc) in ddr3_pbs_per_bit() argument [all …]
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/dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/ddr/marvell/axp/ |
H A D | ddr3_pbs.c | 61 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc); 63 u32 pbs_pattern_idx, u32 ecc); 65 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc); 407 u32 pbs_pattern_idx, u32 ecc) in ddr3_tx_shift_dqs_adll_step_before_fail() argument 420 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_tx_shift_dqs_adll_step_before_fail() 918 u32 pbs_pattern_idx, u32 ecc) in ddr3_rx_shift_dqs_to_first_fail() argument 931 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_rx_shift_dqs_to_first_fail() 970 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1028 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1138 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc) in ddr3_pbs_per_bit() argument [all …]
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/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/ddr/marvell/axp/ |
H A D | ddr3_pbs.c | 61 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc); 63 u32 pbs_pattern_idx, u32 ecc); 65 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc); 407 u32 pbs_pattern_idx, u32 ecc) in ddr3_tx_shift_dqs_adll_step_before_fail() argument 420 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_tx_shift_dqs_adll_step_before_fail() 918 u32 pbs_pattern_idx, u32 ecc) in ddr3_rx_shift_dqs_to_first_fail() argument 931 pattern_ptr = (u32 *)&pbs_pattern[pbs_pattern_idx]; in ddr3_rx_shift_dqs_to_first_fail() 970 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1028 pbs_pattern_idx * SDRAM_PBS_NEXT_OFFS, in ddr3_rx_shift_dqs_to_first_fail() 1138 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc) in ddr3_pbs_per_bit() argument [all …]
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