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Searched refs:pcbase (Results 1 – 25 of 173) sorted by relevance

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/dports/emulators/mess/mame-mame0226/src/devices/machine/
H A D68340tmu.cpp47 LOGR("%08x m68340_internal_timer_r %08x, (%08x)\n", m_cpu->pcbase(), offset * 2, mem_mask); in read()
66 …LOGTIMER("- %08x %s %04x, %04x (%04x) (IR - Interrupt Register)\n", m_cpu->pcbase(), FUNCNAME, off… in read()
70 …LOGTIMER("- %08x %s %04x, %04x (%04x) (CR - Control Register)\n", m_cpu->pcbase(), FUNCNAME, offse… in read()
78 …LOGTIMER("- %08x %s %04x, %04x (%04x) (CNTR - Counter Register)\n", m_cpu->pcbase(), FUNCNAME, off… in read()
82 …LOGTIMER("- %08x %s %04x, %04x (%04x) (PREL1 - Preload 1 Register)\n", m_cpu->pcbase(), FUNCNAME, … in read()
92 …LOGTIMER("- %08x %s %04x, %04x (%04x) (COM - Compare Register)\n", m_cpu->pcbase(), FUNCNAME, offs… in read()
95 …LOGTIMER("- %08x FUNCNAME %08x, %08x (%08x) - not implemented\n", m_cpu->pcbase(), offset * 2, val… in read()
96 …logerror("%08x m68340_internal_timer_r %08x, %08x (%08x)\n", m_cpu->pcbase(), offset * 2, val, mem… in read()
260 …LOGTIMER("- %08x FUNCNAME %08x, %08x (%08x) - not implemented\n", m_cpu->pcbase(), offset * 2, dat… in write()
261 …logerror("%08x m68340_internal_sim_w %08x, %08x (%08x)\n", m_cpu->pcbase(), offset * 2, data, mem_… in write()
[all …]
H A D68340ser.cpp46 LOGR("%08x %s %08x\n", m_cpu->pcbase(), FUNCNAME, offset); in read()
63 …s %04x, %04x (MCRH - Module Configuration Register High byte)\n", m_cpu->pcbase(), FUNCNAME, offse… in read()
67 …LOGSERIAL("- %08x %s %04x, %04x (MCRL - Module Configuration Register Low byte)\n", m_cpu->pcbase(… in read()
71 …LOGSERIAL("- %08x %s %04x, %04x (ILR - Interrupt Level Register)\n", m_cpu->pcbase(), FUNCNAME, of… in read()
75 …LOGSERIAL("- %08x %s %04x, %04x (IVR - Interrupt Vector Register)\n", m_cpu->pcbase(), FUNCNAME, o… in read()
121 …s %04x, %04x (MCRH - Module Configuration Register High byte)\n", m_cpu->pcbase(), FUNCNAME, offse… in write()
128 …%s %04x, %04x (MCRL - Module Configuration Register Low byte)\n", m_cpu->pcbase(), FUNCNAME, offse… in write()
134 …LOGSERIAL("PC: %08x %s %04x, %04x (ILR - Interrupt Level Register)\n", m_cpu->pcbase(), FUNCNAME, … in write()
140 …LOGSERIAL("PC: %08x %s %04x, %04x (IVR - Interrupt Vector Register)\n", m_cpu->pcbase(), FUNCNAME,… in write()
/dports/emulators/mame/mame-mame0226/src/devices/machine/
H A D68340tmu.cpp47 LOGR("%08x m68340_internal_timer_r %08x, (%08x)\n", m_cpu->pcbase(), offset * 2, mem_mask); in read()
66 …LOGTIMER("- %08x %s %04x, %04x (%04x) (IR - Interrupt Register)\n", m_cpu->pcbase(), FUNCNAME, off… in read()
70 …LOGTIMER("- %08x %s %04x, %04x (%04x) (CR - Control Register)\n", m_cpu->pcbase(), FUNCNAME, offse… in read()
78 …LOGTIMER("- %08x %s %04x, %04x (%04x) (CNTR - Counter Register)\n", m_cpu->pcbase(), FUNCNAME, off… in read()
82 …LOGTIMER("- %08x %s %04x, %04x (%04x) (PREL1 - Preload 1 Register)\n", m_cpu->pcbase(), FUNCNAME, … in read()
92 …LOGTIMER("- %08x %s %04x, %04x (%04x) (COM - Compare Register)\n", m_cpu->pcbase(), FUNCNAME, offs… in read()
95 …LOGTIMER("- %08x FUNCNAME %08x, %08x (%08x) - not implemented\n", m_cpu->pcbase(), offset * 2, val… in read()
96 …logerror("%08x m68340_internal_timer_r %08x, %08x (%08x)\n", m_cpu->pcbase(), offset * 2, val, mem… in read()
260 …LOGTIMER("- %08x FUNCNAME %08x, %08x (%08x) - not implemented\n", m_cpu->pcbase(), offset * 2, dat… in write()
261 …logerror("%08x m68340_internal_sim_w %08x, %08x (%08x)\n", m_cpu->pcbase(), offset * 2, data, mem_… in write()
[all …]
H A D68340ser.cpp46 LOGR("%08x %s %08x\n", m_cpu->pcbase(), FUNCNAME, offset); in read()
63 …s %04x, %04x (MCRH - Module Configuration Register High byte)\n", m_cpu->pcbase(), FUNCNAME, offse… in read()
67 …LOGSERIAL("- %08x %s %04x, %04x (MCRL - Module Configuration Register Low byte)\n", m_cpu->pcbase(… in read()
71 …LOGSERIAL("- %08x %s %04x, %04x (ILR - Interrupt Level Register)\n", m_cpu->pcbase(), FUNCNAME, of… in read()
75 …LOGSERIAL("- %08x %s %04x, %04x (IVR - Interrupt Vector Register)\n", m_cpu->pcbase(), FUNCNAME, o… in read()
121 …s %04x, %04x (MCRH - Module Configuration Register High byte)\n", m_cpu->pcbase(), FUNCNAME, offse… in write()
128 …%s %04x, %04x (MCRL - Module Configuration Register Low byte)\n", m_cpu->pcbase(), FUNCNAME, offse… in write()
134 …LOGSERIAL("PC: %08x %s %04x, %04x (ILR - Interrupt Level Register)\n", m_cpu->pcbase(), FUNCNAME, … in write()
140 …LOGSERIAL("PC: %08x %s %04x, %04x (IVR - Interrupt Vector Register)\n", m_cpu->pcbase(), FUNCNAME,… in write()
/dports/emulators/mess/mame-mame0226/src/mame/drivers/
H A Decoinf3.cpp65 logerror("%04x - ppi8255_intf_a_(used)read_b %02x\n", m_maincpu->pcbase(), ret); in ppi8255_intf_a_read_b()
72 logerror("%04x - ppi8255_intf_a_(used)read_c %02x\n", m_maincpu->pcbase(), ret); in ppi8255_intf_a_read_c()
84 logerror("%04x - ppi8255_intf_c_(used)read_b %02x (COINS+TEST)\n", m_maincpu->pcbase(), ret); in ppi8255_intf_c_read_b()
91 logerror("%04x - ppi8255_intf_c_(used)read_c %02x\n", m_maincpu->pcbase(), ret); in ppi8255_intf_c_read_c()
99 logerror("%04x - ppi8255_intf_d_(used)read_b %02x\n", m_maincpu->pcbase(), ret); in ppi8255_intf_d_read_b()
130 logerror("%04x - ppi8255_intf_e_(used)read_b (PER KEY) %02x\n", m_maincpu->pcbase(), ret); in ppi8255_intf_e_read_b()
135 logerror("%04x - ppi8255_intf_e_(used)read_b (BUTTONS?) %02x\n", m_maincpu->pcbase(), ret); in ppi8255_intf_e_read_b()
151 logerror("%04x - ppi8255_intf_f_(used)read_a %02x\n", m_maincpu->pcbase(), ret); in ppi8255_intf_f_read_a()
166 logerror("%04x - ppi8255_intf_h_(used)read_b %02x\n", m_maincpu->pcbase(), ret); in ppi8255_intf_h_read_b()
253 logerror("%04x - ppi8255_intf_e_write_c %02x (INPUT MUX?)\n", m_maincpu->pcbase(), data); in ppi8255_intf_e_write_c()
[all …]
/dports/emulators/mame/mame-mame0226/src/mame/drivers/
H A Decoinf3.cpp65 logerror("%04x - ppi8255_intf_a_(used)read_b %02x\n", m_maincpu->pcbase(), ret); in ppi8255_intf_a_read_b()
72 logerror("%04x - ppi8255_intf_a_(used)read_c %02x\n", m_maincpu->pcbase(), ret); in ppi8255_intf_a_read_c()
84 logerror("%04x - ppi8255_intf_c_(used)read_b %02x (COINS+TEST)\n", m_maincpu->pcbase(), ret); in ppi8255_intf_c_read_b()
91 logerror("%04x - ppi8255_intf_c_(used)read_c %02x\n", m_maincpu->pcbase(), ret); in ppi8255_intf_c_read_c()
99 logerror("%04x - ppi8255_intf_d_(used)read_b %02x\n", m_maincpu->pcbase(), ret); in ppi8255_intf_d_read_b()
130 logerror("%04x - ppi8255_intf_e_(used)read_b (PER KEY) %02x\n", m_maincpu->pcbase(), ret); in ppi8255_intf_e_read_b()
135 logerror("%04x - ppi8255_intf_e_(used)read_b (BUTTONS?) %02x\n", m_maincpu->pcbase(), ret); in ppi8255_intf_e_read_b()
151 logerror("%04x - ppi8255_intf_f_(used)read_a %02x\n", m_maincpu->pcbase(), ret); in ppi8255_intf_f_read_a()
166 logerror("%04x - ppi8255_intf_h_(used)read_b %02x\n", m_maincpu->pcbase(), ret); in ppi8255_intf_h_read_b()
253 logerror("%04x - ppi8255_intf_e_write_c %02x (INPUT MUX?)\n", m_maincpu->pcbase(), data); in ppi8255_intf_e_write_c()
[all …]
/dports/emulators/mess/mame-mame0226/src/mame/machine/
H A Dtwincobr.cpp50 …LOG(("DSP PC:%04x IO write %04x (%08x) at port 0\n",m_dsp->pcbase(),data,m_main_ram_seg + m_dsp_ad… in twincobr_dsp_addrsel_w()
65 …default: logerror("DSP PC:%04x Warning !!! IO reading from %08x (port 1)\n",m_dsp->pcbase()… in twincobr_dsp_r()
67 …LOG(("DSP PC:%04x IO read %04x at %08x (port 1)\n",m_dsp->pcbase(),input_data,m_main_ram_seg + m_d… in twincobr_dsp_r()
82 …default: logerror("DSP PC:%04x Warning !!! IO writing to %08x (port 1)\n",m_dsp->pcbase(),m… in twincobr_dsp_w()
84 …LOG(("DSP PC:%04x IO write %04x at %08x (port 1)\n",m_dsp->pcbase(),data,m_main_ram_seg + m_dsp_ad… in twincobr_dsp_w()
99 …LOG(("DSP PC:%04x IO write %04x (%08x) at port 0\n",m_dsp->pcbase(),data,m_main_ram_seg + m_dsp_ad… in wardner_dsp_addrsel_w()
117 …LOG(("DSP PC:%04x IO read %04x at %08x (port 1)\n",m_dsp->pcbase(),input_data,m_main_ram_seg + m_d… in wardner_dsp_r()
135 …LOG(("DSP PC:%04x IO write %04x at %08x (port 1)\n",m_dsp->pcbase(),data,m_main_ram_seg + m_dsp_ad… in wardner_dsp_w()
145 LOG(("DSP PC:%04x IO write %04x at port 3\n",m_dsp->pcbase(),data)); in twincobr_dsp_bio_w()
169 …LOG(("DSP PC:%04x IO read %04x from 8741 MCU (port 2)\n",m_dsp->pcbase(),(m_fsharkbt_8741 & 0x08))… in fsharkbt_dsp_r()
[all …]
H A Ddecocass.cpp195 …cocass_reset_w(%02x): $%02x\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data)); in decocass_reset_w()
260 machine().time().as_string(6), m_maincpu->pcbase(), offset, data, in decocass_type1_r()
313 machine().time().as_string(6), m_maincpu->pcbase(), offset, data)); in decocass_type1_r()
626 …e3_r(%02x): $%02x <- open bus", machine().time().as_string(6), m_maincpu->pcbase(), offset, data)); in decocass_type3_r()
845 …_r(%02x): $%02x <- open bus\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data)); in decocass_type4_r()
1141 m_maincpu->pcbase(), in decocass_e5xx_r()
1180 …xx_w(%02x): $%02x -> dongle\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data)); in decocass_e5xx_w()
1645 m_maincpu->pcbase(), in i8041_p1_w()
1681 m_maincpu->pcbase(), in i8041_p1_r()
1702 m_maincpu->pcbase(), in i8041_p2_w()
[all …]
H A Dtoaplan1.cpp39 …logerror("DSP PC:%04x IO write %04x (%08x) at port 0\n", m_dsp->pcbase(), data, m_main_ram_seg + m… in dsp_addrsel_w()
53 …default: logerror("DSP PC:%04x Warning !!! IO reading from %08x (port 1)\n", m_dsp->pcbase(… in dsp_r()
55 …logerror("DSP PC:%04x IO read %04x at %08x (port 1)\n", m_dsp->pcbase(), input_data, m_main_ram_se… in dsp_r()
69 …default: logerror("DSP PC:%04x Warning !!! IO writing to %08x (port 1)\n", m_dsp->pcbase(),… in dsp_w()
71 …logerror("DSP PC:%04x IO write %04x at %08x (port 1)\n", m_dsp->pcbase(), data, m_main_ram_seg + m… in dsp_w()
83 logerror("DSP PC:%04x IO write %04x at port 3\n", m_dsp->pcbase(), data); in dsp_bio_w()
138 …default: logerror("68000:%08x Writing unknown command %02x to $e0000b\n",m_maincpu->pcbase() ,… in dsp_ctrl_w()
146 logerror("PC:%08x Warning !!! IO reading from $14000b\n",m_maincpu->pcbase()); in port_6_word_r()
224 …:%04x Writing unknown data (%04x) to coin count/lockout port\n",m_audiocpu->pcbase(),data); break; in coin_w()
/dports/emulators/mame/mame-mame0226/src/mame/machine/
H A Dtwincobr.cpp50 …LOG(("DSP PC:%04x IO write %04x (%08x) at port 0\n",m_dsp->pcbase(),data,m_main_ram_seg + m_dsp_ad… in twincobr_dsp_addrsel_w()
65 …default: logerror("DSP PC:%04x Warning !!! IO reading from %08x (port 1)\n",m_dsp->pcbase()… in twincobr_dsp_r()
67 …LOG(("DSP PC:%04x IO read %04x at %08x (port 1)\n",m_dsp->pcbase(),input_data,m_main_ram_seg + m_d… in twincobr_dsp_r()
82 …default: logerror("DSP PC:%04x Warning !!! IO writing to %08x (port 1)\n",m_dsp->pcbase(),m… in twincobr_dsp_w()
84 …LOG(("DSP PC:%04x IO write %04x at %08x (port 1)\n",m_dsp->pcbase(),data,m_main_ram_seg + m_dsp_ad… in twincobr_dsp_w()
99 …LOG(("DSP PC:%04x IO write %04x (%08x) at port 0\n",m_dsp->pcbase(),data,m_main_ram_seg + m_dsp_ad… in wardner_dsp_addrsel_w()
117 …LOG(("DSP PC:%04x IO read %04x at %08x (port 1)\n",m_dsp->pcbase(),input_data,m_main_ram_seg + m_d… in wardner_dsp_r()
135 …LOG(("DSP PC:%04x IO write %04x at %08x (port 1)\n",m_dsp->pcbase(),data,m_main_ram_seg + m_dsp_ad… in wardner_dsp_w()
145 LOG(("DSP PC:%04x IO write %04x at port 3\n",m_dsp->pcbase(),data)); in twincobr_dsp_bio_w()
169 …LOG(("DSP PC:%04x IO read %04x from 8741 MCU (port 2)\n",m_dsp->pcbase(),(m_fsharkbt_8741 & 0x08))… in fsharkbt_dsp_r()
[all …]
H A Ddecocass.cpp195 …cocass_reset_w(%02x): $%02x\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data)); in decocass_reset_w()
260 machine().time().as_string(6), m_maincpu->pcbase(), offset, data, in decocass_type1_r()
313 machine().time().as_string(6), m_maincpu->pcbase(), offset, data)); in decocass_type1_r()
626 …e3_r(%02x): $%02x <- open bus", machine().time().as_string(6), m_maincpu->pcbase(), offset, data)); in decocass_type3_r()
845 …_r(%02x): $%02x <- open bus\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data)); in decocass_type4_r()
1141 m_maincpu->pcbase(), in decocass_e5xx_r()
1180 …xx_w(%02x): $%02x -> dongle\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data)); in decocass_e5xx_w()
1645 m_maincpu->pcbase(), in i8041_p1_w()
1681 m_maincpu->pcbase(), in i8041_p1_r()
1702 m_maincpu->pcbase(), in i8041_p2_w()
[all …]
H A Dtoaplan1.cpp39 …logerror("DSP PC:%04x IO write %04x (%08x) at port 0\n", m_dsp->pcbase(), data, m_main_ram_seg + m… in dsp_addrsel_w()
53 …default: logerror("DSP PC:%04x Warning !!! IO reading from %08x (port 1)\n", m_dsp->pcbase(… in dsp_r()
55 …logerror("DSP PC:%04x IO read %04x at %08x (port 1)\n", m_dsp->pcbase(), input_data, m_main_ram_se… in dsp_r()
69 …default: logerror("DSP PC:%04x Warning !!! IO writing to %08x (port 1)\n", m_dsp->pcbase(),… in dsp_w()
71 …logerror("DSP PC:%04x IO write %04x at %08x (port 1)\n", m_dsp->pcbase(), data, m_main_ram_seg + m… in dsp_w()
83 logerror("DSP PC:%04x IO write %04x at port 3\n", m_dsp->pcbase(), data); in dsp_bio_w()
138 …default: logerror("68000:%08x Writing unknown command %02x to $e0000b\n",m_maincpu->pcbase() ,… in dsp_ctrl_w()
146 logerror("PC:%08x Warning !!! IO reading from $14000b\n",m_maincpu->pcbase()); in port_6_word_r()
224 …:%04x Writing unknown data (%04x) to coin count/lockout port\n",m_audiocpu->pcbase(),data); break; in coin_w()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/pinctrl/mtmips/
H A Dpinctrl-mt7628.c88 void __iomem *pcbase; member
488 clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
489 clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
492 setbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
493 clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
496 clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
497 setbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
500 clrsetbits_32(priv->pcbase + offs + PAD_SMT_G0_REG, in mt7628_pinconf_set()
514 clrsetbits_32(priv->pcbase + offs + PAD_SR_G0_REG, in mt7628_pinconf_set()
547 priv->pcbase = (void __iomem *)dev_remap_addr_index(dev, 1); in mt7628_pinctrl_of_to_plat()
[all …]
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/pinctrl/mtmips/
H A Dpinctrl-mt7628.c88 void __iomem *pcbase; member
488 clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
489 clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
492 setbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
493 clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
496 clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
497 setbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
500 clrsetbits_32(priv->pcbase + offs + PAD_SMT_G0_REG, in mt7628_pinconf_set()
514 clrsetbits_32(priv->pcbase + offs + PAD_SR_G0_REG, in mt7628_pinconf_set()
547 priv->pcbase = (void __iomem *)dev_remap_addr_index(dev, 1); in mt7628_pinctrl_of_to_plat()
[all …]
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/pinctrl/mtmips/
H A Dpinctrl-mt7628.c88 void __iomem *pcbase; member
488 clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
489 clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
492 setbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
493 clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
496 clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
497 setbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
500 clrsetbits_32(priv->pcbase + offs + PAD_SMT_G0_REG, in mt7628_pinconf_set()
514 clrsetbits_32(priv->pcbase + offs + PAD_SR_G0_REG, in mt7628_pinconf_set()
547 priv->pcbase = (void __iomem *)dev_remap_addr_index(dev, 1); in mt7628_pinctrl_of_to_plat()
[all …]
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/pinctrl/mtmips/
H A Dpinctrl-mt7628.c88 void __iomem *pcbase; member
488 clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
489 clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
492 setbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
493 clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
496 clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
497 setbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
500 clrsetbits_32(priv->pcbase + offs + PAD_SMT_G0_REG, in mt7628_pinconf_set()
514 clrsetbits_32(priv->pcbase + offs + PAD_SR_G0_REG, in mt7628_pinconf_set()
547 priv->pcbase = (void __iomem *)dev_remap_addr_index(dev, 1); in mt7628_pinctrl_of_to_plat()
[all …]
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/pinctrl/mtmips/
H A Dpinctrl-mt7628.c88 void __iomem *pcbase; member
488 clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
489 clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
492 setbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
493 clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
496 clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
497 setbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
500 clrsetbits_32(priv->pcbase + offs + PAD_SMT_G0_REG, in mt7628_pinconf_set()
514 clrsetbits_32(priv->pcbase + offs + PAD_SR_G0_REG, in mt7628_pinconf_set()
547 priv->pcbase = (void __iomem *)dev_remap_addr_index(dev, 1); in mt7628_pinctrl_of_to_plat()
[all …]
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/pinctrl/mtmips/
H A Dpinctrl-mt7628.c88 void __iomem *pcbase; member
488 clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
489 clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
492 setbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
493 clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
496 clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
497 setbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
500 clrsetbits_32(priv->pcbase + offs + PAD_SMT_G0_REG, in mt7628_pinconf_set()
514 clrsetbits_32(priv->pcbase + offs + PAD_SR_G0_REG, in mt7628_pinconf_set()
547 priv->pcbase = (void __iomem *)dev_remap_addr_index(dev, 1); in mt7628_pinctrl_of_to_plat()
[all …]
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/pinctrl/mtmips/
H A Dpinctrl-mt7628.c88 void __iomem *pcbase; member
488 clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
489 clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
492 setbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
493 clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
496 clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
497 setbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
500 clrsetbits_32(priv->pcbase + offs + PAD_SMT_G0_REG, in mt7628_pinconf_set()
514 clrsetbits_32(priv->pcbase + offs + PAD_SR_G0_REG, in mt7628_pinconf_set()
547 priv->pcbase = (void __iomem *)dev_remap_addr_index(dev, 1); in mt7628_pinctrl_of_to_plat()
[all …]
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/pinctrl/mtmips/
H A Dpinctrl-mt7628.c88 void __iomem *pcbase; member
488 clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
489 clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
492 setbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
493 clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
496 clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
497 setbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
500 clrsetbits_32(priv->pcbase + offs + PAD_SMT_G0_REG, in mt7628_pinconf_set()
514 clrsetbits_32(priv->pcbase + offs + PAD_SR_G0_REG, in mt7628_pinconf_set()
547 priv->pcbase = (void __iomem *)dev_remap_addr_index(dev, 1); in mt7628_pinctrl_of_to_plat()
[all …]
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/pinctrl/mtmips/
H A Dpinctrl-mt7628.c88 void __iomem *pcbase; member
488 clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
489 clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
492 setbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
493 clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
496 clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
497 setbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
500 clrsetbits_32(priv->pcbase + offs + PAD_SMT_G0_REG, in mt7628_pinconf_set()
514 clrsetbits_32(priv->pcbase + offs + PAD_SR_G0_REG, in mt7628_pinconf_set()
547 priv->pcbase = (void __iomem *)dev_remap_addr_index(dev, 1); in mt7628_pinctrl_of_to_plat()
[all …]
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/pinctrl/mtmips/
H A Dpinctrl-mt7628.c88 void __iomem *pcbase; member
488 clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
489 clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
492 setbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
493 clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
496 clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
497 setbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
500 clrsetbits_32(priv->pcbase + offs + PAD_SMT_G0_REG, in mt7628_pinconf_set()
514 clrsetbits_32(priv->pcbase + offs + PAD_SR_G0_REG, in mt7628_pinconf_set()
547 priv->pcbase = (void __iomem *)dev_remap_addr_index(dev, 1); in mt7628_pinctrl_of_to_plat()
[all …]
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/pinctrl/mtmips/
H A Dpinctrl-mt7628.c88 void __iomem *pcbase; member
488 clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
489 clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
492 setbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
493 clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
496 clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
497 setbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
500 clrsetbits_32(priv->pcbase + offs + PAD_SMT_G0_REG, in mt7628_pinconf_set()
514 clrsetbits_32(priv->pcbase + offs + PAD_SR_G0_REG, in mt7628_pinconf_set()
547 priv->pcbase = (void __iomem *)dev_remap_addr_index(dev, 1); in mt7628_pinctrl_of_to_plat()
[all …]
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/pinctrl/mtmips/
H A Dpinctrl-mt7628.c88 void __iomem *pcbase; member
488 clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
489 clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
492 setbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
493 clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
496 clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
497 setbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
500 clrsetbits_32(priv->pcbase + offs + PAD_SMT_G0_REG, in mt7628_pinconf_set()
514 clrsetbits_32(priv->pcbase + offs + PAD_SR_G0_REG, in mt7628_pinconf_set()
547 priv->pcbase = (void __iomem *)dev_remap_addr_index(dev, 1); in mt7628_pinctrl_of_to_plat()
[all …]
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/pinctrl/mtmips/
H A Dpinctrl-mt7628.c88 void __iomem *pcbase; member
488 clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
489 clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
492 setbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
493 clrbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
496 clrbits_32(priv->pcbase + offs + PAD_PU_G0_REG, BIT(bit)); in mt7628_pinconf_set()
497 setbits_32(priv->pcbase + offs + PAD_PD_G0_REG, BIT(bit)); in mt7628_pinconf_set()
500 clrsetbits_32(priv->pcbase + offs + PAD_SMT_G0_REG, in mt7628_pinconf_set()
514 clrsetbits_32(priv->pcbase + offs + PAD_SR_G0_REG, in mt7628_pinconf_set()
547 priv->pcbase = (void __iomem *)dev_remap_addr_index(dev, 1); in mt7628_pinctrl_of_to_plat()
[all …]

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