| /dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 87 u32 pclk_div; in rkclk_init() local
107 pclk_div = APLL_HZ / CORE_PERI_HZ - 1; in rkclk_init()
108 assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf); in rkclk_init()
118 pclk_div << CORE_PERI_DIV_SHIFT); in rkclk_init()
127 pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
128 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
140 pclk_div << BUS_PCLK_DIV_SHIFT | in rkclk_init()
154 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
155 assert((1 << pclk_div) * PERI_PCLK_HZ == in rkclk_init()
156 PERI_ACLK_HZ && pclk_div < 0x8); in rkclk_init()
[all …]
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| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 82 u32 pclk_div; in rkclk_init() local
102 pclk_div = APLL_HZ / CORE_PERI_HZ - 1; in rkclk_init()
103 assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf); in rkclk_init()
113 pclk_div << CORE_PERI_DIV_SHIFT); in rkclk_init()
122 pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
123 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
135 pclk_div << BUS_PCLK_DIV_SHIFT | in rkclk_init()
149 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
150 assert((1 << pclk_div) * PERI_PCLK_HZ == in rkclk_init()
151 PERI_ACLK_HZ && pclk_div < 0x8); in rkclk_init()
[all …]
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 82 u32 pclk_div; in rkclk_init() local
102 pclk_div = APLL_HZ / CORE_PERI_HZ - 1; in rkclk_init()
103 assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf); in rkclk_init()
113 pclk_div << CORE_PERI_DIV_SHIFT); in rkclk_init()
122 pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
123 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
135 pclk_div << BUS_PCLK_DIV_SHIFT | in rkclk_init()
149 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
150 assert((1 << pclk_div) * PERI_PCLK_HZ == in rkclk_init()
151 PERI_ACLK_HZ && pclk_div < 0x8); in rkclk_init()
[all …]
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 87 u32 pclk_div; in rkclk_init() local
107 pclk_div = APLL_HZ / CORE_PERI_HZ - 1; in rkclk_init()
108 assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf); in rkclk_init()
118 pclk_div << CORE_PERI_DIV_SHIFT); in rkclk_init()
127 pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
128 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
140 pclk_div << BUS_PCLK_DIV_SHIFT | in rkclk_init()
154 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
155 assert((1 << pclk_div) * PERI_PCLK_HZ == in rkclk_init()
156 PERI_ACLK_HZ && pclk_div < 0x8); in rkclk_init()
[all …]
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| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 87 u32 pclk_div; in rkclk_init() local
107 pclk_div = APLL_HZ / CORE_PERI_HZ - 1; in rkclk_init()
108 assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf); in rkclk_init()
118 pclk_div << CORE_PERI_DIV_SHIFT); in rkclk_init()
127 pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
128 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
140 pclk_div << BUS_PCLK_DIV_SHIFT | in rkclk_init()
154 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
155 assert((1 << pclk_div) * PERI_PCLK_HZ == in rkclk_init()
156 PERI_ACLK_HZ && pclk_div < 0x8); in rkclk_init()
[all …]
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 87 u32 pclk_div; in rkclk_init() local
107 pclk_div = APLL_HZ / CORE_PERI_HZ - 1; in rkclk_init()
108 assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf); in rkclk_init()
118 pclk_div << CORE_PERI_DIV_SHIFT); in rkclk_init()
127 pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
128 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
140 pclk_div << BUS_PCLK_DIV_SHIFT | in rkclk_init()
154 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
155 assert((1 << pclk_div) * PERI_PCLK_HZ == in rkclk_init()
156 PERI_ACLK_HZ && pclk_div < 0x8); in rkclk_init()
[all …]
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 87 u32 pclk_div; in rkclk_init() local
107 pclk_div = APLL_HZ / CORE_PERI_HZ - 1; in rkclk_init()
108 assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf); in rkclk_init()
118 pclk_div << CORE_PERI_DIV_SHIFT); in rkclk_init()
127 pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
128 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
140 pclk_div << BUS_PCLK_DIV_SHIFT | in rkclk_init()
154 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
155 assert((1 << pclk_div) * PERI_PCLK_HZ == in rkclk_init()
156 PERI_ACLK_HZ && pclk_div < 0x8); in rkclk_init()
[all …]
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 82 u32 pclk_div; in rkclk_init() local
102 pclk_div = APLL_HZ / CORE_PERI_HZ - 1; in rkclk_init()
103 assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf); in rkclk_init()
113 pclk_div << CORE_PERI_DIV_SHIFT); in rkclk_init()
122 pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
123 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
135 pclk_div << BUS_PCLK_DIV_SHIFT | in rkclk_init()
149 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
150 assert((1 << pclk_div) * PERI_PCLK_HZ == in rkclk_init()
151 PERI_ACLK_HZ && pclk_div < 0x8); in rkclk_init()
[all …]
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 87 u32 pclk_div; in rkclk_init() local
107 pclk_div = APLL_HZ / CORE_PERI_HZ - 1; in rkclk_init()
108 assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf); in rkclk_init()
118 pclk_div << CORE_PERI_DIV_SHIFT); in rkclk_init()
127 pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
128 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
140 pclk_div << BUS_PCLK_DIV_SHIFT | in rkclk_init()
154 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
155 assert((1 << pclk_div) * PERI_PCLK_HZ == in rkclk_init()
156 PERI_ACLK_HZ && pclk_div < 0x8); in rkclk_init()
[all …]
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 87 u32 pclk_div; in rkclk_init() local
107 pclk_div = APLL_HZ / CORE_PERI_HZ - 1; in rkclk_init()
108 assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf); in rkclk_init()
118 pclk_div << CORE_PERI_DIV_SHIFT); in rkclk_init()
127 pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
128 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
140 pclk_div << BUS_PCLK_DIV_SHIFT | in rkclk_init()
154 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
155 assert((1 << pclk_div) * PERI_PCLK_HZ == in rkclk_init()
156 PERI_ACLK_HZ && pclk_div < 0x8); in rkclk_init()
[all …]
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 87 u32 pclk_div; in rkclk_init() local
107 pclk_div = APLL_HZ / CORE_PERI_HZ - 1; in rkclk_init()
108 assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf); in rkclk_init()
118 pclk_div << CORE_PERI_DIV_SHIFT); in rkclk_init()
127 pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
128 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
140 pclk_div << BUS_PCLK_DIV_SHIFT | in rkclk_init()
154 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
155 assert((1 << pclk_div) * PERI_PCLK_HZ == in rkclk_init()
156 PERI_ACLK_HZ && pclk_div < 0x8); in rkclk_init()
[all …]
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 87 u32 pclk_div; in rkclk_init() local
107 pclk_div = APLL_HZ / CORE_PERI_HZ - 1; in rkclk_init()
108 assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf); in rkclk_init()
118 pclk_div << CORE_PERI_DIV_SHIFT); in rkclk_init()
127 pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
128 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
140 pclk_div << BUS_PCLK_DIV_SHIFT | in rkclk_init()
154 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
155 assert((1 << pclk_div) * PERI_PCLK_HZ == in rkclk_init()
156 PERI_ACLK_HZ && pclk_div < 0x8); in rkclk_init()
[all …]
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 87 u32 pclk_div; in rkclk_init() local
107 pclk_div = APLL_HZ / CORE_PERI_HZ - 1; in rkclk_init()
108 assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf); in rkclk_init()
118 pclk_div << CORE_PERI_DIV_SHIFT); in rkclk_init()
127 pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
128 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
140 pclk_div << BUS_PCLK_DIV_SHIFT | in rkclk_init()
154 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
155 assert((1 << pclk_div) * PERI_PCLK_HZ == in rkclk_init()
156 PERI_ACLK_HZ && pclk_div < 0x8); in rkclk_init()
[all …]
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 87 u32 pclk_div; in rkclk_init() local
107 pclk_div = APLL_HZ / CORE_PERI_HZ - 1; in rkclk_init()
108 assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf); in rkclk_init()
118 pclk_div << CORE_PERI_DIV_SHIFT); in rkclk_init()
127 pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
128 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
140 pclk_div << BUS_PCLK_DIV_SHIFT | in rkclk_init()
154 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
155 assert((1 << pclk_div) * PERI_PCLK_HZ == in rkclk_init()
156 PERI_ACLK_HZ && pclk_div < 0x8); in rkclk_init()
[all …]
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 87 u32 pclk_div; in rkclk_init() local
107 pclk_div = APLL_HZ / CORE_PERI_HZ - 1; in rkclk_init()
108 assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf); in rkclk_init()
118 pclk_div << CORE_PERI_DIV_SHIFT); in rkclk_init()
127 pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
128 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
140 pclk_div << BUS_PCLK_DIV_SHIFT | in rkclk_init()
154 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
155 assert((1 << pclk_div) * PERI_PCLK_HZ == in rkclk_init()
156 PERI_ACLK_HZ && pclk_div < 0x8); in rkclk_init()
[all …]
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 87 u32 pclk_div; in rkclk_init() local
107 pclk_div = APLL_HZ / CORE_PERI_HZ - 1; in rkclk_init()
108 assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf); in rkclk_init()
118 pclk_div << CORE_PERI_DIV_SHIFT); in rkclk_init()
127 pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
128 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
140 pclk_div << BUS_PCLK_DIV_SHIFT | in rkclk_init()
154 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
155 assert((1 << pclk_div) * PERI_PCLK_HZ == in rkclk_init()
156 PERI_ACLK_HZ && pclk_div < 0x8); in rkclk_init()
[all …]
|
| /dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 87 u32 pclk_div; in rkclk_init() local
107 pclk_div = APLL_HZ / CORE_PERI_HZ - 1; in rkclk_init()
108 assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf); in rkclk_init()
118 pclk_div << CORE_PERI_DIV_SHIFT); in rkclk_init()
127 pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
128 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
140 pclk_div << BUS_PCLK_DIV_SHIFT | in rkclk_init()
154 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
155 assert((1 << pclk_div) * PERI_PCLK_HZ == in rkclk_init()
156 PERI_ACLK_HZ && pclk_div < 0x8); in rkclk_init()
[all …]
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| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 87 u32 pclk_div; in rkclk_init() local
107 pclk_div = APLL_HZ / CORE_PERI_HZ - 1; in rkclk_init()
108 assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf); in rkclk_init()
118 pclk_div << CORE_PERI_DIV_SHIFT); in rkclk_init()
127 pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
128 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
140 pclk_div << BUS_PCLK_DIV_SHIFT | in rkclk_init()
154 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
155 assert((1 << pclk_div) * PERI_PCLK_HZ == in rkclk_init()
156 PERI_ACLK_HZ && pclk_div < 0x8); in rkclk_init()
[all …]
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| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 87 u32 pclk_div; in rkclk_init() local
107 pclk_div = APLL_HZ / CORE_PERI_HZ - 1; in rkclk_init()
108 assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf); in rkclk_init()
118 pclk_div << CORE_PERI_DIV_SHIFT); in rkclk_init()
127 pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
128 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
140 pclk_div << BUS_PCLK_DIV_SHIFT | in rkclk_init()
154 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
155 assert((1 << pclk_div) * PERI_PCLK_HZ == in rkclk_init()
156 PERI_ACLK_HZ && pclk_div < 0x8); in rkclk_init()
[all …]
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| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 87 u32 pclk_div; in rkclk_init() local
107 pclk_div = APLL_HZ / CORE_PERI_HZ - 1; in rkclk_init()
108 assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf); in rkclk_init()
118 pclk_div << CORE_PERI_DIV_SHIFT); in rkclk_init()
127 pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
128 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
140 pclk_div << BUS_PCLK_DIV_SHIFT | in rkclk_init()
154 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
155 assert((1 << pclk_div) * PERI_PCLK_HZ == in rkclk_init()
156 PERI_ACLK_HZ && pclk_div < 0x8); in rkclk_init()
[all …]
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| /dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 87 u32 pclk_div; in rkclk_init() local
107 pclk_div = APLL_HZ / CORE_PERI_HZ - 1; in rkclk_init()
108 assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf); in rkclk_init()
118 pclk_div << CORE_PERI_DIV_SHIFT); in rkclk_init()
127 pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
128 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
140 pclk_div << BUS_PCLK_DIV_SHIFT | in rkclk_init()
154 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
155 assert((1 << pclk_div) * PERI_PCLK_HZ == in rkclk_init()
156 PERI_ACLK_HZ && pclk_div < 0x8); in rkclk_init()
[all …]
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| /dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 87 u32 pclk_div; in rkclk_init() local
107 pclk_div = APLL_HZ / CORE_PERI_HZ - 1; in rkclk_init()
108 assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf); in rkclk_init()
118 pclk_div << CORE_PERI_DIV_SHIFT); in rkclk_init()
127 pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
128 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
140 pclk_div << BUS_PCLK_DIV_SHIFT | in rkclk_init()
154 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
155 assert((1 << pclk_div) * PERI_PCLK_HZ == in rkclk_init()
156 PERI_ACLK_HZ && pclk_div < 0x8); in rkclk_init()
[all …]
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| /dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 87 u32 pclk_div; in rkclk_init() local
107 pclk_div = APLL_HZ / CORE_PERI_HZ - 1; in rkclk_init()
108 assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf); in rkclk_init()
118 pclk_div << CORE_PERI_DIV_SHIFT); in rkclk_init()
127 pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
128 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
140 pclk_div << BUS_PCLK_DIV_SHIFT | in rkclk_init()
154 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
155 assert((1 << pclk_div) * PERI_PCLK_HZ == in rkclk_init()
156 PERI_ACLK_HZ && pclk_div < 0x8); in rkclk_init()
[all …]
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 82 u32 pclk_div; in rkclk_init() local
102 pclk_div = APLL_HZ / CORE_PERI_HZ - 1; in rkclk_init()
103 assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf); in rkclk_init()
113 pclk_div << CORE_PERI_DIV_SHIFT); in rkclk_init()
122 pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
123 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
135 pclk_div << BUS_PCLK_DIV_SHIFT | in rkclk_init()
149 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
150 assert((1 << pclk_div) * PERI_PCLK_HZ == in rkclk_init()
151 PERI_ACLK_HZ && pclk_div < 0x8); in rkclk_init()
[all …]
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| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 87 u32 pclk_div; in rkclk_init() local
107 pclk_div = APLL_HZ / CORE_PERI_HZ - 1; in rkclk_init()
108 assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf); in rkclk_init()
118 pclk_div << CORE_PERI_DIV_SHIFT); in rkclk_init()
127 pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
128 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
140 pclk_div << BUS_PCLK_DIV_SHIFT | in rkclk_init()
154 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
155 assert((1 << pclk_div) * PERI_PCLK_HZ == in rkclk_init()
156 PERI_ACLK_HZ && pclk_div < 0x8); in rkclk_init()
[all …]
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