/dports/misc/rump/buildrump.sh-b914579/src/sys/external/bsd/drm/dist/shared-core/ |
H A D | i915_irq.c | 90 if ((dev_priv->pipestat[pipe] & mask) != mask) { in i915_enable_pipestat() 93 dev_priv->pipestat[pipe] |= mask; in i915_enable_pipestat() 103 if ((dev_priv->pipestat[pipe] & mask) != 0) { in i915_disable_pipestat() 106 dev_priv->pipestat[pipe] &= ~mask; in i915_disable_pipestat() 107 I915_WRITE(reg, dev_priv->pipestat[pipe]); in i915_disable_pipestat() 383 u32 pipestat; in i915_enable_vblank() local 390 pipestat = PIPE_START_VBLANK_INTERRUPT_ENABLE; in i915_enable_vblank() 392 pipestat = PIPE_VBLANK_INTERRUPT_ENABLE; in i915_enable_vblank() 395 i915_enable_pipestat(dev_priv, pipe, pipestat); in i915_enable_vblank() 494 dev_priv->pipestat[0] = 0; in i915_driver_irq_postinstall() [all …]
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H A D | i915_drv.h | 136 u32 pipestat[2]; member
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/dports/devel/openocd/openocd-0.11.0/src/target/ |
H A D | etb.c | 566 etm_ctx->trace_data[j].pipestat = trace_data[i] & 0x7; in etb_read_trace() 571 if (etm_ctx->trace_data[j].pipestat == STAT_TR) { in etb_read_trace() 583 if (etm_ctx->trace_data[j + 1].pipestat == STAT_TR) { in etb_read_trace() 585 1].pipestat = etm_ctx->trace_data[j + 1].packet & 0x7; in etb_read_trace() 595 if (etm_ctx->trace_data[j + 2].pipestat == STAT_TR) { in etb_read_trace() 597 2].pipestat = etm_ctx->trace_data[j + 2].packet & 0x7; in etb_read_trace() 604 etm_ctx->trace_data[j].pipestat = trace_data[i] & 0x7; in etb_read_trace() 609 if (etm_ctx->trace_data[j].pipestat == STAT_TR) { in etb_read_trace() 621 if (etm_ctx->trace_data[j + 1].pipestat == STAT_TR) { in etb_read_trace() 630 etm_ctx->trace_data[j].pipestat = trace_data[i] & 0x7; in etb_read_trace() [all …]
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H A D | etm.c | 891 uint8_t pipestat = ctx->trace_data[ctx->pipe_index].pipestat; in etmv1_analyze_trace() local 904 if ((pipestat == STAT_IE) || (pipestat == STAT_ID)) in etmv1_analyze_trace() 917 if ((pipestat == STAT_BE) || (pipestat == STAT_BD)) { in etmv1_analyze_trace() 1020 if (ctx->pc_ok && (pipestat != STAT_WT) && (pipestat != STAT_TD) && in etmv1_analyze_trace() 1021 !(((pipestat == STAT_BE) || (pipestat == STAT_BD)) && in etmv1_analyze_trace() 1038 if ((pipestat == STAT_ID) || (pipestat == STAT_BD)) { in etmv1_analyze_trace() 1044 if (pipestat == STAT_BD) { in etmv1_analyze_trace() 1097 if (pipestat == STAT_BD) { in etmv1_analyze_trace() 1104 if ((pipestat == STAT_IE) || (pipestat == STAT_ID)) { in etmv1_analyze_trace() 1115 if ((pipestat != STAT_TD) && (pipestat != STAT_WT)) { in etmv1_analyze_trace() [all …]
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H A D | oocd_trace.c | 209 etm_ctx->trace_data[i].pipestat = (trace_data[i] & 0x7); in oocd_trace_read_trace() 216 if (etm_ctx->trace_data[i].pipestat == STAT_TR) { in oocd_trace_read_trace() 217 etm_ctx->trace_data[i].pipestat = etm_ctx->trace_data[i].packet & 0x7; in oocd_trace_read_trace()
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H A D | etm.h | 152 uint8_t pipestat; /* bits 0-2 pipeline status */ member
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/gma500/ |
H A D | psb_irq.c | 74 if ((dev_priv->pipestat[pipe] & mask) != mask) { in psb_enable_pipestat() 76 dev_priv->pipestat[pipe] |= mask; in psb_enable_pipestat() 91 if ((dev_priv->pipestat[pipe] & mask) != 0) { in psb_disable_pipestat() 93 dev_priv->pipestat[pipe] &= ~mask; in psb_disable_pipestat() 114 uint32_t pipe_enable = dev_priv->pipestat[pipe]; in mid_pipe_event_handler() 115 uint32_t pipe_status = dev_priv->pipestat[pipe] >> 16; in mid_pipe_event_handler()
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H A D | psb_drv.c | 374 dev_priv->pipestat[0] = 0; in psb_driver_load() 375 dev_priv->pipestat[1] = 0; in psb_driver_load() 376 dev_priv->pipestat[2] = 0; in psb_driver_load()
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H A D | psb_drv.h | 431 uint32_t pipestat[PSB_NUM_PIPE]; member
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/gma500/ |
H A D | psb_irq.c | 74 if ((dev_priv->pipestat[pipe] & mask) != mask) { in psb_enable_pipestat() 76 dev_priv->pipestat[pipe] |= mask; in psb_enable_pipestat() 91 if ((dev_priv->pipestat[pipe] & mask) != 0) { in psb_disable_pipestat() 93 dev_priv->pipestat[pipe] &= ~mask; in psb_disable_pipestat() 114 uint32_t pipe_enable = dev_priv->pipestat[pipe]; in mid_pipe_event_handler() 115 uint32_t pipe_status = dev_priv->pipestat[pipe] >> 16; in mid_pipe_event_handler()
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H A D | psb_drv.c | 374 dev_priv->pipestat[0] = 0; in psb_driver_load() 375 dev_priv->pipestat[1] = 0; in psb_driver_load() 376 dev_priv->pipestat[2] = 0; in psb_driver_load()
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H A D | psb_drv.h | 431 uint32_t pipestat[PSB_NUM_PIPE]; member
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/gma500/ |
H A D | psb_irq.c | 74 if ((dev_priv->pipestat[pipe] & mask) != mask) { in psb_enable_pipestat() 76 dev_priv->pipestat[pipe] |= mask; in psb_enable_pipestat() 91 if ((dev_priv->pipestat[pipe] & mask) != 0) { in psb_disable_pipestat() 93 dev_priv->pipestat[pipe] &= ~mask; in psb_disable_pipestat() 114 uint32_t pipe_enable = dev_priv->pipestat[pipe]; in mid_pipe_event_handler() 115 uint32_t pipe_status = dev_priv->pipestat[pipe] >> 16; in mid_pipe_event_handler()
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H A D | psb_drv.c | 374 dev_priv->pipestat[0] = 0; in psb_driver_load() 375 dev_priv->pipestat[1] = 0; in psb_driver_load() 376 dev_priv->pipestat[2] = 0; in psb_driver_load()
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H A D | psb_drv.h | 431 uint32_t pipestat[PSB_NUM_PIPE]; member
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/dports/www/varnish6/varnish-cache-varnish-6.6.2/include/tbl/ |
H A D | locks.h | 44 LOCK(pipestat)
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/dports/net/drawterm/drawterm/kern/ |
H A D | devpipe.c | 153 pipestat(Chan *c, uchar *db, int n) in pipestat() function 388 pipestat,
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/dports/misc/rump/buildrump.sh-b914579/src/sys/external/bsd/drm2/dist/drm/i915/ |
H A D | i915_irq.c | 246 u32 pipestat = I915_READ(reg) & 0x7fff0000; in i9xx_clear_fifo_underrun() local 250 I915_WRITE(reg, pipestat | PIPE_FIFO_UNDERRUN_STATUS); in i9xx_clear_fifo_underrun() 509 u32 pipestat = I915_READ(reg) & PIPESTAT_INT_ENABLE_MASK; in __i915_enable_pipestat() local 517 if ((pipestat & enable_mask) == enable_mask) in __i915_enable_pipestat() 523 pipestat |= enable_mask | status_mask; in __i915_enable_pipestat() 524 I915_WRITE(reg, pipestat); in __i915_enable_pipestat() 533 u32 pipestat = I915_READ(reg) & PIPESTAT_INT_ENABLE_MASK; in __i915_disable_pipestat() local 541 if ((pipestat & enable_mask) == 0) in __i915_disable_pipestat() 546 pipestat &= ~enable_mask; in __i915_disable_pipestat() 547 I915_WRITE(reg, pipestat); in __i915_disable_pipestat()
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H A D | i915_gpu_error.c | 1132 error->pipestat[pipe] = I915_READ(PIPESTAT(pipe)); in i915_capture_reg_state()
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H A D | i915_drv.h | 338 u32 pipestat[I915_MAX_PIPES]; member
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/dports/devel/cvs-devel/cvs-1.12.13/diff/ |
H A D | diff3.c | 1275 struct stat pipestat; local 1333 if (fstat (fd, &pipestat) == 0) 1334 current_chunk_size = max (current_chunk_size, STAT_BLOCKSIZE (pipestat));
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/dports/textproc/diffutils/diffutils-3.8/src/ |
H A D | diff3.c | 1217 struct stat pipestat; in read_diff() local 1281 if (fstat (fd, &pipestat) != 0) in read_diff() 1283 current_chunk_size = MAX (1, STAT_BLOCKSIZE (pipestat)); in read_diff()
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/dports/textproc/wiggle/wiggle-1.3/tests/contrib/series/ |
H A D | merge | 9840 patches.suse/drm-i915-Clear-pipestat-consistently
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H A D | orig | 9840 patches.suse/drm-i915-Clear-pipestat-consistently
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H A D | ldiff | 9851 - patches.suse/drm-i915-Clear-pipestat-consistently
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