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Searched refs:pop_rtx (Results 1 – 25 of 43) sorted by relevance

12

/dports/lang/gcc6-aux/gcc-6-20180516/gcc/config/nds32/
H A Dnds32.c528 rtx pop_rtx; in nds32_emit_stack_pop_multiple() local
592 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
608 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
622 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
809 rtx pop_rtx; in nds32_emit_stack_v3pop() local
872 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
874 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
884 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
886 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
896 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
[all …]
/dports/lang/gnat_util/gcc-6-20180516/gcc/config/nds32/
H A Dnds32.c528 rtx pop_rtx; in nds32_emit_stack_pop_multiple() local
592 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
608 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
622 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
809 rtx pop_rtx; in nds32_emit_stack_v3pop() local
872 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
874 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
884 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
886 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
896 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
[all …]
/dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/config/nds32/
H A Dnds32.c857 rtx pop_rtx; in nds32_emit_stack_pop_multiple() local
916 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
932 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
946 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
1131 rtx pop_rtx; in nds32_emit_stack_v3pop() local
1194 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1196 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1206 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1208 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1218 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
[all …]
/dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/config/nds32/
H A Dnds32.c857 rtx pop_rtx; in nds32_emit_stack_pop_multiple() local
916 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
932 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
946 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
1131 rtx pop_rtx; in nds32_emit_stack_v3pop() local
1194 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1196 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1206 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1208 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1218 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
[all …]
/dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/config/nds32/
H A Dnds32.c857 rtx pop_rtx; in nds32_emit_stack_pop_multiple() local
916 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
932 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
946 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
1131 rtx pop_rtx; in nds32_emit_stack_v3pop() local
1194 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1196 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1206 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1208 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1218 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
[all …]
/dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/gcc/config/nds32/
H A Dnds32.c857 rtx pop_rtx; in nds32_emit_stack_pop_multiple() local
916 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
932 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
946 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
1131 rtx pop_rtx; in nds32_emit_stack_v3pop() local
1194 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1196 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1206 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1208 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1218 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
[all …]
/dports/devel/riscv64-gcc/gcc-8.3.0/gcc/config/nds32/
H A Dnds32.c857 rtx pop_rtx; in nds32_emit_stack_pop_multiple() local
916 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
932 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
946 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
1131 rtx pop_rtx; in nds32_emit_stack_v3pop() local
1194 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1196 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1206 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1208 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1218 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
[all …]
/dports/lang/gcc8/gcc-8.5.0/gcc/config/nds32/
H A Dnds32.c857 rtx pop_rtx; in nds32_emit_stack_pop_multiple() local
916 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
932 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
946 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
1131 rtx pop_rtx; in nds32_emit_stack_v3pop() local
1194 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1196 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1206 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1208 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1218 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
[all …]
/dports/lang/gcc12-devel/gcc-12-20211205/gcc/config/nds32/
H A Dnds32.c885 rtx pop_rtx; in nds32_emit_stack_pop_multiple() local
944 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
960 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
974 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
1159 rtx pop_rtx; in nds32_emit_stack_v3pop() local
1222 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1224 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1234 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1236 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1246 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
[all …]
/dports/lang/gcc9/gcc-9.4.0/gcc/config/nds32/
H A Dnds32.c885 rtx pop_rtx; in nds32_emit_stack_pop_multiple() local
944 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
960 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
974 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
1159 rtx pop_rtx; in nds32_emit_stack_v3pop() local
1222 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1224 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1234 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1236 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1246 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
[all …]
/dports/devel/avr-gcc/gcc-10.2.0/gcc/config/nds32/
H A Dnds32.c885 rtx pop_rtx; in nds32_emit_stack_pop_multiple() local
944 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
960 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
974 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
1159 rtx pop_rtx; in nds32_emit_stack_v3pop() local
1222 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1224 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1234 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1236 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1246 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
[all …]
/dports/lang/gcc11-devel/gcc-11-20211009/gcc/config/nds32/
H A Dnds32.c885 rtx pop_rtx; in nds32_emit_stack_pop_multiple() local
944 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
960 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
974 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
1159 rtx pop_rtx; in nds32_emit_stack_v3pop() local
1222 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1224 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1234 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1236 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1246 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
[all …]
/dports/devel/arm-none-eabi-gcc492/gcc-4.9.2/gcc/config/nds32/
H A Dnds32.c502 rtx pop_rtx; in nds32_gen_stack_pop_multiple() local
562 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_gen_stack_pop_multiple()
576 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_gen_stack_pop_multiple()
588 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_gen_stack_pop_multiple()
600 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_gen_stack_pop_multiple()
757 rtx pop_rtx; in nds32_gen_stack_v3pop() local
807 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_gen_stack_v3pop()
817 pop_rtx = gen_rtx_SET (VOIDmode, reg, mem); in nds32_gen_stack_v3pop()
819 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_gen_stack_v3pop()
829 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_gen_stack_v3pop()
[all …]
/dports/misc/cxx_atomics_pic/gcc-11.2.0/gcc/config/nds32/
H A Dnds32.c885 rtx pop_rtx; in nds32_emit_stack_pop_multiple() local
944 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
960 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
974 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
1159 rtx pop_rtx; in nds32_emit_stack_v3pop() local
1222 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1224 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1234 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1236 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1246 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
[all …]
/dports/lang/gcc9-aux/gcc-9.1.0/gcc/config/nds32/
H A Dnds32.c885 rtx pop_rtx; in nds32_emit_stack_pop_multiple() local
944 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
960 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
974 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
1159 rtx pop_rtx; in nds32_emit_stack_v3pop() local
1222 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1224 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1234 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1236 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1246 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
[all …]
/dports/lang/gcc10/gcc-10.3.0/gcc/config/nds32/
H A Dnds32.c885 rtx pop_rtx; in nds32_emit_stack_pop_multiple() local
944 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
960 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
974 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
1159 rtx pop_rtx; in nds32_emit_stack_v3pop() local
1222 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1224 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1234 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1236 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1246 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
[all …]
/dports/lang/gcc9-devel/gcc-9-20211007/gcc/config/nds32/
H A Dnds32.c885 rtx pop_rtx; in nds32_emit_stack_pop_multiple() local
944 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
960 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
974 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
1159 rtx pop_rtx; in nds32_emit_stack_v3pop() local
1222 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1224 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1234 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1236 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1246 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
[all …]
/dports/lang/gcc11/gcc-11.2.0/gcc/config/nds32/
H A Dnds32.c885 rtx pop_rtx; in nds32_emit_stack_pop_multiple() local
944 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
960 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
974 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
1159 rtx pop_rtx; in nds32_emit_stack_v3pop() local
1222 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1224 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1234 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1236 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1246 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
[all …]
/dports/lang/gcc10-devel/gcc-10-20211008/gcc/config/nds32/
H A Dnds32.c885 rtx pop_rtx; in nds32_emit_stack_pop_multiple() local
944 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
960 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
974 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_pop_multiple()
1159 rtx pop_rtx; in nds32_emit_stack_v3pop() local
1222 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1224 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1234 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
1236 RTX_FRAME_RELATED_P (pop_rtx) = 1; in nds32_emit_stack_v3pop()
1246 pop_rtx = gen_rtx_SET (reg, mem); in nds32_emit_stack_v3pop()
[all …]
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gcc/gcc/
H A Dreg-stack.c899 rtx pop_insn, pop_rtx; in emit_pop_insn() local
924 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode), in emit_pop_insn()
928 pop_insn = emit_insn_after (pop_rtx, insn); in emit_pop_insn()
930 pop_insn = emit_insn_before (pop_rtx, insn); in emit_pop_insn()
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gcc/gcc/
H A Dreg-stack.c899 rtx pop_insn, pop_rtx; in emit_pop_insn() local
924 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode), in emit_pop_insn()
928 pop_insn = emit_insn_after (pop_rtx, insn); in emit_pop_insn()
930 pop_insn = emit_insn_before (pop_rtx, insn); in emit_pop_insn()
/dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/
H A Dreg-stack.c770 rtx pop_rtx; in emit_pop_insn() local
793 pop_rtx = gen_rtx_SET (FP_MODE_REG (hard_regno, DFmode), in emit_pop_insn()
797 pop_insn = emit_insn_after (pop_rtx, insn); in emit_pop_insn()
799 pop_insn = emit_insn_before (pop_rtx, insn); in emit_pop_insn()
/dports/lang/gcc12-devel/gcc-12-20211205/gcc/
H A Dreg-stack.c777 rtx pop_rtx; in emit_pop_insn() local
800 pop_rtx = gen_rtx_SET (FP_MODE_REG (hard_regno, raw_mode), in emit_pop_insn()
804 pop_insn = emit_insn_after (pop_rtx, insn); in emit_pop_insn()
806 pop_insn = emit_insn_before (pop_rtx, insn); in emit_pop_insn()
/dports/lang/gcc9/gcc-9.4.0/gcc/
H A Dreg-stack.c774 rtx pop_rtx; in emit_pop_insn() local
797 pop_rtx = gen_rtx_SET (FP_MODE_REG (hard_regno, raw_mode), in emit_pop_insn()
801 pop_insn = emit_insn_after (pop_rtx, insn); in emit_pop_insn()
803 pop_insn = emit_insn_before (pop_rtx, insn); in emit_pop_insn()
/dports/devel/avr-gcc/gcc-10.2.0/gcc/
H A Dreg-stack.c776 rtx pop_rtx; in emit_pop_insn() local
799 pop_rtx = gen_rtx_SET (FP_MODE_REG (hard_regno, raw_mode), in emit_pop_insn()
803 pop_insn = emit_insn_after (pop_rtx, insn); in emit_pop_insn()
805 pop_insn = emit_insn_before (pop_rtx, insn); in emit_pop_insn()

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