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Searched refs:pre_div_mask (Results 1 – 25 of 96) sorted by relevance

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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/clk/qcom/
H A Dclk-pll.h68 u32 pre_div_mask; member
H A Dclk-alpha-pll.h120 u32 pre_div_mask; member
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/clk/qcom/
H A Dclk-pll.h68 u32 pre_div_mask; member
H A Dclk-alpha-pll.h120 u32 pre_div_mask; member
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/clk/qcom/
H A Dclk-pll.h68 u32 pre_div_mask; member
H A Dclk-alpha-pll.h120 u32 pre_div_mask; member
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-exynos/
H A Dclock.c1516 unsigned div_mask = 0xf, pre_div_mask = 0xff; in exynos5420_set_spi_clk() local
1567 clrsetbits_le32(pre_reg, pre_div_mask << pre_shift, in exynos5420_set_spi_clk()
1568 (fine & pre_div_mask) << pre_shift); in exynos5420_set_spi_clk()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c1517 unsigned div_mask = 0xf, pre_div_mask = 0xff; in exynos5420_set_spi_clk() local
1568 clrsetbits_le32(pre_reg, pre_div_mask << pre_shift, in exynos5420_set_spi_clk()
1569 (fine & pre_div_mask) << pre_shift); in exynos5420_set_spi_clk()
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c1517 unsigned div_mask = 0xf, pre_div_mask = 0xff; in exynos5420_set_spi_clk() local
1568 clrsetbits_le32(pre_reg, pre_div_mask << pre_shift, in exynos5420_set_spi_clk()
1569 (fine & pre_div_mask) << pre_shift); in exynos5420_set_spi_clk()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c1517 unsigned div_mask = 0xf, pre_div_mask = 0xff; in exynos5420_set_spi_clk() local
1568 clrsetbits_le32(pre_reg, pre_div_mask << pre_shift, in exynos5420_set_spi_clk()
1569 (fine & pre_div_mask) << pre_shift); in exynos5420_set_spi_clk()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c1517 unsigned div_mask = 0xf, pre_div_mask = 0xff; in exynos5420_set_spi_clk() local
1568 clrsetbits_le32(pre_reg, pre_div_mask << pre_shift, in exynos5420_set_spi_clk()
1569 (fine & pre_div_mask) << pre_shift); in exynos5420_set_spi_clk()
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c1517 unsigned div_mask = 0xf, pre_div_mask = 0xff; in exynos5420_set_spi_clk() local
1568 clrsetbits_le32(pre_reg, pre_div_mask << pre_shift, in exynos5420_set_spi_clk()
1569 (fine & pre_div_mask) << pre_shift); in exynos5420_set_spi_clk()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/mach-exynos/
H A Dclock.c1516 unsigned div_mask = 0xf, pre_div_mask = 0xff; in exynos5420_set_spi_clk() local
1567 clrsetbits_le32(pre_reg, pre_div_mask << pre_shift, in exynos5420_set_spi_clk()
1568 (fine & pre_div_mask) << pre_shift); in exynos5420_set_spi_clk()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c1517 unsigned div_mask = 0xf, pre_div_mask = 0xff; in exynos5420_set_spi_clk() local
1568 clrsetbits_le32(pre_reg, pre_div_mask << pre_shift, in exynos5420_set_spi_clk()
1569 (fine & pre_div_mask) << pre_shift); in exynos5420_set_spi_clk()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c1517 unsigned div_mask = 0xf, pre_div_mask = 0xff; in exynos5420_set_spi_clk() local
1568 clrsetbits_le32(pre_reg, pre_div_mask << pre_shift, in exynos5420_set_spi_clk()
1569 (fine & pre_div_mask) << pre_shift); in exynos5420_set_spi_clk()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c1517 unsigned div_mask = 0xf, pre_div_mask = 0xff; in exynos5420_set_spi_clk() local
1568 clrsetbits_le32(pre_reg, pre_div_mask << pre_shift, in exynos5420_set_spi_clk()
1569 (fine & pre_div_mask) << pre_shift); in exynos5420_set_spi_clk()
/dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c1517 unsigned div_mask = 0xf, pre_div_mask = 0xff; in exynos5420_set_spi_clk() local
1568 clrsetbits_le32(pre_reg, pre_div_mask << pre_shift, in exynos5420_set_spi_clk()
1569 (fine & pre_div_mask) << pre_shift); in exynos5420_set_spi_clk()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c1517 unsigned div_mask = 0xf, pre_div_mask = 0xff; in exynos5420_set_spi_clk() local
1568 clrsetbits_le32(pre_reg, pre_div_mask << pre_shift, in exynos5420_set_spi_clk()
1569 (fine & pre_div_mask) << pre_shift); in exynos5420_set_spi_clk()
/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c1517 unsigned div_mask = 0xf, pre_div_mask = 0xff; in exynos5420_set_spi_clk() local
1568 clrsetbits_le32(pre_reg, pre_div_mask << pre_shift, in exynos5420_set_spi_clk()
1569 (fine & pre_div_mask) << pre_shift); in exynos5420_set_spi_clk()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-exynos/
H A Dclock.c1516 unsigned div_mask = 0xf, pre_div_mask = 0xff; in exynos5420_set_spi_clk() local
1567 clrsetbits_le32(pre_reg, pre_div_mask << pre_shift, in exynos5420_set_spi_clk()
1568 (fine & pre_div_mask) << pre_shift); in exynos5420_set_spi_clk()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c1517 unsigned div_mask = 0xf, pre_div_mask = 0xff; in exynos5420_set_spi_clk() local
1568 clrsetbits_le32(pre_reg, pre_div_mask << pre_shift, in exynos5420_set_spi_clk()
1569 (fine & pre_div_mask) << pre_shift); in exynos5420_set_spi_clk()
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c1517 unsigned div_mask = 0xf, pre_div_mask = 0xff; in exynos5420_set_spi_clk() local
1568 clrsetbits_le32(pre_reg, pre_div_mask << pre_shift, in exynos5420_set_spi_clk()
1569 (fine & pre_div_mask) << pre_shift); in exynos5420_set_spi_clk()
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c1517 unsigned div_mask = 0xf, pre_div_mask = 0xff; in exynos5420_set_spi_clk() local
1568 clrsetbits_le32(pre_reg, pre_div_mask << pre_shift, in exynos5420_set_spi_clk()
1569 (fine & pre_div_mask) << pre_shift); in exynos5420_set_spi_clk()
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c1517 unsigned div_mask = 0xf, pre_div_mask = 0xff; in exynos5420_set_spi_clk() local
1568 clrsetbits_le32(pre_reg, pre_div_mask << pre_shift, in exynos5420_set_spi_clk()
1569 (fine & pre_div_mask) << pre_shift); in exynos5420_set_spi_clk()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/mach-exynos/
H A Dclock.c1516 unsigned div_mask = 0xf, pre_div_mask = 0xff; in exynos5420_set_spi_clk() local
1567 clrsetbits_le32(pre_reg, pre_div_mask << pre_shift, in exynos5420_set_spi_clk()
1568 (fine & pre_div_mask) << pre_shift); in exynos5420_set_spi_clk()

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