Home
last modified time | relevance | path

Searched refs:prev_mux (Results 1 – 1 of 1) sorted by relevance

/dports/cad/iverilog/verilog-11.0/
H A Dsynth2.cc1130 vector<NetMux*>prev_mux (nex_out.pin_count()); in synth_async_casez_() local
1181 if (prev_mux[mdx]) in synth_async_casez_()
1182 connect(mux->pin_Data(0), prev_mux[mdx]->pin_Result()); in synth_async_casez_()
1197 prev_mux[mdx] = mux; in synth_async_casez_()
1210 for (size_t mdx = 0 ; mdx < prev_mux.size() ; mdx += 1) in synth_async_casez_()
1211 connect(prev_mux[mdx]->pin_Result(), nex_out.pin(mdx)); in synth_async_casez_()