/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/gallium/drivers/radeonsi/ |
H A D | si_state_binning.c | 421 radeon_opt_set_context_reg( in si_emit_dpbb_disable() 429 radeon_opt_set_context_reg( in si_emit_dpbb_disable() 441 radeon_opt_set_context_reg( in si_emit_dpbb_disable() 552 radeon_opt_set_context_reg( in si_emit_dpbb_state() 568 radeon_opt_set_context_reg( in si_emit_dpbb_state()
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H A D | si_state_shaders.c | 556 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in si_emit_shader_es() 565 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_es() 727 radeon_opt_set_context_reg(sctx, R_028AB0_VGT_GSVS_RING_ITEMSIZE, in si_emit_shader_gs() 751 radeon_opt_set_context_reg(sctx, R_028A94_VGT_GS_MAX_PRIMS_PER_SUBGROUP, in si_emit_shader_gs() 755 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in si_emit_shader_gs() 763 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_gs() 933 radeon_opt_set_context_reg(sctx, R_0287FC_GE_MAX_OUTPUT_PER_SUBGROUP, in gfx10_emit_shader_ngg_tail() 944 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in gfx10_emit_shader_ngg_tail() 1296 radeon_opt_set_context_reg(sctx, R_02870C_SPI_SHADER_POS_FORMAT, in si_emit_shader_vs() 1308 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_vs() [all …]
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/dports/lang/clover/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
H A D | si_state_shaders.c | 611 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in si_emit_shader_es() 620 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_es() 781 radeon_opt_set_context_reg(sctx, R_028AB0_VGT_GSVS_RING_ITEMSIZE, in si_emit_shader_gs() 805 radeon_opt_set_context_reg(sctx, R_028A94_VGT_GS_MAX_PRIMS_PER_SUBGROUP, in si_emit_shader_gs() 809 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in si_emit_shader_gs() 817 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_gs() 1004 radeon_opt_set_context_reg(sctx, R_0287FC_GE_MAX_OUTPUT_PER_SUBGROUP, in gfx10_emit_shader_ngg_tail() 1015 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in gfx10_emit_shader_ngg_tail() 1368 radeon_opt_set_context_reg(sctx, R_02870C_SPI_SHADER_POS_FORMAT, in si_emit_shader_vs() 1380 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_vs() [all …]
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H A D | si_state_binning.c | 421 radeon_opt_set_context_reg( in si_emit_dpbb_disable() 429 radeon_opt_set_context_reg( in si_emit_dpbb_disable() 506 radeon_opt_set_context_reg( in si_emit_dpbb_state()
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H A D | si_state_viewport.c | 363 radeon_opt_set_context_reg(ctx, R_028234_PA_SU_HARDWARE_SCREEN_OFFSET, in si_emit_guardband() 367 radeon_opt_set_context_reg( in si_emit_guardband() 641 radeon_opt_set_context_reg(sctx, R_02820C_PA_SC_CLIPRECT_RULE, SI_TRACKED_PA_SC_CLIPRECT_RULE, in si_emit_window_rectangles()
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/dports/graphics/libosmesa/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
H A D | si_state_shaders.c | 611 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in si_emit_shader_es() 620 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_es() 781 radeon_opt_set_context_reg(sctx, R_028AB0_VGT_GSVS_RING_ITEMSIZE, in si_emit_shader_gs() 805 radeon_opt_set_context_reg(sctx, R_028A94_VGT_GS_MAX_PRIMS_PER_SUBGROUP, in si_emit_shader_gs() 809 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in si_emit_shader_gs() 817 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_gs() 1004 radeon_opt_set_context_reg(sctx, R_0287FC_GE_MAX_OUTPUT_PER_SUBGROUP, in gfx10_emit_shader_ngg_tail() 1015 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in gfx10_emit_shader_ngg_tail() 1368 radeon_opt_set_context_reg(sctx, R_02870C_SPI_SHADER_POS_FORMAT, in si_emit_shader_vs() 1380 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_vs() [all …]
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H A D | si_state_binning.c | 421 radeon_opt_set_context_reg( in si_emit_dpbb_disable() 429 radeon_opt_set_context_reg( in si_emit_dpbb_disable() 506 radeon_opt_set_context_reg( in si_emit_dpbb_state()
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H A D | si_state_viewport.c | 363 radeon_opt_set_context_reg(ctx, R_028234_PA_SU_HARDWARE_SCREEN_OFFSET, in si_emit_guardband() 367 radeon_opt_set_context_reg( in si_emit_guardband() 641 radeon_opt_set_context_reg(sctx, R_02820C_PA_SC_CLIPRECT_RULE, SI_TRACKED_PA_SC_CLIPRECT_RULE, in si_emit_window_rectangles()
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/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
H A D | si_state_shaders.c | 611 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in si_emit_shader_es() 620 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_es() 781 radeon_opt_set_context_reg(sctx, R_028AB0_VGT_GSVS_RING_ITEMSIZE, in si_emit_shader_gs() 805 radeon_opt_set_context_reg(sctx, R_028A94_VGT_GS_MAX_PRIMS_PER_SUBGROUP, in si_emit_shader_gs() 809 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in si_emit_shader_gs() 817 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_gs() 1004 radeon_opt_set_context_reg(sctx, R_0287FC_GE_MAX_OUTPUT_PER_SUBGROUP, in gfx10_emit_shader_ngg_tail() 1015 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in gfx10_emit_shader_ngg_tail() 1368 radeon_opt_set_context_reg(sctx, R_02870C_SPI_SHADER_POS_FORMAT, in si_emit_shader_vs() 1380 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_vs() [all …]
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H A D | si_state_binning.c | 421 radeon_opt_set_context_reg( in si_emit_dpbb_disable() 429 radeon_opt_set_context_reg( in si_emit_dpbb_disable() 506 radeon_opt_set_context_reg( in si_emit_dpbb_state()
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H A D | si_state_viewport.c | 363 radeon_opt_set_context_reg(ctx, R_028234_PA_SU_HARDWARE_SCREEN_OFFSET, in si_emit_guardband() 367 radeon_opt_set_context_reg( in si_emit_guardband() 641 radeon_opt_set_context_reg(sctx, R_02820C_PA_SC_CLIPRECT_RULE, SI_TRACKED_PA_SC_CLIPRECT_RULE, in si_emit_window_rectangles()
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/dports/graphics/mesa-libs/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
H A D | si_state_shaders.c | 611 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in si_emit_shader_es() 620 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_es() 781 radeon_opt_set_context_reg(sctx, R_028AB0_VGT_GSVS_RING_ITEMSIZE, in si_emit_shader_gs() 805 radeon_opt_set_context_reg(sctx, R_028A94_VGT_GS_MAX_PRIMS_PER_SUBGROUP, in si_emit_shader_gs() 809 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in si_emit_shader_gs() 817 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_gs() 1004 radeon_opt_set_context_reg(sctx, R_0287FC_GE_MAX_OUTPUT_PER_SUBGROUP, in gfx10_emit_shader_ngg_tail() 1015 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in gfx10_emit_shader_ngg_tail() 1368 radeon_opt_set_context_reg(sctx, R_02870C_SPI_SHADER_POS_FORMAT, in si_emit_shader_vs() 1380 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_vs() [all …]
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H A D | si_state_binning.c | 421 radeon_opt_set_context_reg( in si_emit_dpbb_disable() 429 radeon_opt_set_context_reg( in si_emit_dpbb_disable() 506 radeon_opt_set_context_reg( in si_emit_dpbb_state()
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/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
H A D | si_state_shaders.c | 611 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in si_emit_shader_es() 620 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_es() 781 radeon_opt_set_context_reg(sctx, R_028AB0_VGT_GSVS_RING_ITEMSIZE, in si_emit_shader_gs() 805 radeon_opt_set_context_reg(sctx, R_028A94_VGT_GS_MAX_PRIMS_PER_SUBGROUP, in si_emit_shader_gs() 809 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in si_emit_shader_gs() 817 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_gs() 1004 radeon_opt_set_context_reg(sctx, R_0287FC_GE_MAX_OUTPUT_PER_SUBGROUP, in gfx10_emit_shader_ngg_tail() 1015 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in gfx10_emit_shader_ngg_tail() 1368 radeon_opt_set_context_reg(sctx, R_02870C_SPI_SHADER_POS_FORMAT, in si_emit_shader_vs() 1380 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_vs() [all …]
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H A D | si_state_binning.c | 421 radeon_opt_set_context_reg( in si_emit_dpbb_disable() 429 radeon_opt_set_context_reg( in si_emit_dpbb_disable() 506 radeon_opt_set_context_reg( in si_emit_dpbb_state()
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/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
H A D | si_state_shaders.c | 611 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in si_emit_shader_es() 620 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_es() 781 radeon_opt_set_context_reg(sctx, R_028AB0_VGT_GSVS_RING_ITEMSIZE, in si_emit_shader_gs() 805 radeon_opt_set_context_reg(sctx, R_028A94_VGT_GS_MAX_PRIMS_PER_SUBGROUP, in si_emit_shader_gs() 809 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in si_emit_shader_gs() 817 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_gs() 1004 radeon_opt_set_context_reg(sctx, R_0287FC_GE_MAX_OUTPUT_PER_SUBGROUP, in gfx10_emit_shader_ngg_tail() 1015 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in gfx10_emit_shader_ngg_tail() 1368 radeon_opt_set_context_reg(sctx, R_02870C_SPI_SHADER_POS_FORMAT, in si_emit_shader_vs() 1380 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_vs() [all …]
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H A D | si_state_binning.c | 421 radeon_opt_set_context_reg( in si_emit_dpbb_disable() 429 radeon_opt_set_context_reg( in si_emit_dpbb_disable() 506 radeon_opt_set_context_reg( in si_emit_dpbb_state()
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/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
H A D | si_state_shaders.c | 611 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in si_emit_shader_es() 620 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_es() 781 radeon_opt_set_context_reg(sctx, R_028AB0_VGT_GSVS_RING_ITEMSIZE, in si_emit_shader_gs() 805 radeon_opt_set_context_reg(sctx, R_028A94_VGT_GS_MAX_PRIMS_PER_SUBGROUP, in si_emit_shader_gs() 809 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in si_emit_shader_gs() 817 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_gs() 1004 radeon_opt_set_context_reg(sctx, R_0287FC_GE_MAX_OUTPUT_PER_SUBGROUP, in gfx10_emit_shader_ngg_tail() 1015 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in gfx10_emit_shader_ngg_tail() 1368 radeon_opt_set_context_reg(sctx, R_02870C_SPI_SHADER_POS_FORMAT, in si_emit_shader_vs() 1380 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_vs() [all …]
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H A D | si_state_binning.c | 421 radeon_opt_set_context_reg( in si_emit_dpbb_disable() 429 radeon_opt_set_context_reg( in si_emit_dpbb_disable() 506 radeon_opt_set_context_reg( in si_emit_dpbb_state()
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/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
H A D | si_state_shaders.c | 611 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in si_emit_shader_es() 620 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_es() 781 radeon_opt_set_context_reg(sctx, R_028AB0_VGT_GSVS_RING_ITEMSIZE, in si_emit_shader_gs() 805 radeon_opt_set_context_reg(sctx, R_028A94_VGT_GS_MAX_PRIMS_PER_SUBGROUP, in si_emit_shader_gs() 809 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in si_emit_shader_gs() 817 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_gs() 1004 radeon_opt_set_context_reg(sctx, R_0287FC_GE_MAX_OUTPUT_PER_SUBGROUP, in gfx10_emit_shader_ngg_tail() 1015 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in gfx10_emit_shader_ngg_tail() 1368 radeon_opt_set_context_reg(sctx, R_02870C_SPI_SHADER_POS_FORMAT, in si_emit_shader_vs() 1380 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_vs() [all …]
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H A D | si_state_binning.c | 421 radeon_opt_set_context_reg( in si_emit_dpbb_disable() 429 radeon_opt_set_context_reg( in si_emit_dpbb_disable() 506 radeon_opt_set_context_reg( in si_emit_dpbb_state()
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/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/gallium/drivers/radeonsi/ |
H A D | si_state_shaders.cpp | 750 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in si_emit_shader_es() 759 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_es() 920 radeon_opt_set_context_reg(sctx, R_028AB0_VGT_GSVS_RING_ITEMSIZE, in si_emit_shader_gs() 944 radeon_opt_set_context_reg(sctx, R_028A94_VGT_GS_MAX_PRIMS_PER_SUBGROUP, in si_emit_shader_gs() 948 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in si_emit_shader_gs() 956 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_gs() 1162 radeon_opt_set_context_reg(sctx, R_0287FC_GE_MAX_OUTPUT_PER_SUBGROUP, in gfx10_emit_shader_ngg_tail() 1173 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in gfx10_emit_shader_ngg_tail() 1542 radeon_opt_set_context_reg(sctx, R_02870C_SPI_SHADER_POS_FORMAT, in si_emit_shader_vs() 1554 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_vs() [all …]
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H A D | si_state_binning.c | 421 radeon_opt_set_context_reg( in si_emit_dpbb_disable() 429 radeon_opt_set_context_reg( in si_emit_dpbb_disable() 504 radeon_opt_set_context_reg( in si_emit_dpbb_state()
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/dports/graphics/mesa-dri/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
H A D | si_state_shaders.c | 611 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in si_emit_shader_es() 620 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_es() 781 radeon_opt_set_context_reg(sctx, R_028AB0_VGT_GSVS_RING_ITEMSIZE, in si_emit_shader_gs() 805 radeon_opt_set_context_reg(sctx, R_028A94_VGT_GS_MAX_PRIMS_PER_SUBGROUP, in si_emit_shader_gs() 809 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in si_emit_shader_gs() 817 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_gs() 1004 radeon_opt_set_context_reg(sctx, R_0287FC_GE_MAX_OUTPUT_PER_SUBGROUP, in gfx10_emit_shader_ngg_tail() 1015 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in gfx10_emit_shader_ngg_tail() 1368 radeon_opt_set_context_reg(sctx, R_02870C_SPI_SHADER_POS_FORMAT, in si_emit_shader_vs() 1380 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_vs() [all …]
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H A D | si_state_binning.c | 421 radeon_opt_set_context_reg( in si_emit_dpbb_disable() 429 radeon_opt_set_context_reg( in si_emit_dpbb_disable() 506 radeon_opt_set_context_reg( in si_emit_dpbb_state()
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