| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-at91/ |
| H A D | mpddrc.c | 20 u32 ram_address) in atmel_mpddr_op() argument
24 writel(0, ram_address); in atmel_mpddr_op()
41 const unsigned int ram_address, in ddr2_init() argument
80 ram_address + (0x2 << ba_off)); in ddr2_init()
84 ram_address + (0x3 << ba_off)); in ddr2_init()
91 ram_address + (0x1 << ba_off)); in ddr2_init()
140 writel(0, ram_address); in ddr2_init()
149 const unsigned int ram_address, in ddr3_init() argument
223 writel(0, ram_address); in ddr3_init()
235 const unsigned int ram_address, in lpddr2_init() argument
[all …]
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-at91/ |
| H A D | mpddrc.c | 20 u32 ram_address) in atmel_mpddr_op() argument
24 writel(0, ram_address); in atmel_mpddr_op()
41 const unsigned int ram_address, in ddr2_init() argument
80 ram_address + (0x2 << ba_off)); in ddr2_init()
84 ram_address + (0x3 << ba_off)); in ddr2_init()
91 ram_address + (0x1 << ba_off)); in ddr2_init()
140 writel(0, ram_address); in ddr2_init()
149 const unsigned int ram_address, in ddr3_init() argument
223 writel(0, ram_address); in ddr3_init()
235 const unsigned int ram_address, in lpddr2_init() argument
[all …]
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-at91/ |
| H A D | mpddrc.c | 20 u32 ram_address) in atmel_mpddr_op() argument
24 writel(0, ram_address); in atmel_mpddr_op()
41 const unsigned int ram_address, in ddr2_init() argument
80 ram_address + (0x2 << ba_off)); in ddr2_init()
84 ram_address + (0x3 << ba_off)); in ddr2_init()
91 ram_address + (0x1 << ba_off)); in ddr2_init()
140 writel(0, ram_address); in ddr2_init()
149 const unsigned int ram_address, in ddr3_init() argument
223 writel(0, ram_address); in ddr3_init()
235 const unsigned int ram_address, in lpddr2_init() argument
[all …]
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/mach-at91/ |
| H A D | mpddrc.c | 20 u32 ram_address) in atmel_mpddr_op() argument
24 writel(0, ram_address); in atmel_mpddr_op()
41 const unsigned int ram_address, in ddr2_init() argument
80 ram_address + (0x2 << ba_off)); in ddr2_init()
84 ram_address + (0x3 << ba_off)); in ddr2_init()
91 ram_address + (0x1 << ba_off)); in ddr2_init()
140 writel(0, ram_address); in ddr2_init()
149 const unsigned int ram_address, in ddr3_init() argument
223 writel(0, ram_address); in ddr3_init()
235 const unsigned int ram_address, in lpddr2_init() argument
[all …]
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/mach-at91/ |
| H A D | mpddrc.c | 20 u32 ram_address) in atmel_mpddr_op() argument
24 writel(0, ram_address); in atmel_mpddr_op()
41 const unsigned int ram_address, in ddr2_init() argument
80 ram_address + (0x2 << ba_off)); in ddr2_init()
84 ram_address + (0x3 << ba_off)); in ddr2_init()
91 ram_address + (0x1 << ba_off)); in ddr2_init()
140 writel(0, ram_address); in ddr2_init()
149 const unsigned int ram_address, in ddr3_init() argument
223 writel(0, ram_address); in ddr3_init()
235 const unsigned int ram_address, in lpddr2_init() argument
[all …]
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-at91/ |
| H A D | mpddrc.c | 20 u32 ram_address) in atmel_mpddr_op() argument
24 writel(0, ram_address); in atmel_mpddr_op()
41 const unsigned int ram_address, in ddr2_init() argument
80 ram_address + (0x2 << ba_off)); in ddr2_init()
84 ram_address + (0x3 << ba_off)); in ddr2_init()
91 ram_address + (0x1 << ba_off)); in ddr2_init()
140 writel(0, ram_address); in ddr2_init()
149 const unsigned int ram_address, in ddr3_init() argument
223 writel(0, ram_address); in ddr3_init()
235 const unsigned int ram_address, in lpddr2_init() argument
[all …]
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/mach-at91/ |
| H A D | mpddrc.c | 20 u32 ram_address) in atmel_mpddr_op() argument
24 writel(0, ram_address); in atmel_mpddr_op()
41 const unsigned int ram_address, in ddr2_init() argument
80 ram_address + (0x2 << ba_off)); in ddr2_init()
84 ram_address + (0x3 << ba_off)); in ddr2_init()
91 ram_address + (0x1 << ba_off)); in ddr2_init()
140 writel(0, ram_address); in ddr2_init()
149 const unsigned int ram_address, in ddr3_init() argument
223 writel(0, ram_address); in ddr3_init()
235 const unsigned int ram_address, in lpddr2_init() argument
[all …]
|
| /dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/mach-at91/ |
| H A D | mpddrc.c | 20 u32 ram_address) in atmel_mpddr_op() argument
24 writel(0, ram_address); in atmel_mpddr_op()
41 const unsigned int ram_address, in ddr2_init() argument
80 ram_address + (0x2 << ba_off)); in ddr2_init()
84 ram_address + (0x3 << ba_off)); in ddr2_init()
91 ram_address + (0x1 << ba_off)); in ddr2_init()
140 writel(0, ram_address); in ddr2_init()
149 const unsigned int ram_address, in ddr3_init() argument
223 writel(0, ram_address); in ddr3_init()
235 const unsigned int ram_address, in lpddr2_init() argument
[all …]
|
| /dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/mach-at91/ |
| H A D | mpddrc.c | 20 u32 ram_address) in atmel_mpddr_op() argument
24 writel(0, ram_address); in atmel_mpddr_op()
41 const unsigned int ram_address, in ddr2_init() argument
80 ram_address + (0x2 << ba_off)); in ddr2_init()
84 ram_address + (0x3 << ba_off)); in ddr2_init()
91 ram_address + (0x1 << ba_off)); in ddr2_init()
140 writel(0, ram_address); in ddr2_init()
149 const unsigned int ram_address, in ddr3_init() argument
223 writel(0, ram_address); in ddr3_init()
235 const unsigned int ram_address, in lpddr2_init() argument
[all …]
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-at91/ |
| H A D | mpddrc.c | 20 u32 ram_address) in atmel_mpddr_op() argument
24 writel(0, ram_address); in atmel_mpddr_op()
41 const unsigned int ram_address, in ddr2_init() argument
80 ram_address + (0x2 << ba_off)); in ddr2_init()
84 ram_address + (0x3 << ba_off)); in ddr2_init()
91 ram_address + (0x1 << ba_off)); in ddr2_init()
140 writel(0, ram_address); in ddr2_init()
149 const unsigned int ram_address, in ddr3_init() argument
223 writel(0, ram_address); in ddr3_init()
235 const unsigned int ram_address, in lpddr2_init() argument
[all …]
|
| /dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/mach-at91/ |
| H A D | mpddrc.c | 20 u32 ram_address) in atmel_mpddr_op() argument
24 writel(0, ram_address); in atmel_mpddr_op()
41 const unsigned int ram_address, in ddr2_init() argument
80 ram_address + (0x2 << ba_off)); in ddr2_init()
84 ram_address + (0x3 << ba_off)); in ddr2_init()
91 ram_address + (0x1 << ba_off)); in ddr2_init()
140 writel(0, ram_address); in ddr2_init()
149 const unsigned int ram_address, in ddr3_init() argument
223 writel(0, ram_address); in ddr3_init()
235 const unsigned int ram_address, in lpddr2_init() argument
[all …]
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-at91/ |
| H A D | mpddrc.c | 20 u32 ram_address) in atmel_mpddr_op() argument
24 writel(0, ram_address); in atmel_mpddr_op()
41 const unsigned int ram_address, in ddr2_init() argument
80 ram_address + (0x2 << ba_off)); in ddr2_init()
84 ram_address + (0x3 << ba_off)); in ddr2_init()
91 ram_address + (0x1 << ba_off)); in ddr2_init()
140 writel(0, ram_address); in ddr2_init()
149 const unsigned int ram_address, in ddr3_init() argument
223 writel(0, ram_address); in ddr3_init()
235 const unsigned int ram_address, in lpddr2_init() argument
[all …]
|
| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-at91/ |
| H A D | mpddrc.c | 20 u32 ram_address) in atmel_mpddr_op() argument
24 writel(0, ram_address); in atmel_mpddr_op()
41 const unsigned int ram_address, in ddr2_init() argument
80 ram_address + (0x2 << ba_off)); in ddr2_init()
84 ram_address + (0x3 << ba_off)); in ddr2_init()
91 ram_address + (0x1 << ba_off)); in ddr2_init()
140 writel(0, ram_address); in ddr2_init()
149 const unsigned int ram_address, in ddr3_init() argument
223 writel(0, ram_address); in ddr3_init()
235 const unsigned int ram_address, in lpddr2_init() argument
[all …]
|
| /dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/arm/mach-at91/ |
| H A D | mpddrc.c | 20 u32 ram_address) in atmel_mpddr_op() argument
24 writel(0, ram_address); in atmel_mpddr_op()
41 const unsigned int ram_address, in ddr2_init() argument
80 ram_address + (0x2 << ba_off)); in ddr2_init()
84 ram_address + (0x3 << ba_off)); in ddr2_init()
91 ram_address + (0x1 << ba_off)); in ddr2_init()
140 writel(0, ram_address); in ddr2_init()
149 const unsigned int ram_address, in ddr3_init() argument
223 writel(0, ram_address); in ddr3_init()
235 const unsigned int ram_address, in lpddr2_init() argument
[all …]
|
| /dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/arm/mach-at91/ |
| H A D | mpddrc.c | 20 u32 ram_address) in atmel_mpddr_op() argument
24 writel(0, ram_address); in atmel_mpddr_op()
41 const unsigned int ram_address, in ddr2_init() argument
80 ram_address + (0x2 << ba_off)); in ddr2_init()
84 ram_address + (0x3 << ba_off)); in ddr2_init()
91 ram_address + (0x1 << ba_off)); in ddr2_init()
140 writel(0, ram_address); in ddr2_init()
149 const unsigned int ram_address, in ddr3_init() argument
223 writel(0, ram_address); in ddr3_init()
235 const unsigned int ram_address, in lpddr2_init() argument
[all …]
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/mach-at91/ |
| H A D | mpddrc.c | 20 u32 ram_address) in atmel_mpddr_op() argument
24 writel(0, ram_address); in atmel_mpddr_op()
41 const unsigned int ram_address, in ddr2_init() argument
80 ram_address + (0x2 << ba_off)); in ddr2_init()
84 ram_address + (0x3 << ba_off)); in ddr2_init()
91 ram_address + (0x1 << ba_off)); in ddr2_init()
140 writel(0, ram_address); in ddr2_init()
149 const unsigned int ram_address, in ddr3_init() argument
223 writel(0, ram_address); in ddr3_init()
235 const unsigned int ram_address, in lpddr2_init() argument
[all …]
|
| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/mach-at91/ |
| H A D | mpddrc.c | 20 u32 ram_address) in atmel_mpddr_op() argument
24 writel(0, ram_address); in atmel_mpddr_op()
41 const unsigned int ram_address, in ddr2_init() argument
80 ram_address + (0x2 << ba_off)); in ddr2_init()
84 ram_address + (0x3 << ba_off)); in ddr2_init()
91 ram_address + (0x1 << ba_off)); in ddr2_init()
140 writel(0, ram_address); in ddr2_init()
149 const unsigned int ram_address, in ddr3_init() argument
223 writel(0, ram_address); in ddr3_init()
235 const unsigned int ram_address, in lpddr2_init() argument
[all …]
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/mach-at91/ |
| H A D | mpddrc.c | 20 u32 ram_address) in atmel_mpddr_op() argument
24 writel(0, ram_address); in atmel_mpddr_op()
41 const unsigned int ram_address, in ddr2_init() argument
80 ram_address + (0x2 << ba_off)); in ddr2_init()
84 ram_address + (0x3 << ba_off)); in ddr2_init()
91 ram_address + (0x1 << ba_off)); in ddr2_init()
140 writel(0, ram_address); in ddr2_init()
149 const unsigned int ram_address, in ddr3_init() argument
223 writel(0, ram_address); in ddr3_init()
235 const unsigned int ram_address, in lpddr2_init() argument
[all …]
|
| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/mach-at91/ |
| H A D | mpddrc.c | 20 u32 ram_address) in atmel_mpddr_op() argument
24 writel(0, ram_address); in atmel_mpddr_op()
41 const unsigned int ram_address, in ddr2_init() argument
80 ram_address + (0x2 << ba_off)); in ddr2_init()
84 ram_address + (0x3 << ba_off)); in ddr2_init()
91 ram_address + (0x1 << ba_off)); in ddr2_init()
140 writel(0, ram_address); in ddr2_init()
149 const unsigned int ram_address, in ddr3_init() argument
223 writel(0, ram_address); in ddr3_init()
235 const unsigned int ram_address, in lpddr2_init() argument
[all …]
|
| /dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/arm/mach-at91/ |
| H A D | mpddrc.c | 20 u32 ram_address) in atmel_mpddr_op() argument
24 writel(0, ram_address); in atmel_mpddr_op()
41 const unsigned int ram_address, in ddr2_init() argument
80 ram_address + (0x2 << ba_off)); in ddr2_init()
84 ram_address + (0x3 << ba_off)); in ddr2_init()
91 ram_address + (0x1 << ba_off)); in ddr2_init()
140 writel(0, ram_address); in ddr2_init()
149 const unsigned int ram_address, in ddr3_init() argument
223 writel(0, ram_address); in ddr3_init()
235 const unsigned int ram_address, in lpddr2_init() argument
[all …]
|
| /dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/arch/arm/mach-at91/ |
| H A D | mpddrc.c | 20 u32 ram_address) in atmel_mpddr_op() argument
24 writel(0, ram_address); in atmel_mpddr_op()
41 const unsigned int ram_address, in ddr2_init() argument
80 ram_address + (0x2 << ba_off)); in ddr2_init()
84 ram_address + (0x3 << ba_off)); in ddr2_init()
91 ram_address + (0x1 << ba_off)); in ddr2_init()
140 writel(0, ram_address); in ddr2_init()
149 const unsigned int ram_address, in ddr3_init() argument
223 writel(0, ram_address); in ddr3_init()
235 const unsigned int ram_address, in lpddr2_init() argument
[all …]
|
| /dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/arch/arm/mach-at91/ |
| H A D | mpddrc.c | 20 u32 ram_address) in atmel_mpddr_op() argument
24 writel(0, ram_address); in atmel_mpddr_op()
41 const unsigned int ram_address, in ddr2_init() argument
80 ram_address + (0x2 << ba_off)); in ddr2_init()
84 ram_address + (0x3 << ba_off)); in ddr2_init()
91 ram_address + (0x1 << ba_off)); in ddr2_init()
140 writel(0, ram_address); in ddr2_init()
149 const unsigned int ram_address, in ddr3_init() argument
223 writel(0, ram_address); in ddr3_init()
235 const unsigned int ram_address, in lpddr2_init() argument
[all …]
|
| /dports/sysutils/u-boot-pine64-lts/u-boot-2021.07/arch/arm/mach-at91/ |
| H A D | mpddrc.c | 20 u32 ram_address) in atmel_mpddr_op() argument
24 writel(0, ram_address); in atmel_mpddr_op()
41 const unsigned int ram_address, in ddr2_init() argument
80 ram_address + (0x2 << ba_off)); in ddr2_init()
84 ram_address + (0x3 << ba_off)); in ddr2_init()
91 ram_address + (0x1 << ba_off)); in ddr2_init()
140 writel(0, ram_address); in ddr2_init()
149 const unsigned int ram_address, in ddr3_init() argument
223 writel(0, ram_address); in ddr3_init()
235 const unsigned int ram_address, in lpddr2_init() argument
[all …]
|
| /dports/sysutils/u-boot-pine-h64/u-boot-2021.07/arch/arm/mach-at91/ |
| H A D | mpddrc.c | 20 u32 ram_address) in atmel_mpddr_op() argument
24 writel(0, ram_address); in atmel_mpddr_op()
41 const unsigned int ram_address, in ddr2_init() argument
80 ram_address + (0x2 << ba_off)); in ddr2_init()
84 ram_address + (0x3 << ba_off)); in ddr2_init()
91 ram_address + (0x1 << ba_off)); in ddr2_init()
140 writel(0, ram_address); in ddr2_init()
149 const unsigned int ram_address, in ddr3_init() argument
223 writel(0, ram_address); in ddr3_init()
235 const unsigned int ram_address, in lpddr2_init() argument
[all …]
|
| /dports/sysutils/u-boot-pcduino3/u-boot-2021.07/arch/arm/mach-at91/ |
| H A D | mpddrc.c | 20 u32 ram_address) in atmel_mpddr_op() argument
24 writel(0, ram_address); in atmel_mpddr_op()
41 const unsigned int ram_address, in ddr2_init() argument
80 ram_address + (0x2 << ba_off)); in ddr2_init()
84 ram_address + (0x3 << ba_off)); in ddr2_init()
91 ram_address + (0x1 << ba_off)); in ddr2_init()
140 writel(0, ram_address); in ddr2_init()
149 const unsigned int ram_address, in ddr3_init() argument
223 writel(0, ram_address); in ddr3_init()
235 const unsigned int ram_address, in lpddr2_init() argument
[all …]
|