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/dports/lang/gnatdroid-binutils-x86/binutils-2.27/gas/testsuite/gas/lm32/
H A Dcsr.s11 rcsr r0, IE
12 rcsr r31, IE
13 rcsr r0, IM
14 rcsr r31, IM
15 rcsr r0, IP
16 rcsr r31, IP
17 rcsr r0, CC
18 rcsr r31, CC
19 rcsr r0, CFG
20 rcsr r31, CFG
H A Dcsr.d18 20: 90 00 00 00 rcsr r0,IE
19 24: 90 00 f8 00 rcsr ba,IE
20 28: 90 20 00 00 rcsr r0,IM
21 2c: 90 20 f8 00 rcsr ba,IM
22 30: 90 40 00 00 rcsr r0,IP
23 34: 90 40 f8 00 rcsr ba,IP
24 38: 90 a0 00 00 rcsr r0,CC
25 3c: 90 a0 f8 00 rcsr ba,CC
26 40: 90 c0 00 00 rcsr r0,CFG
27 44: 90 c0 f8 00 rcsr ba,CFG
/dports/devel/arm-elf-binutils/binutils-2.37/gas/testsuite/gas/lm32/
H A Dcsr.s11 rcsr r0, IE
12 rcsr r31, IE
13 rcsr r0, IM
14 rcsr r31, IM
15 rcsr r0, IP
16 rcsr r31, IP
17 rcsr r0, CC
18 rcsr r31, CC
19 rcsr r0, CFG
20 rcsr r31, CFG
H A Dcsr.d18 20: 90 00 00 00 rcsr r0,IE
19 24: 90 00 f8 00 rcsr ba,IE
20 28: 90 20 00 00 rcsr r0,IM
21 2c: 90 20 f8 00 rcsr ba,IM
22 30: 90 40 00 00 rcsr r0,IP
23 34: 90 40 f8 00 rcsr ba,IP
24 38: 90 a0 00 00 rcsr r0,CC
25 3c: 90 a0 f8 00 rcsr ba,CC
26 40: 90 c0 00 00 rcsr r0,CFG
27 44: 90 c0 f8 00 rcsr ba,CFG
/dports/lang/gnatdroid-binutils/binutils-2.27/gas/testsuite/gas/lm32/
H A Dcsr.s11 rcsr r0, IE
12 rcsr r31, IE
13 rcsr r0, IM
14 rcsr r31, IM
15 rcsr r0, IP
16 rcsr r31, IP
17 rcsr r0, CC
18 rcsr r31, CC
19 rcsr r0, CFG
20 rcsr r31, CFG
H A Dcsr.d18 20: 90 00 00 00 rcsr r0,IE
19 24: 90 00 f8 00 rcsr ba,IE
20 28: 90 20 00 00 rcsr r0,IM
21 2c: 90 20 f8 00 rcsr ba,IM
22 30: 90 40 00 00 rcsr r0,IP
23 34: 90 40 f8 00 rcsr ba,IP
24 38: 90 a0 00 00 rcsr r0,CC
25 3c: 90 a0 f8 00 rcsr ba,CC
26 40: 90 c0 00 00 rcsr r0,CFG
27 44: 90 c0 f8 00 rcsr ba,CFG
/dports/devel/gnulibiberty/binutils-2.37/gas/testsuite/gas/lm32/
H A Dcsr.s11 rcsr r0, IE
12 rcsr r31, IE
13 rcsr r0, IM
14 rcsr r31, IM
15 rcsr r0, IP
16 rcsr r31, IP
17 rcsr r0, CC
18 rcsr r31, CC
19 rcsr r0, CFG
20 rcsr r31, CFG
H A Dcsr.d18 20: 90 00 00 00 rcsr r0,IE
19 24: 90 00 f8 00 rcsr ba,IE
20 28: 90 20 00 00 rcsr r0,IM
21 2c: 90 20 f8 00 rcsr ba,IM
22 30: 90 40 00 00 rcsr r0,IP
23 34: 90 40 f8 00 rcsr ba,IP
24 38: 90 a0 00 00 rcsr r0,CC
25 3c: 90 a0 f8 00 rcsr ba,CC
26 40: 90 c0 00 00 rcsr r0,CFG
27 44: 90 c0 f8 00 rcsr ba,CFG
/dports/devel/binutils/binutils-2.37/gas/testsuite/gas/lm32/
H A Dcsr.s11 rcsr r0, IE
12 rcsr r31, IE
13 rcsr r0, IM
14 rcsr r31, IM
15 rcsr r0, IP
16 rcsr r31, IP
17 rcsr r0, CC
18 rcsr r31, CC
19 rcsr r0, CFG
20 rcsr r31, CFG
H A Dcsr.d18 20: 90 00 00 00 rcsr r0,IE
19 24: 90 00 f8 00 rcsr ba,IE
20 28: 90 20 00 00 rcsr r0,IM
21 2c: 90 20 f8 00 rcsr ba,IM
22 30: 90 40 00 00 rcsr r0,IP
23 34: 90 40 f8 00 rcsr ba,IP
24 38: 90 a0 00 00 rcsr r0,CC
25 3c: 90 a0 f8 00 rcsr ba,CC
26 40: 90 c0 00 00 rcsr r0,CFG
27 44: 90 c0 f8 00 rcsr ba,CFG
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c240 uint32_t rcsr; in pxa_wakeup() local
242 rcsr = readl(RCSR); in pxa_wakeup()
243 writel(rcsr & (RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR), RCSR); in pxa_wakeup()
246 if (rcsr & RCSR_SMR) { in pxa_wakeup()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c240 uint32_t rcsr; in pxa_wakeup() local
242 rcsr = readl(RCSR); in pxa_wakeup()
243 writel(rcsr & (RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR), RCSR); in pxa_wakeup()
246 if (rcsr & RCSR_SMR) { in pxa_wakeup()
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c240 uint32_t rcsr; in pxa_wakeup() local
242 rcsr = readl(RCSR); in pxa_wakeup()
243 writel(rcsr & (RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR), RCSR); in pxa_wakeup()
246 if (rcsr & RCSR_SMR) { in pxa_wakeup()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c240 uint32_t rcsr; in pxa_wakeup() local
242 rcsr = readl(RCSR); in pxa_wakeup()
243 writel(rcsr & (RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR), RCSR); in pxa_wakeup()
246 if (rcsr & RCSR_SMR) { in pxa_wakeup()
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c240 uint32_t rcsr; in pxa_wakeup() local
242 rcsr = readl(RCSR); in pxa_wakeup()
243 writel(rcsr & (RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR), RCSR); in pxa_wakeup()
246 if (rcsr & RCSR_SMR) { in pxa_wakeup()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c240 uint32_t rcsr; in pxa_wakeup() local
242 rcsr = readl(RCSR); in pxa_wakeup()
243 writel(rcsr & (RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR), RCSR); in pxa_wakeup()
246 if (rcsr & RCSR_SMR) { in pxa_wakeup()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c240 uint32_t rcsr; in pxa_wakeup() local
242 rcsr = readl(RCSR); in pxa_wakeup()
243 writel(rcsr & (RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR), RCSR); in pxa_wakeup()
246 if (rcsr & RCSR_SMR) { in pxa_wakeup()
/dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c240 uint32_t rcsr; in pxa_wakeup() local
242 rcsr = readl(RCSR); in pxa_wakeup()
243 writel(rcsr & (RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR), RCSR); in pxa_wakeup()
246 if (rcsr & RCSR_SMR) { in pxa_wakeup()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c240 uint32_t rcsr; in pxa_wakeup() local
242 rcsr = readl(RCSR); in pxa_wakeup()
243 writel(rcsr & (RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR), RCSR); in pxa_wakeup()
246 if (rcsr & RCSR_SMR) { in pxa_wakeup()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c240 uint32_t rcsr; in pxa_wakeup() local
242 rcsr = readl(RCSR); in pxa_wakeup()
243 writel(rcsr & (RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR), RCSR); in pxa_wakeup()
246 if (rcsr & RCSR_SMR) { in pxa_wakeup()
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c240 uint32_t rcsr; in pxa_wakeup() local
242 rcsr = readl(RCSR); in pxa_wakeup()
243 writel(rcsr & (RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR), RCSR); in pxa_wakeup()
246 if (rcsr & RCSR_SMR) { in pxa_wakeup()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c240 uint32_t rcsr; in pxa_wakeup() local
242 rcsr = readl(RCSR); in pxa_wakeup()
243 writel(rcsr & (RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR), RCSR); in pxa_wakeup()
246 if (rcsr & RCSR_SMR) { in pxa_wakeup()
/dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c240 uint32_t rcsr; in pxa_wakeup() local
242 rcsr = readl(RCSR); in pxa_wakeup()
243 writel(rcsr & (RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR), RCSR); in pxa_wakeup()
246 if (rcsr & RCSR_SMR) { in pxa_wakeup()
/dports/sysutils/u-boot-qemu-riscv64/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c240 uint32_t rcsr; in pxa_wakeup() local
242 rcsr = readl(RCSR); in pxa_wakeup()
243 writel(rcsr & (RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR), RCSR); in pxa_wakeup()
246 if (rcsr & RCSR_SMR) { in pxa_wakeup()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c240 uint32_t rcsr; in pxa_wakeup() local
242 rcsr = readl(RCSR); in pxa_wakeup()
243 writel(rcsr & (RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR), RCSR); in pxa_wakeup()
246 if (rcsr & RCSR_SMR) { in pxa_wakeup()

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