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Searched refs:read_gc0_config2 (Results 1 – 25 of 62) sorted by relevance

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/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/mips/kvm/
H A Dvz.c2048 *v = read_gc0_config2(); in kvm_vz_get_one_reg()
2300 cur = read_gc0_config2(); in kvm_vz_set_one_reg()
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/mips/kvm/
H A Dvz.c2048 *v = read_gc0_config2(); in kvm_vz_get_one_reg()
2300 cur = read_gc0_config2(); in kvm_vz_set_one_reg()
/dports/multimedia/libv4l/linux-5.13-rc2/arch/mips/kvm/
H A Dvz.c2048 *v = read_gc0_config2(); in kvm_vz_get_one_reg()
2300 cur = read_gc0_config2(); in kvm_vz_set_one_reg()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h2122 #define read_gc0_config2() __read_32bit_gc0_register($16, 2) macro
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h2122 #define read_gc0_config2() __read_32bit_gc0_register($16, 2) macro
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h2122 #define read_gc0_config2() __read_32bit_gc0_register($16, 2) macro
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h2122 #define read_gc0_config2() __read_32bit_gc0_register($16, 2) macro
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h2122 #define read_gc0_config2() __read_32bit_gc0_register($16, 2) macro
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h2122 #define read_gc0_config2() __read_32bit_gc0_register($16, 2) macro
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h2122 #define read_gc0_config2() __read_32bit_gc0_register($16, 2) macro
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h2122 #define read_gc0_config2() __read_32bit_gc0_register($16, 2) macro
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h2122 #define read_gc0_config2() __read_32bit_gc0_register($16, 2) macro
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h2122 #define read_gc0_config2() __read_32bit_gc0_register($16, 2) macro
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h2122 #define read_gc0_config2() __read_32bit_gc0_register($16, 2) macro
/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h2122 #define read_gc0_config2() __read_32bit_gc0_register($16, 2) macro
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h2122 #define read_gc0_config2() __read_32bit_gc0_register($16, 2) macro
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h2122 #define read_gc0_config2() __read_32bit_gc0_register($16, 2) macro
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h2122 #define read_gc0_config2() __read_32bit_gc0_register($16, 2) macro
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h2122 #define read_gc0_config2() __read_32bit_gc0_register($16, 2) macro
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h2122 #define read_gc0_config2() __read_32bit_gc0_register($16, 2) macro
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h2122 #define read_gc0_config2() __read_32bit_gc0_register($16, 2) macro
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h2122 #define read_gc0_config2() __read_32bit_gc0_register($16, 2) macro
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h2122 #define read_gc0_config2() __read_32bit_gc0_register($16, 2) macro
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h2122 #define read_gc0_config2() __read_32bit_gc0_register($16, 2) macro
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/mips/include/asm/
H A Dmipsregs.h2122 #define read_gc0_config2() __read_32bit_gc0_register($16, 2) macro

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