/dports/lang/intel-compute-runtime/compute-runtime-21.52.22081/shared/source/os_interface/linux/ |
H A D | device_time_drm.cpp | 77 struct drm_i915_reg_read reg_lo = {}; in getGpuTimeSplitted() local 82 reg_lo.offset = TIMESTAMP_LOW_REG; in getGpuTimeSplitted() 87 err += pDrm->ioctl(DRM_IOCTL_I915_REG_READ, ®_lo); in getGpuTimeSplitted() 95 *timestamp = reg_lo.val | (reg_hi.val << 32); in getGpuTimeSplitted()
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/dports/misc/rump/buildrump.sh-b914579/src/sys/dev/i2c/ |
H A D | titemp.c | 152 uint8_t reg_hi, reg_lo, temp[2]; in titemp_sensors_refresh() local 157 reg_lo = TITEMP_LTEMP_LO_REG; in titemp_sensors_refresh() 160 reg_lo = TITEMP_RTEMP_LO_REG; in titemp_sensors_refresh() 169 if ((error = titemp_read(sc, reg_lo, &temp[1])) != 0) in titemp_sensors_refresh()
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/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/amd/compiler/ |
H A D | aco_register_allocation.cpp | 683 unsigned reg_lo = lb; in get_reg_simple() local 701 reg_lo += stride; in get_reg_simple() 906 reg_lo = best_pos; in get_regs_for_copies() 974 unsigned reg_lo = lb; in get_reg_impl() local 978 if (reg_lo > lb && !reg_file.is_empty_or_blocked(PhysReg(reg_lo)) && in get_reg_impl() 1168 if (reg_lo < lb || reg_hi >= ub || reg_lo > reg_hi) in get_reg_specified() 1324 if (reg_lo % 4) in get_reg_create_vector() 1326 reg_lo /= 4; in get_reg_create_vector() 1336 if (reg_lo < lb || reg_hi >= ub || reg_lo % stride != 0) in get_reg_create_vector() 1338 …if (reg_lo > lb && reg_file[reg_lo] != 0 && reg_file.get_id(PhysReg(reg_lo)) == reg_file.get_id(Ph… in get_reg_create_vector() [all …]
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/dports/games/libretro-mu/Mu-ff746b8/src/armv5te/ |
H A D | arm_interpreter.cpp | 197 uint32_t reg_lo = insn >> 12 & 15; in do_arm_instruction() local 200 if (reg_lo == reg_hi) in do_arm_instruction() 208 res += (uint64_t)reg(reg_hi) << 32 | reg(reg_lo); in do_arm_instruction() 211 set_reg(reg_lo, res); in do_arm_instruction() 324 uint32_t reg_lo = insn >> 12 & 15; in do_arm_instruction() local 327 if (reg_lo == reg_hi) in do_arm_instruction() 329 sum = product + ((uint64_t)reg(reg_hi) << 32 | reg(reg_lo)); in do_arm_instruction() 330 set_reg(reg_lo, sum); in do_arm_instruction()
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H A D | translate_x86.c | 356 uint32_t reg_lo = insn >> 12 & 15; in translate() local 359 if (left_reg == 15 || right_reg == 15 || reg_lo == 15 || reg_hi == 15) in translate() 361 if (reg_lo == reg_hi) in translate() 370 emit_alu_armreg_x86reg(ADD, reg_lo, EAX); in translate() 373 emit_mov_armreg_x86reg(reg_lo, EAX); in translate()
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H A D | translate_x86_64.c | 390 uint32_t reg_lo = insn >> 12 & 15; in translate() local 393 if (left_reg == 15 || right_reg == 15 || reg_lo == 15 || reg_hi == 15) in translate() 395 if (reg_lo == reg_hi) in translate() 404 emit_alu_armreg_x86reg(ADD, reg_lo, EAX); in translate() 407 emit_mov_armreg_x86reg(reg_lo, EAX); in translate()
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/cxl/ |
H A D | mem.c | 986 static struct cxl_mem *cxl_mem_create(struct pci_dev *pdev, u32 reg_lo, in cxl_mem_create() argument 1002 offset = ((u64)reg_hi << 32) | (reg_lo & CXL_REGLOC_ADDR_MASK); in cxl_mem_create() 1003 bar = FIELD_GET(CXL_REGLOC_BIR_MASK, reg_lo); in cxl_mem_create() 1488 u32 reg_lo, reg_hi; in cxl_mem_probe() local 1492 pci_read_config_dword(pdev, regloc, ®_lo); in cxl_mem_probe() 1495 reg_type = FIELD_GET(CXL_REGLOC_RBI_MASK, reg_lo); in cxl_mem_probe() 1498 cxlm = cxl_mem_create(pdev, reg_lo, reg_hi); in cxl_mem_probe()
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/cxl/ |
H A D | mem.c | 986 static struct cxl_mem *cxl_mem_create(struct pci_dev *pdev, u32 reg_lo, in cxl_mem_create() argument 1002 offset = ((u64)reg_hi << 32) | (reg_lo & CXL_REGLOC_ADDR_MASK); in cxl_mem_create() 1003 bar = FIELD_GET(CXL_REGLOC_BIR_MASK, reg_lo); in cxl_mem_create() 1488 u32 reg_lo, reg_hi; in cxl_mem_probe() local 1492 pci_read_config_dword(pdev, regloc, ®_lo); in cxl_mem_probe() 1495 reg_type = FIELD_GET(CXL_REGLOC_RBI_MASK, reg_lo); in cxl_mem_probe() 1498 cxlm = cxl_mem_create(pdev, reg_lo, reg_hi); in cxl_mem_probe()
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/cxl/ |
H A D | mem.c | 986 static struct cxl_mem *cxl_mem_create(struct pci_dev *pdev, u32 reg_lo, in cxl_mem_create() argument 1002 offset = ((u64)reg_hi << 32) | (reg_lo & CXL_REGLOC_ADDR_MASK); in cxl_mem_create() 1003 bar = FIELD_GET(CXL_REGLOC_BIR_MASK, reg_lo); in cxl_mem_create() 1488 u32 reg_lo, reg_hi; in cxl_mem_probe() local 1492 pci_read_config_dword(pdev, regloc, ®_lo); in cxl_mem_probe() 1495 reg_type = FIELD_GET(CXL_REGLOC_RBI_MASK, reg_lo); in cxl_mem_probe() 1498 cxlm = cxl_mem_create(pdev, reg_lo, reg_hi); in cxl_mem_probe()
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/comedi/drivers/ |
H A D | rti800.c | 210 int reg_lo = chan ? RTI800_DAC1LO : RTI800_DAC0LO; in rti800_ao_insn_write() local 222 outb(val & 0xff, dev->iobase + reg_lo); in rti800_ao_insn_write()
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/comedi/drivers/ |
H A D | rti800.c | 210 int reg_lo = chan ? RTI800_DAC1LO : RTI800_DAC0LO; in rti800_ao_insn_write() local 222 outb(val & 0xff, dev->iobase + reg_lo); in rti800_ao_insn_write()
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/comedi/drivers/ |
H A D | rti800.c | 210 int reg_lo = chan ? RTI800_DAC1LO : RTI800_DAC0LO; in rti800_ao_insn_write() local 222 outb(val & 0xff, dev->iobase + reg_lo); in rti800_ao_insn_write()
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/dports/lang/clover/mesa-21.3.6/src/freedreno/ds/ |
H A D | fd_pps_driver.cc | 326 uint32_t *reg_lo = (uint32_t *)d->io + counter->counter_reg_lo; in collect() local 329 uint32_t lo = *reg_lo; in collect()
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/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/freedreno/ds/ |
H A D | fd_pps_driver.cc | 326 uint32_t *reg_lo = (uint32_t *)d->io + counter->counter_reg_lo; in collect() local 329 uint32_t lo = *reg_lo; in collect()
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/dports/graphics/mesa-libs/mesa-21.3.6/src/freedreno/ds/ |
H A D | fd_pps_driver.cc | 326 uint32_t *reg_lo = (uint32_t *)d->io + counter->counter_reg_lo; in collect() local 329 uint32_t lo = *reg_lo; in collect()
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/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/freedreno/ds/ |
H A D | fd_pps_driver.cc | 326 uint32_t *reg_lo = (uint32_t *)d->io + counter->counter_reg_lo; in collect() local 329 uint32_t lo = *reg_lo; in collect()
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/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/freedreno/ds/ |
H A D | fd_pps_driver.cc | 326 uint32_t *reg_lo = (uint32_t *)d->io + counter->counter_reg_lo; in collect() local 329 uint32_t lo = *reg_lo; in collect()
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/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/freedreno/ds/ |
H A D | fd_pps_driver.cc | 326 uint32_t *reg_lo = (uint32_t *)d->io + counter->counter_reg_lo; in collect() local 329 uint32_t lo = *reg_lo; in collect()
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/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/freedreno/ds/ |
H A D | fd_pps_driver.cc | 326 uint32_t *reg_lo = (uint32_t *)d->io + counter->counter_reg_lo; in collect() local 329 uint32_t lo = *reg_lo; in collect()
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/dports/graphics/libosmesa/mesa-21.3.6/src/freedreno/ds/ |
H A D | fd_pps_driver.cc | 326 uint32_t *reg_lo = (uint32_t *)d->io + counter->counter_reg_lo; in collect() local 329 uint32_t lo = *reg_lo; in collect()
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/dports/graphics/mesa-dri/mesa-21.3.6/src/freedreno/ds/ |
H A D | fd_pps_driver.cc | 326 uint32_t *reg_lo = (uint32_t *)d->io + counter->counter_reg_lo; in collect() local 329 uint32_t lo = *reg_lo; in collect()
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/dports/devel/avr-gdb/gdb-7.3.1/sim/erc32/ |
H A D | exec.c | 305 uint32 lo, mid1, mid2, hi, reg_lo, reg_hi; in mul64() local 330 reg_lo = add32 (lo, (mid1 << 16), &carry); in mul64() 332 reg_lo = add32 (reg_lo, (mid2 << 16), &carry); in mul64() 339 reg_lo = - reg_lo; in mul64() 340 if (reg_lo == 0) in mul64() 344 *result_lo = reg_lo; in mul64()
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/dports/devel/gdb761/gdb-7.6.1/sim/erc32/ |
H A D | exec.c | 305 uint32 lo, mid1, mid2, hi, reg_lo, reg_hi; in mul64() local 330 reg_lo = add32 (lo, (mid1 << 16), &carry); in mul64() 332 reg_lo = add32 (reg_lo, (mid2 << 16), &carry); in mul64() 339 reg_lo = - reg_lo; in mul64() 340 if (reg_lo == 0) in mul64() 344 *result_lo = reg_lo; in mul64()
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/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/erc32/ |
H A D | exec.c | 305 uint32 lo, mid1, mid2, hi, reg_lo, reg_hi; in mul64() local 330 reg_lo = add32 (lo, (mid1 << 16), &carry); in mul64() 332 reg_lo = add32 (reg_lo, (mid2 << 16), &carry); in mul64() 339 reg_lo = - reg_lo; in mul64() 340 if (reg_lo == 0) in mul64() 344 *result_lo = reg_lo; in mul64()
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/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/erc32/ |
H A D | exec.c | 305 uint32 lo, mid1, mid2, hi, reg_lo, reg_hi; in mul64() local 330 reg_lo = add32 (lo, (mid1 << 16), &carry); in mul64() 332 reg_lo = add32 (reg_lo, (mid2 << 16), &carry); in mul64() 339 reg_lo = - reg_lo; in mul64() 340 if (reg_lo == 0) in mul64() 344 *result_lo = reg_lo; in mul64()
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