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Searched refs:reg_write (Results 1 – 25 of 2367) sorted by relevance

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/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/x86/pci/
H A Dce4100.c66 static void reg_write(struct sim_dev_reg *reg, u32 value) in reg_write() function
105 DEFINE_REG(2, 0, 0x14, (256), reg_init, reg_read, reg_write)
113 DEFINE_REG(8, 0, 0x10, (1*MB), reg_init, reg_read, reg_write)
118 DEFINE_REG(10, 0, 0x10, (256), reg_init, reg_read, reg_write)
120 DEFINE_REG(11, 0, 0x10, (256), reg_init, reg_read, reg_write)
121 DEFINE_REG(11, 0, 0x14, (256), reg_init, reg_read, reg_write)
139 DEFINE_REG(14, 0, 0x10, 0, reg_init, reg_read, reg_write)
140 DEFINE_REG(14, 0, 0x14, 0, reg_init, reg_read, reg_write)
141 DEFINE_REG(14, 0, 0x18, 0, reg_init, reg_read, reg_write)
142 DEFINE_REG(14, 0, 0x1C, 0, reg_init, reg_read, reg_write)
[all …]
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/x86/pci/
H A Dce4100.c66 static void reg_write(struct sim_dev_reg *reg, u32 value) in reg_write() function
105 DEFINE_REG(2, 0, 0x14, (256), reg_init, reg_read, reg_write)
113 DEFINE_REG(8, 0, 0x10, (1*MB), reg_init, reg_read, reg_write)
118 DEFINE_REG(10, 0, 0x10, (256), reg_init, reg_read, reg_write)
120 DEFINE_REG(11, 0, 0x10, (256), reg_init, reg_read, reg_write)
121 DEFINE_REG(11, 0, 0x14, (256), reg_init, reg_read, reg_write)
139 DEFINE_REG(14, 0, 0x10, 0, reg_init, reg_read, reg_write)
140 DEFINE_REG(14, 0, 0x14, 0, reg_init, reg_read, reg_write)
141 DEFINE_REG(14, 0, 0x18, 0, reg_init, reg_read, reg_write)
142 DEFINE_REG(14, 0, 0x1C, 0, reg_init, reg_read, reg_write)
[all …]
/dports/multimedia/libv4l/linux-5.13-rc2/arch/x86/pci/
H A Dce4100.c66 static void reg_write(struct sim_dev_reg *reg, u32 value) in reg_write() function
105 DEFINE_REG(2, 0, 0x14, (256), reg_init, reg_read, reg_write)
113 DEFINE_REG(8, 0, 0x10, (1*MB), reg_init, reg_read, reg_write)
118 DEFINE_REG(10, 0, 0x10, (256), reg_init, reg_read, reg_write)
120 DEFINE_REG(11, 0, 0x10, (256), reg_init, reg_read, reg_write)
121 DEFINE_REG(11, 0, 0x14, (256), reg_init, reg_read, reg_write)
139 DEFINE_REG(14, 0, 0x10, 0, reg_init, reg_read, reg_write)
140 DEFINE_REG(14, 0, 0x14, 0, reg_init, reg_read, reg_write)
141 DEFINE_REG(14, 0, 0x18, 0, reg_init, reg_read, reg_write)
142 DEFINE_REG(14, 0, 0x1C, 0, reg_init, reg_read, reg_write)
[all …]
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/board/micronas/vct/
H A Debi_onenand.c25 reg_write(EBI_IO_ACCS_DATA(EBI_BASE), (data << 16)); in ebi_nand_write_word()
26 reg_write(EBI_CPU_IO_ACCS(EBI_BASE), in ebi_nand_write_word()
36 reg_write(EBI_DEV1_CONFIG1(EBI_BASE), 0x83000); in ebi_init_onenand()
38 reg_write(EBI_DEV2_CONFIG1(EBI_BASE), 0x00403002); in ebi_init_onenand()
39 reg_write(EBI_DEV2_CONFIG2(EBI_BASE), 0x50); in ebi_init_onenand()
41 reg_write(EBI_DEV3_CONFIG1(EBI_BASE), 0x00403002); in ebi_init_onenand()
53 reg_write(EBI_DEV2_TIM_EXT(EBI_BASE), 0xFFF00000); in ebi_init_onenand()
66 reg_write(EBI_TAG2_SYS_ID(EBI_BASE), 0x1); in ebi_init_onenand()
67 reg_write(EBI_TAG3_SYS_ID(EBI_BASE), 0x2); in ebi_init_onenand()
68 reg_write(EBI_TAG4_SYS_ID(EBI_BASE), 0x3); in ebi_init_onenand()
[all …]
H A Debi_smc911x.c16 reg_write(EBI_DEV1_CONFIG1(EBI_BASE), 0x00003020); in ebi_init_smc911x()
17 reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004F); in ebi_init_smc911x()
19 reg_write(EBI_DEV1_TIM1_RD1(EBI_BASE), 0x00501100); in ebi_init_smc911x()
20 reg_write(EBI_DEV1_TIM1_RD2(EBI_BASE), 0x0FF02111); in ebi_init_smc911x()
22 reg_write(EBI_DEV1_TIM_EXT(EBI_BASE), 0xFFF00000); in ebi_init_smc911x()
23 reg_write(EBI_DEV1_EXT_ACC(EBI_BASE), 0x0FFFFFFF); in ebi_init_smc911x()
25 reg_write(EBI_DEV1_TIM1_WR1(EBI_BASE), 0x05001100); in ebi_init_smc911x()
54 reg_write(EBI_IO_ACCS_DATA(EBI_BASE), data); in smc911x_reg_write()
55 reg_write(EBI_CPU_IO_ACCS(EBI_BASE), in smc911x_reg_write()
65 reg_write(EBI_IO_ACCS_DATA(EBI_BASE), data); in pkt_data_push()
[all …]
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/micronas/vct/
H A Debi_onenand.c25 reg_write(EBI_IO_ACCS_DATA(EBI_BASE), (data << 16)); in ebi_nand_write_word()
26 reg_write(EBI_CPU_IO_ACCS(EBI_BASE), in ebi_nand_write_word()
36 reg_write(EBI_DEV1_CONFIG1(EBI_BASE), 0x83000); in ebi_init_onenand()
38 reg_write(EBI_DEV2_CONFIG1(EBI_BASE), 0x00403002); in ebi_init_onenand()
39 reg_write(EBI_DEV2_CONFIG2(EBI_BASE), 0x50); in ebi_init_onenand()
41 reg_write(EBI_DEV3_CONFIG1(EBI_BASE), 0x00403002); in ebi_init_onenand()
53 reg_write(EBI_DEV2_TIM_EXT(EBI_BASE), 0xFFF00000); in ebi_init_onenand()
66 reg_write(EBI_TAG2_SYS_ID(EBI_BASE), 0x1); in ebi_init_onenand()
67 reg_write(EBI_TAG3_SYS_ID(EBI_BASE), 0x2); in ebi_init_onenand()
68 reg_write(EBI_TAG4_SYS_ID(EBI_BASE), 0x3); in ebi_init_onenand()
[all …]
H A Debi_smc911x.c16 reg_write(EBI_DEV1_CONFIG1(EBI_BASE), 0x00003020); in ebi_init_smc911x()
17 reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004F); in ebi_init_smc911x()
19 reg_write(EBI_DEV1_TIM1_RD1(EBI_BASE), 0x00501100); in ebi_init_smc911x()
20 reg_write(EBI_DEV1_TIM1_RD2(EBI_BASE), 0x0FF02111); in ebi_init_smc911x()
22 reg_write(EBI_DEV1_TIM_EXT(EBI_BASE), 0xFFF00000); in ebi_init_smc911x()
23 reg_write(EBI_DEV1_EXT_ACC(EBI_BASE), 0x0FFFFFFF); in ebi_init_smc911x()
25 reg_write(EBI_DEV1_TIM1_WR1(EBI_BASE), 0x05001100); in ebi_init_smc911x()
54 reg_write(EBI_IO_ACCS_DATA(EBI_BASE), data); in smc911x_reg_write()
55 reg_write(EBI_CPU_IO_ACCS(EBI_BASE), in smc911x_reg_write()
65 reg_write(EBI_IO_ACCS_DATA(EBI_BASE), data); in pkt_data_push()
[all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/board/micronas/vct/
H A Debi_onenand.c25 reg_write(EBI_IO_ACCS_DATA(EBI_BASE), (data << 16)); in ebi_nand_write_word()
26 reg_write(EBI_CPU_IO_ACCS(EBI_BASE), in ebi_nand_write_word()
36 reg_write(EBI_DEV1_CONFIG1(EBI_BASE), 0x83000); in ebi_init_onenand()
38 reg_write(EBI_DEV2_CONFIG1(EBI_BASE), 0x00403002); in ebi_init_onenand()
39 reg_write(EBI_DEV2_CONFIG2(EBI_BASE), 0x50); in ebi_init_onenand()
41 reg_write(EBI_DEV3_CONFIG1(EBI_BASE), 0x00403002); in ebi_init_onenand()
53 reg_write(EBI_DEV2_TIM_EXT(EBI_BASE), 0xFFF00000); in ebi_init_onenand()
66 reg_write(EBI_TAG2_SYS_ID(EBI_BASE), 0x1); in ebi_init_onenand()
67 reg_write(EBI_TAG3_SYS_ID(EBI_BASE), 0x2); in ebi_init_onenand()
68 reg_write(EBI_TAG4_SYS_ID(EBI_BASE), 0x3); in ebi_init_onenand()
[all …]
H A Debi_smc911x.c16 reg_write(EBI_DEV1_CONFIG1(EBI_BASE), 0x00003020); in ebi_init_smc911x()
17 reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004F); in ebi_init_smc911x()
19 reg_write(EBI_DEV1_TIM1_RD1(EBI_BASE), 0x00501100); in ebi_init_smc911x()
20 reg_write(EBI_DEV1_TIM1_RD2(EBI_BASE), 0x0FF02111); in ebi_init_smc911x()
22 reg_write(EBI_DEV1_TIM_EXT(EBI_BASE), 0xFFF00000); in ebi_init_smc911x()
23 reg_write(EBI_DEV1_EXT_ACC(EBI_BASE), 0x0FFFFFFF); in ebi_init_smc911x()
25 reg_write(EBI_DEV1_TIM1_WR1(EBI_BASE), 0x05001100); in ebi_init_smc911x()
54 reg_write(EBI_IO_ACCS_DATA(EBI_BASE), data); in smc911x_reg_write()
55 reg_write(EBI_CPU_IO_ACCS(EBI_BASE), in smc911x_reg_write()
65 reg_write(EBI_IO_ACCS_DATA(EBI_BASE), data); in pkt_data_push()
[all …]
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/board/micronas/vct/
H A Debi_onenand.c25 reg_write(EBI_IO_ACCS_DATA(EBI_BASE), (data << 16)); in ebi_nand_write_word()
26 reg_write(EBI_CPU_IO_ACCS(EBI_BASE), in ebi_nand_write_word()
36 reg_write(EBI_DEV1_CONFIG1(EBI_BASE), 0x83000); in ebi_init_onenand()
38 reg_write(EBI_DEV2_CONFIG1(EBI_BASE), 0x00403002); in ebi_init_onenand()
39 reg_write(EBI_DEV2_CONFIG2(EBI_BASE), 0x50); in ebi_init_onenand()
41 reg_write(EBI_DEV3_CONFIG1(EBI_BASE), 0x00403002); in ebi_init_onenand()
53 reg_write(EBI_DEV2_TIM_EXT(EBI_BASE), 0xFFF00000); in ebi_init_onenand()
66 reg_write(EBI_TAG2_SYS_ID(EBI_BASE), 0x1); in ebi_init_onenand()
67 reg_write(EBI_TAG3_SYS_ID(EBI_BASE), 0x2); in ebi_init_onenand()
68 reg_write(EBI_TAG4_SYS_ID(EBI_BASE), 0x3); in ebi_init_onenand()
[all …]
H A Debi_smc911x.c16 reg_write(EBI_DEV1_CONFIG1(EBI_BASE), 0x00003020); in ebi_init_smc911x()
17 reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004F); in ebi_init_smc911x()
19 reg_write(EBI_DEV1_TIM1_RD1(EBI_BASE), 0x00501100); in ebi_init_smc911x()
20 reg_write(EBI_DEV1_TIM1_RD2(EBI_BASE), 0x0FF02111); in ebi_init_smc911x()
22 reg_write(EBI_DEV1_TIM_EXT(EBI_BASE), 0xFFF00000); in ebi_init_smc911x()
23 reg_write(EBI_DEV1_EXT_ACC(EBI_BASE), 0x0FFFFFFF); in ebi_init_smc911x()
25 reg_write(EBI_DEV1_TIM1_WR1(EBI_BASE), 0x05001100); in ebi_init_smc911x()
54 reg_write(EBI_IO_ACCS_DATA(EBI_BASE), data); in smc911x_reg_write()
55 reg_write(EBI_CPU_IO_ACCS(EBI_BASE), in smc911x_reg_write()
65 reg_write(EBI_IO_ACCS_DATA(EBI_BASE), data); in pkt_data_push()
[all …]
/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/micronas/vct/
H A Debi_onenand.c26 reg_write(EBI_IO_ACCS_DATA(EBI_BASE), (data << 16)); in ebi_nand_write_word()
27 reg_write(EBI_CPU_IO_ACCS(EBI_BASE), in ebi_nand_write_word()
37 reg_write(EBI_DEV1_CONFIG1(EBI_BASE), 0x83000); in ebi_init_onenand()
39 reg_write(EBI_DEV2_CONFIG1(EBI_BASE), 0x00403002); in ebi_init_onenand()
40 reg_write(EBI_DEV2_CONFIG2(EBI_BASE), 0x50); in ebi_init_onenand()
42 reg_write(EBI_DEV3_CONFIG1(EBI_BASE), 0x00403002); in ebi_init_onenand()
54 reg_write(EBI_DEV2_TIM_EXT(EBI_BASE), 0xFFF00000); in ebi_init_onenand()
67 reg_write(EBI_TAG2_SYS_ID(EBI_BASE), 0x1); in ebi_init_onenand()
68 reg_write(EBI_TAG3_SYS_ID(EBI_BASE), 0x2); in ebi_init_onenand()
69 reg_write(EBI_TAG4_SYS_ID(EBI_BASE), 0x3); in ebi_init_onenand()
[all …]
H A Debi_smc911x.c17 reg_write(EBI_DEV1_CONFIG1(EBI_BASE), 0x00003020); in ebi_init_smc911x()
18 reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004F); in ebi_init_smc911x()
20 reg_write(EBI_DEV1_TIM1_RD1(EBI_BASE), 0x00501100); in ebi_init_smc911x()
21 reg_write(EBI_DEV1_TIM1_RD2(EBI_BASE), 0x0FF02111); in ebi_init_smc911x()
23 reg_write(EBI_DEV1_TIM_EXT(EBI_BASE), 0xFFF00000); in ebi_init_smc911x()
24 reg_write(EBI_DEV1_EXT_ACC(EBI_BASE), 0x0FFFFFFF); in ebi_init_smc911x()
26 reg_write(EBI_DEV1_TIM1_WR1(EBI_BASE), 0x05001100); in ebi_init_smc911x()
55 reg_write(EBI_IO_ACCS_DATA(EBI_BASE), data); in smc911x_reg_write()
56 reg_write(EBI_CPU_IO_ACCS(EBI_BASE), in smc911x_reg_write()
66 reg_write(EBI_IO_ACCS_DATA(EBI_BASE), data); in pkt_data_push()
[all …]
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/board/micronas/vct/
H A Debi_onenand.c25 reg_write(EBI_IO_ACCS_DATA(EBI_BASE), (data << 16)); in ebi_nand_write_word()
26 reg_write(EBI_CPU_IO_ACCS(EBI_BASE), in ebi_nand_write_word()
36 reg_write(EBI_DEV1_CONFIG1(EBI_BASE), 0x83000); in ebi_init_onenand()
38 reg_write(EBI_DEV2_CONFIG1(EBI_BASE), 0x00403002); in ebi_init_onenand()
39 reg_write(EBI_DEV2_CONFIG2(EBI_BASE), 0x50); in ebi_init_onenand()
41 reg_write(EBI_DEV3_CONFIG1(EBI_BASE), 0x00403002); in ebi_init_onenand()
53 reg_write(EBI_DEV2_TIM_EXT(EBI_BASE), 0xFFF00000); in ebi_init_onenand()
66 reg_write(EBI_TAG2_SYS_ID(EBI_BASE), 0x1); in ebi_init_onenand()
67 reg_write(EBI_TAG3_SYS_ID(EBI_BASE), 0x2); in ebi_init_onenand()
68 reg_write(EBI_TAG4_SYS_ID(EBI_BASE), 0x3); in ebi_init_onenand()
[all …]
H A Debi_smc911x.c16 reg_write(EBI_DEV1_CONFIG1(EBI_BASE), 0x00003020); in ebi_init_smc911x()
17 reg_write(EBI_DEV1_CONFIG2(EBI_BASE), 0x0000004F); in ebi_init_smc911x()
19 reg_write(EBI_DEV1_TIM1_RD1(EBI_BASE), 0x00501100); in ebi_init_smc911x()
20 reg_write(EBI_DEV1_TIM1_RD2(EBI_BASE), 0x0FF02111); in ebi_init_smc911x()
22 reg_write(EBI_DEV1_TIM_EXT(EBI_BASE), 0xFFF00000); in ebi_init_smc911x()
23 reg_write(EBI_DEV1_EXT_ACC(EBI_BASE), 0x0FFFFFFF); in ebi_init_smc911x()
25 reg_write(EBI_DEV1_TIM1_WR1(EBI_BASE), 0x05001100); in ebi_init_smc911x()
54 reg_write(EBI_IO_ACCS_DATA(EBI_BASE), data); in smc911x_reg_write()
55 reg_write(EBI_CPU_IO_ACCS(EBI_BASE), in smc911x_reg_write()
65 reg_write(EBI_IO_ACCS_DATA(EBI_BASE), data); in pkt_data_push()
[all …]
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/firewire/
H A Dinit_ohci1394_dma.c114 reg_write(ohci, OHCI1394_BusOptions, bus_options); in init_ohci1394_initialize()
117 reg_write(ohci, OHCI1394_NodeID, 0x0000ffc0); in init_ohci1394_initialize()
120 reg_write(ohci, OHCI1394_HCControlSet, in init_ohci1394_initialize()
124 reg_write(ohci, OHCI1394_LinkControlClear, 0xffffffff); in init_ohci1394_initialize()
127 reg_write(ohci, OHCI1394_LinkControlSet, in init_ohci1394_initialize()
143 reg_write(ohci, OHCI1394_ATRetries, in init_ohci1394_initialize()
149 reg_write(ohci, OHCI1394_HCControlClear, in init_ohci1394_initialize()
185 reg_write(ohci, OHCI1394_IntEventClear, in init_ohci1394_wait_for_busresets()
199 reg_write(ohci, OHCI1394_PhyUpperBound, 0xffff0000); in init_ohci1394_enable_physical_dma()
215 reg_write(ohci, OHCI1394_IntEventClear, 0xffffffff); in init_ohci1394_reset_and_init_dma()
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/firewire/
H A Dinit_ohci1394_dma.c114 reg_write(ohci, OHCI1394_BusOptions, bus_options); in init_ohci1394_initialize()
117 reg_write(ohci, OHCI1394_NodeID, 0x0000ffc0); in init_ohci1394_initialize()
120 reg_write(ohci, OHCI1394_HCControlSet, in init_ohci1394_initialize()
124 reg_write(ohci, OHCI1394_LinkControlClear, 0xffffffff); in init_ohci1394_initialize()
127 reg_write(ohci, OHCI1394_LinkControlSet, in init_ohci1394_initialize()
143 reg_write(ohci, OHCI1394_ATRetries, in init_ohci1394_initialize()
149 reg_write(ohci, OHCI1394_HCControlClear, in init_ohci1394_initialize()
185 reg_write(ohci, OHCI1394_IntEventClear, in init_ohci1394_wait_for_busresets()
199 reg_write(ohci, OHCI1394_PhyUpperBound, 0xffff0000); in init_ohci1394_enable_physical_dma()
215 reg_write(ohci, OHCI1394_IntEventClear, 0xffffffff); in init_ohci1394_reset_and_init_dma()
[all …]
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/firewire/
H A Dinit_ohci1394_dma.c114 reg_write(ohci, OHCI1394_BusOptions, bus_options); in init_ohci1394_initialize()
117 reg_write(ohci, OHCI1394_NodeID, 0x0000ffc0); in init_ohci1394_initialize()
120 reg_write(ohci, OHCI1394_HCControlSet, in init_ohci1394_initialize()
124 reg_write(ohci, OHCI1394_LinkControlClear, 0xffffffff); in init_ohci1394_initialize()
127 reg_write(ohci, OHCI1394_LinkControlSet, in init_ohci1394_initialize()
143 reg_write(ohci, OHCI1394_ATRetries, in init_ohci1394_initialize()
149 reg_write(ohci, OHCI1394_HCControlClear, in init_ohci1394_initialize()
185 reg_write(ohci, OHCI1394_IntEventClear, in init_ohci1394_wait_for_busresets()
199 reg_write(ohci, OHCI1394_PhyUpperBound, 0xffff0000); in init_ohci1394_enable_physical_dma()
215 reg_write(ohci, OHCI1394_IntEventClear, 0xffffffff); in init_ohci1394_reset_and_init_dma()
[all …]
/dports/cad/cascade-compiler/cascade-f4f7ae8bd1dd379790c0e58c286df90b8d1cdcde/share/cascade/test/benchmark/mips32/
H A Dcontrol.v1 …ule Control(instruction, reg_dst, jump, branch, mem_to_reg, alu_op, mem_write, alu_src, reg_write);
10 output reg reg_write; port
18 …0; jump = 0; branch = 0; mem_to_reg = 0; alu_op = 0; mem_write = 0; alu_src = 2'b00; reg_write = 0;
22 …1; jump = 0; branch = 0; mem_to_reg = 0; alu_op = 1; mem_write = 0; alu_src = 2'b10; reg_write = 1;
26 …1; jump = 0; branch = 0; mem_to_reg = 0; alu_op = 1; mem_write = 0; alu_src = 2'b11; reg_write = 1;
30 …1; jump = 0; branch = 0; mem_to_reg = 0; alu_op = 1; mem_write = 0; alu_src = 2'b00; reg_write = 1;
35 …0; jump = 1; branch = 0; mem_to_reg = 0; alu_op = 0; mem_write = 0; alu_src = 2'b00; reg_write = 0;
39 …0; jump = 0; branch = 1; mem_to_reg = 0; alu_op = 0; mem_write = 0; alu_src = 2'b00; reg_write = 0;
43 …0; jump = 0; branch = 0; mem_to_reg = 0; alu_op = 0; mem_write = 0; alu_src = 2'b01; reg_write = 1;
47 …0; jump = 0; branch = 0; mem_to_reg = 0; alu_op = 0; mem_write = 0; alu_src = 2'b01; reg_write = 1;
[all …]
/dports/emulators/py-unicorn/unicorn-1.0.2/bindings/ruby/
H A Dsample_x86.rb114 mu.reg_write(UC_X86_REG_ECX, 0x1234)
115 mu.reg_write(UC_X86_REG_EDX, 0x7890)
161 mu.reg_write(UC_X86_REG_ECX, 0x1234)
162 mu.reg_write(UC_X86_REG_EDX, 0x7890)
194 mu.reg_write(UC_X86_REG_ECX, 0x1234)
195 mu.reg_write(UC_X86_REG_EDX, 0x7890)
237 mu.reg_write(UC_X86_REG_ECX, 0x1234)
301 mu.reg_write(UC_X86_REG_EAX, 1)
514 mu.reg_write(UC_X86_REG_EAX, 7)
515 mu.reg_write(UC_X86_REG_EBX, 5)
[all …]
/dports/emulators/unicorn/unicorn-1.0.2/bindings/ruby/
H A Dsample_x86.rb114 mu.reg_write(UC_X86_REG_ECX, 0x1234)
115 mu.reg_write(UC_X86_REG_EDX, 0x7890)
161 mu.reg_write(UC_X86_REG_ECX, 0x1234)
162 mu.reg_write(UC_X86_REG_EDX, 0x7890)
194 mu.reg_write(UC_X86_REG_ECX, 0x1234)
195 mu.reg_write(UC_X86_REG_EDX, 0x7890)
237 mu.reg_write(UC_X86_REG_ECX, 0x1234)
301 mu.reg_write(UC_X86_REG_EAX, 1)
514 mu.reg_write(UC_X86_REG_EAX, 7)
515 mu.reg_write(UC_X86_REG_EBX, 5)
[all …]
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-mvebu/serdes/axp/
H A Dhigh_speed_env_lib.c643 reg_write(SOC_CTRL_REG, tmp); in serdes_phy_config()
1073 reg_write(PEX_PHY_ACCESS_REG in serdes_phy_config()
1103 reg_write(SATA_BASE_REG in serdes_phy_config()
1112 reg_write(SATA_BASE_REG in serdes_phy_config()
1144 reg_write(MV_ETH_REGS_BASE in serdes_phy_config()
1153 reg_write(MV_ETH_REGS_BASE in serdes_phy_config()
1167 reg_write in serdes_phy_config()
1174 reg_write in serdes_phy_config()
1201 reg_write(SOC_CTRL_REG, tmp); in serdes_phy_config()
1334 reg_write in serdes_phy_config()
[all …]
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-mvebu/serdes/axp/
H A Dhigh_speed_env_lib.c643 reg_write(SOC_CTRL_REG, tmp); in serdes_phy_config()
1073 reg_write(PEX_PHY_ACCESS_REG in serdes_phy_config()
1103 reg_write(SATA_BASE_REG in serdes_phy_config()
1112 reg_write(SATA_BASE_REG in serdes_phy_config()
1144 reg_write(MV_ETH_REGS_BASE in serdes_phy_config()
1153 reg_write(MV_ETH_REGS_BASE in serdes_phy_config()
1167 reg_write in serdes_phy_config()
1174 reg_write in serdes_phy_config()
1201 reg_write(SOC_CTRL_REG, tmp); in serdes_phy_config()
1334 reg_write in serdes_phy_config()
[all …]
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/mach-mvebu/serdes/axp/
H A Dhigh_speed_env_lib.c644 reg_write(SOC_CTRL_REG, tmp); in serdes_phy_config()
1074 reg_write(PEX_PHY_ACCESS_REG in serdes_phy_config()
1104 reg_write(SATA_BASE_REG in serdes_phy_config()
1113 reg_write(SATA_BASE_REG in serdes_phy_config()
1145 reg_write(MV_ETH_REGS_BASE in serdes_phy_config()
1154 reg_write(MV_ETH_REGS_BASE in serdes_phy_config()
1168 reg_write in serdes_phy_config()
1175 reg_write in serdes_phy_config()
1202 reg_write(SOC_CTRL_REG, tmp); in serdes_phy_config()
1335 reg_write in serdes_phy_config()
[all …]
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-mvebu/serdes/axp/
H A Dhigh_speed_env_lib.c644 reg_write(SOC_CTRL_REG, tmp); in serdes_phy_config()
1074 reg_write(PEX_PHY_ACCESS_REG in serdes_phy_config()
1104 reg_write(SATA_BASE_REG in serdes_phy_config()
1113 reg_write(SATA_BASE_REG in serdes_phy_config()
1145 reg_write(MV_ETH_REGS_BASE in serdes_phy_config()
1154 reg_write(MV_ETH_REGS_BASE in serdes_phy_config()
1168 reg_write in serdes_phy_config()
1175 reg_write in serdes_phy_config()
1202 reg_write(SOC_CTRL_REG, tmp); in serdes_phy_config()
1335 reg_write in serdes_phy_config()
[all …]

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