| /dports/lang/clover/mesa-21.3.6/src/amd/compiler/ |
| H A D | aco_instruction_selection_setup.cpp | 451 RegClass* regclasses = ctx->program->temp_rc.data() + ctx->first_temp_id; in init_context() local
561 regclasses[alu_instr->dest.dest.ssa.index] = rc; in init_context()
568 regclasses[nir_instr_as_load_const(instr)->def.index] = rc; in init_context()
736 if (regclasses[intrinsic->src[i].ssa->index].type() == RegType::vgpr) in init_context()
743 regclasses[intrinsic->dest.ssa.index] = rc; in init_context()
756 regclasses[tex->dest.ssa.index] = rc; in init_context()
761 regclasses[entry->dest.ssa.index] = regclasses[entry->src.ssa->index]; in init_context()
769 regclasses[nir_instr_as_ssa_undef(instr)->def.index] = rc; in init_context()
783 if (regclasses[src->src.ssa->index].type() == RegType::vgpr) in init_context()
789 if (rc != regclasses[phi->dest.ssa.index]) in init_context()
[all …]
|
| /dports/graphics/libosmesa-gallium/mesa-21.3.6/src/amd/compiler/ |
| H A D | aco_instruction_selection_setup.cpp | 451 RegClass* regclasses = ctx->program->temp_rc.data() + ctx->first_temp_id; in init_context() local
561 regclasses[alu_instr->dest.dest.ssa.index] = rc; in init_context()
568 regclasses[nir_instr_as_load_const(instr)->def.index] = rc; in init_context()
736 if (regclasses[intrinsic->src[i].ssa->index].type() == RegType::vgpr) in init_context()
743 regclasses[intrinsic->dest.ssa.index] = rc; in init_context()
756 regclasses[tex->dest.ssa.index] = rc; in init_context()
761 regclasses[entry->dest.ssa.index] = regclasses[entry->src.ssa->index]; in init_context()
769 regclasses[nir_instr_as_ssa_undef(instr)->def.index] = rc; in init_context()
783 if (regclasses[src->src.ssa->index].type() == RegType::vgpr) in init_context()
789 if (rc != regclasses[phi->dest.ssa.index]) in init_context()
[all …]
|
| /dports/graphics/libosmesa/mesa-21.3.6/src/amd/compiler/ |
| H A D | aco_instruction_selection_setup.cpp | 451 RegClass* regclasses = ctx->program->temp_rc.data() + ctx->first_temp_id; in init_context() local
561 regclasses[alu_instr->dest.dest.ssa.index] = rc; in init_context()
568 regclasses[nir_instr_as_load_const(instr)->def.index] = rc; in init_context()
736 if (regclasses[intrinsic->src[i].ssa->index].type() == RegType::vgpr) in init_context()
743 regclasses[intrinsic->dest.ssa.index] = rc; in init_context()
756 regclasses[tex->dest.ssa.index] = rc; in init_context()
761 regclasses[entry->dest.ssa.index] = regclasses[entry->src.ssa->index]; in init_context()
769 regclasses[nir_instr_as_ssa_undef(instr)->def.index] = rc; in init_context()
783 if (regclasses[src->src.ssa->index].type() == RegType::vgpr) in init_context()
789 if (rc != regclasses[phi->dest.ssa.index]) in init_context()
[all …]
|
| /dports/graphics/mesa-libs/mesa-21.3.6/src/amd/compiler/ |
| H A D | aco_instruction_selection_setup.cpp | 451 RegClass* regclasses = ctx->program->temp_rc.data() + ctx->first_temp_id; in init_context() local
561 regclasses[alu_instr->dest.dest.ssa.index] = rc; in init_context()
568 regclasses[nir_instr_as_load_const(instr)->def.index] = rc; in init_context()
736 if (regclasses[intrinsic->src[i].ssa->index].type() == RegType::vgpr) in init_context()
743 regclasses[intrinsic->dest.ssa.index] = rc; in init_context()
756 regclasses[tex->dest.ssa.index] = rc; in init_context()
761 regclasses[entry->dest.ssa.index] = regclasses[entry->src.ssa->index]; in init_context()
769 regclasses[nir_instr_as_ssa_undef(instr)->def.index] = rc; in init_context()
783 if (regclasses[src->src.ssa->index].type() == RegType::vgpr) in init_context()
789 if (rc != regclasses[phi->dest.ssa.index]) in init_context()
[all …]
|
| /dports/graphics/mesa-gallium-va/mesa-21.3.6/src/amd/compiler/ |
| H A D | aco_instruction_selection_setup.cpp | 451 RegClass* regclasses = ctx->program->temp_rc.data() + ctx->first_temp_id; in init_context() local
561 regclasses[alu_instr->dest.dest.ssa.index] = rc; in init_context()
568 regclasses[nir_instr_as_load_const(instr)->def.index] = rc; in init_context()
736 if (regclasses[intrinsic->src[i].ssa->index].type() == RegType::vgpr) in init_context()
743 regclasses[intrinsic->dest.ssa.index] = rc; in init_context()
756 regclasses[tex->dest.ssa.index] = rc; in init_context()
761 regclasses[entry->dest.ssa.index] = regclasses[entry->src.ssa->index]; in init_context()
769 regclasses[nir_instr_as_ssa_undef(instr)->def.index] = rc; in init_context()
783 if (regclasses[src->src.ssa->index].type() == RegType::vgpr) in init_context()
789 if (rc != regclasses[phi->dest.ssa.index]) in init_context()
[all …]
|
| /dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/amd/compiler/ |
| H A D | aco_instruction_selection_setup.cpp | 451 RegClass* regclasses = ctx->program->temp_rc.data() + ctx->first_temp_id; in init_context() local
561 regclasses[alu_instr->dest.dest.ssa.index] = rc; in init_context()
568 regclasses[nir_instr_as_load_const(instr)->def.index] = rc; in init_context()
736 if (regclasses[intrinsic->src[i].ssa->index].type() == RegType::vgpr) in init_context()
743 regclasses[intrinsic->dest.ssa.index] = rc; in init_context()
756 regclasses[tex->dest.ssa.index] = rc; in init_context()
761 regclasses[entry->dest.ssa.index] = regclasses[entry->src.ssa->index]; in init_context()
769 regclasses[nir_instr_as_ssa_undef(instr)->def.index] = rc; in init_context()
783 if (regclasses[src->src.ssa->index].type() == RegType::vgpr) in init_context()
789 if (rc != regclasses[phi->dest.ssa.index]) in init_context()
[all …]
|
| /dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/amd/compiler/ |
| H A D | aco_instruction_selection_setup.cpp | 451 RegClass* regclasses = ctx->program->temp_rc.data() + ctx->first_temp_id; in init_context() local
561 regclasses[alu_instr->dest.dest.ssa.index] = rc; in init_context()
568 regclasses[nir_instr_as_load_const(instr)->def.index] = rc; in init_context()
736 if (regclasses[intrinsic->src[i].ssa->index].type() == RegType::vgpr) in init_context()
743 regclasses[intrinsic->dest.ssa.index] = rc; in init_context()
756 regclasses[tex->dest.ssa.index] = rc; in init_context()
761 regclasses[entry->dest.ssa.index] = regclasses[entry->src.ssa->index]; in init_context()
769 regclasses[nir_instr_as_ssa_undef(instr)->def.index] = rc; in init_context()
783 if (regclasses[src->src.ssa->index].type() == RegType::vgpr) in init_context()
789 if (rc != regclasses[phi->dest.ssa.index]) in init_context()
[all …]
|
| /dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/amd/compiler/ |
| H A D | aco_instruction_selection_setup.cpp | 451 RegClass* regclasses = ctx->program->temp_rc.data() + ctx->first_temp_id; in init_context() local
561 regclasses[alu_instr->dest.dest.ssa.index] = rc; in init_context()
568 regclasses[nir_instr_as_load_const(instr)->def.index] = rc; in init_context()
736 if (regclasses[intrinsic->src[i].ssa->index].type() == RegType::vgpr) in init_context()
743 regclasses[intrinsic->dest.ssa.index] = rc; in init_context()
756 regclasses[tex->dest.ssa.index] = rc; in init_context()
761 regclasses[entry->dest.ssa.index] = regclasses[entry->src.ssa->index]; in init_context()
769 regclasses[nir_instr_as_ssa_undef(instr)->def.index] = rc; in init_context()
783 if (regclasses[src->src.ssa->index].type() == RegType::vgpr) in init_context()
789 if (rc != regclasses[phi->dest.ssa.index]) in init_context()
[all …]
|
| /dports/graphics/mesa-dri/mesa-21.3.6/src/amd/compiler/ |
| H A D | aco_instruction_selection_setup.cpp | 451 RegClass* regclasses = ctx->program->temp_rc.data() + ctx->first_temp_id; in init_context() local
561 regclasses[alu_instr->dest.dest.ssa.index] = rc; in init_context()
568 regclasses[nir_instr_as_load_const(instr)->def.index] = rc; in init_context()
736 if (regclasses[intrinsic->src[i].ssa->index].type() == RegType::vgpr) in init_context()
743 regclasses[intrinsic->dest.ssa.index] = rc; in init_context()
756 regclasses[tex->dest.ssa.index] = rc; in init_context()
761 regclasses[entry->dest.ssa.index] = regclasses[entry->src.ssa->index]; in init_context()
769 regclasses[nir_instr_as_ssa_undef(instr)->def.index] = rc; in init_context()
783 if (regclasses[src->src.ssa->index].type() == RegType::vgpr) in init_context()
789 if (rc != regclasses[phi->dest.ssa.index]) in init_context()
[all …]
|
| /dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/amd/compiler/ |
| H A D | aco_instruction_selection_setup.cpp | 466 RegClass* regclasses = ctx->program->temp_rc.data() + ctx->first_temp_id; in init_context() local
584 regclasses[alu_instr->dest.dest.ssa.index] = rc; in init_context()
591 regclasses[nir_instr_as_load_const(instr)->def.index] = rc; in init_context()
760 if (regclasses[intrinsic->src[i].ssa->index].type() == RegType::vgpr) in init_context()
767 regclasses[intrinsic->dest.ssa.index] = rc; in init_context()
780 regclasses[tex->dest.ssa.index] = rc; in init_context()
785 regclasses[entry->dest.ssa.index] = regclasses[entry->src.ssa->index]; in init_context()
793 regclasses[nir_instr_as_ssa_undef(instr)->def.index] = rc; in init_context()
807 if (regclasses[src->src.ssa->index].type() == RegType::vgpr) in init_context()
813 if (rc != regclasses[phi->dest.ssa.index]) in init_context()
[all …]
|
| /dports/devel/libfirm/libfirm-1.21.0/ir/be/scripts/ |
| H A D | generate_regalloc_if.pl | 85 my @regclasses; # stack for the register class variables
192 …push(@regclasses, "{ $class_idx, \"$class_name\", $numregs, NULL, $first_reg, $flags_prepared, &${…
324 print OUT "arch_register_class_t ${arch}_reg_classes[] = {\n\t".join(",\n\t", @regclasses)."\n};\n\…
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 63 for (const TargetRegisterClass *RC : TRI->regclasses()) in ResourcePriorityQueue()
364 for (const TargetRegisterClass *RC : TRI->regclasses()) in regPressureDelta()
368 for (const TargetRegisterClass *RC : TRI->regclasses()) { in regPressureDelta()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 63 for (const TargetRegisterClass *RC : TRI->regclasses()) in ResourcePriorityQueue()
364 for (const TargetRegisterClass *RC : TRI->regclasses()) in regPressureDelta()
368 for (const TargetRegisterClass *RC : TRI->regclasses()) { in regPressureDelta()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 63 for (const TargetRegisterClass *RC : TRI->regclasses()) in ResourcePriorityQueue()
364 for (const TargetRegisterClass *RC : TRI->regclasses()) in regPressureDelta()
368 for (const TargetRegisterClass *RC : TRI->regclasses()) { in regPressureDelta()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 63 for (const TargetRegisterClass *RC : TRI->regclasses()) in ResourcePriorityQueue()
364 for (const TargetRegisterClass *RC : TRI->regclasses()) in regPressureDelta()
368 for (const TargetRegisterClass *RC : TRI->regclasses()) { in regPressureDelta()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 63 for (const TargetRegisterClass *RC : TRI->regclasses()) in ResourcePriorityQueue()
364 for (const TargetRegisterClass *RC : TRI->regclasses()) in regPressureDelta()
368 for (const TargetRegisterClass *RC : TRI->regclasses()) { in regPressureDelta()
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 59 for (const TargetRegisterClass *RC : TRI->regclasses()) in ResourcePriorityQueue()
360 for (const TargetRegisterClass *RC : TRI->regclasses()) in regPressureDelta()
364 for (const TargetRegisterClass *RC : TRI->regclasses()) { in regPressureDelta()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 63 for (const TargetRegisterClass *RC : TRI->regclasses()) in ResourcePriorityQueue()
364 for (const TargetRegisterClass *RC : TRI->regclasses()) in regPressureDelta()
368 for (const TargetRegisterClass *RC : TRI->regclasses()) { in regPressureDelta()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 59 for (const TargetRegisterClass *RC : TRI->regclasses()) in ResourcePriorityQueue()
360 for (const TargetRegisterClass *RC : TRI->regclasses()) in regPressureDelta()
364 for (const TargetRegisterClass *RC : TRI->regclasses()) { in regPressureDelta()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 63 for (const TargetRegisterClass *RC : TRI->regclasses()) in ResourcePriorityQueue()
364 for (const TargetRegisterClass *RC : TRI->regclasses()) in regPressureDelta()
368 for (const TargetRegisterClass *RC : TRI->regclasses()) { in regPressureDelta()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 63 for (const TargetRegisterClass *RC : TRI->regclasses()) in ResourcePriorityQueue()
364 for (const TargetRegisterClass *RC : TRI->regclasses()) in regPressureDelta()
368 for (const TargetRegisterClass *RC : TRI->regclasses()) { in regPressureDelta()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 63 for (const TargetRegisterClass *RC : TRI->regclasses()) in ResourcePriorityQueue()
364 for (const TargetRegisterClass *RC : TRI->regclasses()) in regPressureDelta()
368 for (const TargetRegisterClass *RC : TRI->regclasses()) { in regPressureDelta()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 63 for (const TargetRegisterClass *RC : TRI->regclasses()) in ResourcePriorityQueue()
364 for (const TargetRegisterClass *RC : TRI->regclasses()) in regPressureDelta()
368 for (const TargetRegisterClass *RC : TRI->regclasses()) { in regPressureDelta()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 59 for (const TargetRegisterClass *RC : TRI->regclasses()) in ResourcePriorityQueue()
360 for (const TargetRegisterClass *RC : TRI->regclasses()) in regPressureDelta()
364 for (const TargetRegisterClass *RC : TRI->regclasses()) { in regPressureDelta()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 63 for (const TargetRegisterClass *RC : TRI->regclasses()) in ResourcePriorityQueue()
364 for (const TargetRegisterClass *RC : TRI->regclasses()) in regPressureDelta()
368 for (const TargetRegisterClass *RC : TRI->regclasses()) { in regPressureDelta()
|